diff --git a/library/SubcircuitLibrary/TLC2264/D.lib b/library/SubcircuitLibrary/TLC2264/D.lib
new file mode 100644
index 000000000..f53bf3e03
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/TLC2264/NMOS-180nm.lib b/library/SubcircuitLibrary/TLC2264/NMOS-180nm.lib
new file mode 100644
index 000000000..51e9b1196
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 
++            K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 
++            DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++            UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++            A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++            XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++            CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3    
++            PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++            PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++            WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++            CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 
++            MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 
++            PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/TLC2264/PMOS-180nm.lib b/library/SubcircuitLibrary/TLC2264/PMOS-180nm.lib
new file mode 100644
index 000000000..032b5b95e
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++            K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++            DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++            AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++            PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 
++            VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++            DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++            PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++            UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++            CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8            +            MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3    
++            WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264-cache.lib b/library/SubcircuitLibrary/TLC2264/TLC2264-cache.lib
new file mode 100644
index 000000000..0a635f548
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264-cache.lib
@@ -0,0 +1,164 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_CP1
+#
+DEF eSim_CP1 C 0 10 N N 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_CP1" 25 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS capacitor_polarised
+$FPLIST
+ CP_*
+$ENDFPLIST
+DRAW
+A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
+P 2 0 1 20 -80 30 80 30 N
+P 2 0 1 0 -70 90 -30 90 N
+P 2 0 1 0 -50 70 -50 110 N
+X ~ 1 0 150 110 D 50 50 1 1 P
+X ~ 2 0 -150 130 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264.cir b/library/SubcircuitLibrary/TLC2264/TLC2264.cir
new file mode 100644
index 000000000..32c5f33a3
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264.cir
@@ -0,0 +1,35 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\TLC2264\TLC2264.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 01/19/25 19:51:29
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M4  Net-_M11-Pad1_ Net-_M1-Pad3_ Net-_M4-Pad3_ Net-_D1-Pad2_ mosfet_n		
+M2  Net-_M1-Pad3_ Net-_M1-Pad3_ Net-_M2-Pad3_ Net-_D1-Pad2_ mosfet_n		
+M1  Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad4_ mosfet_p		
+R1  Net-_M2-Pad3_ Net-_D1-Pad2_ 10k		
+R2  Net-_M4-Pad3_ Net-_D1-Pad2_ 10k		
+M5  Net-_M1-Pad1_ Net-_M5-Pad2_ Net-_M11-Pad1_ Net-_M1-Pad4_ mosfet_p		
+M6  Net-_M6-Pad1_ Net-_M14-Pad1_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+M3  Net-_M1-Pad1_ Net-_M14-Pad1_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+M7  Net-_M6-Pad1_ Net-_M11-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad2_ mosfet_n		
+M8  Net-_M6-Pad1_ Net-_M6-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad2_ mosfet_n		
+M9  Net-_M13-Pad2_ Net-_M6-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad2_ mosfet_n		
+M11  Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_D1-Pad2_ Net-_D1-Pad2_ mosfet_n		
+R4  Net-_M11-Pad2_ Net-_D1-Pad2_ 10k		
+M12  Net-_C1-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_D1-Pad2_ mosfet_n		
+M14  Net-_M14-Pad1_ Net-_M14-Pad2_ Net-_M14-Pad3_ Net-_D1-Pad2_ mosfet_n		
+R5  Net-_M14-Pad3_ Net-_D1-Pad2_ 10k		
+M13  Net-_C1-Pad2_ Net-_M13-Pad2_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+M10  Net-_M10-Pad1_ Net-_M10-Pad1_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+R3  Net-_C1-Pad1_ Net-_M11-Pad1_ 10k		
+C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 10u		
+M15  Net-_M14-Pad1_ Net-_M14-Pad1_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+M17  Net-_M14-Pad2_ Net-_M14-Pad1_ Net-_M1-Pad4_ Net-_M1-Pad4_ mosfet_p		
+M16  Net-_M14-Pad2_ Net-_M14-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad2_ mosfet_n		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+U1  Net-_M5-Pad2_ Net-_M1-Pad2_ Net-_M1-Pad4_ Net-_D1-Pad2_ Net-_C1-Pad2_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264.cir.out b/library/SubcircuitLibrary/TLC2264/TLC2264.cir.out
new file mode 100644
index 000000000..d675b6fcc
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264.cir.out
@@ -0,0 +1,39 @@
+* c:\fossee\esim\library\subcircuitlibrary\tlc2264\tlc2264.cir
+
+.include D.lib
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m4 net-_m11-pad1_ net-_m1-pad3_ net-_m4-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m2 net-_m1-pad3_ net-_m1-pad3_ net-_m2-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+r1  net-_m2-pad3_ net-_d1-pad2_ 10k
+r2  net-_m4-pad3_ net-_d1-pad2_ 10k
+m5 net-_m1-pad1_ net-_m5-pad2_ net-_m11-pad1_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m6 net-_m6-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m7 net-_m6-pad1_ net-_m11-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m8 net-_m6-pad1_ net-_m6-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m9 net-_m13-pad2_ net-_m6-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+r4  net-_m11-pad2_ net-_d1-pad2_ 10k
+m12 net-_c1-pad2_ net-_m11-pad1_ net-_m11-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m14 net-_m14-pad1_ net-_m14-pad2_ net-_m14-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+r5  net-_m14-pad3_ net-_d1-pad2_ 10k
+m13 net-_c1-pad2_ net-_m13-pad2_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+r3  net-_c1-pad1_ net-_m11-pad1_ 10k
+c1  net-_c1-pad1_ net-_c1-pad2_ 10u
+m15 net-_m14-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m17 net-_m14-pad2_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m16 net-_m14-pad2_ net-_m14-pad2_ net-_d1-pad1_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+* u1  net-_m5-pad2_ net-_m1-pad2_ net-_m1-pad4_ net-_d1-pad2_ net-_c1-pad2_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264.pro b/library/SubcircuitLibrary/TLC2264/TLC2264.pro
new file mode 100644
index 000000000..e27a398be
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264.sch b/library/SubcircuitLibrary/TLC2264/TLC2264.sch
new file mode 100644
index 000000000..bdb6ed105
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264.sch
@@ -0,0 +1,614 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A3 16535 11693
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L mosfet_n M4
+U 1 1 678CFECE
+P 5450 3950
+F 0 "M4" H 5450 3800 50  0000 R CNN
+F 1 "mosfet_n" H 5550 3900 50  0000 R CNN
+F 2 "" H 5750 3650 29  0000 C CNN
+F 3 "" H 5550 3750 60  0000 C CNN
+	1    5450 3950
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M2
+U 1 1 678CFEEB
+P 4600 3950
+F 0 "M2" H 4600 3800 50  0000 R CNN
+F 1 "mosfet_n" H 4700 3900 50  0000 R CNN
+F 2 "" H 4900 3650 29  0000 C CNN
+F 3 "" H 4700 3750 60  0000 C CNN
+	1    4600 3950
+	-1   0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M1
+U 1 1 678CFF4B
+P 3950 3250
+F 0 "M1" H 3900 3300 50  0000 R CNN
+F 1 "mosfet_p" H 4000 3400 50  0000 R CNN
+F 2 "" H 4200 3350 29  0000 C CNN
+F 3 "" H 4000 3250 60  0000 C CNN
+	1    3950 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 678CFFC4
+P 4350 4600
+F 0 "R1" H 4400 4730 50  0000 C CNN
+F 1 "10k" H 4400 4550 50  0000 C CNN
+F 2 "" H 4400 4580 30  0000 C CNN
+F 3 "" V 4400 4650 30  0000 C CNN
+	1    4350 4600
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R2
+U 1 1 678CFFF8
+P 5600 4600
+F 0 "R2" H 5650 4730 50  0000 C CNN
+F 1 "10k" H 5650 4550 50  0000 C CNN
+F 2 "" H 5650 4580 30  0000 C CNN
+F 3 "" V 5650 4650 30  0000 C CNN
+	1    5600 4600
+	0    1    1    0   
+$EndComp
+$Comp
+L mosfet_p M5
+U 1 1 678D00BE
+P 5850 3250
+F 0 "M5" H 5800 3300 50  0000 R CNN
+F 1 "mosfet_p" H 5900 3400 50  0000 R CNN
+F 2 "" H 6100 3350 29  0000 C CNN
+F 3 "" H 5900 3250 60  0000 C CNN
+	1    5850 3250
+	-1   0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M6
+U 1 1 678D02CD
+P 6350 1350
+F 0 "M6" H 6300 1400 50  0000 R CNN
+F 1 "mosfet_p" H 6400 1500 50  0000 R CNN
+F 2 "" H 6600 1450 29  0000 C CNN
+F 3 "" H 6400 1350 60  0000 C CNN
+	1    6350 1350
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_p M3
+U 1 1 678D0304
+P 5450 1350
+F 0 "M3" H 5400 1400 50  0000 R CNN
+F 1 "mosfet_p" H 5500 1500 50  0000 R CNN
+F 2 "" H 5700 1450 29  0000 C CNN
+F 3 "" H 5500 1350 60  0000 C CNN
+	1    5450 1350
+	-1   0    0    1   
+$EndComp
+$Comp
+L mosfet_n M7
+U 1 1 678D04ED
+P 6450 3850
+F 0 "M7" H 6450 3700 50  0000 R CNN
+F 1 "mosfet_n" H 6550 3800 50  0000 R CNN
+F 2 "" H 6750 3550 29  0000 C CNN
+F 3 "" H 6550 3650 60  0000 C CNN
+	1    6450 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M8
+U 1 1 678D0518
+P 7750 3850
+F 0 "M8" H 7750 3700 50  0000 R CNN
+F 1 "mosfet_n" H 7850 3800 50  0000 R CNN
+F 2 "" H 8050 3550 29  0000 C CNN
+F 3 "" H 7850 3650 60  0000 C CNN
+	1    7750 3850
+	-1   0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M9
+U 1 1 678D0997
+P 8500 3850
+F 0 "M9" H 8500 3700 50  0000 R CNN
+F 1 "mosfet_n" H 8600 3800 50  0000 R CNN
+F 2 "" H 8800 3550 29  0000 C CNN
+F 3 "" H 8600 3650 60  0000 C CNN
+	1    8500 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M11
+U 1 1 678D0BA1
+P 9600 3850
+F 0 "M11" H 9600 3700 50  0000 R CNN
+F 1 "mosfet_n" H 9700 3800 50  0000 R CNN
+F 2 "" H 9900 3550 29  0000 C CNN
+F 3 "" H 9700 3650 60  0000 C CNN
+	1    9600 3850
+	-1   0    0    -1  
+$EndComp
+$Comp
+L resistor R4
+U 1 1 678D0E4B
+P 9850 4450
+F 0 "R4" H 9900 4580 50  0000 C CNN
+F 1 "1k" H 9900 4400 50  0000 C CNN
+F 2 "" H 9900 4430 30  0000 C CNN
+F 3 "" V 9900 4500 30  0000 C CNN
+	1    9850 4450
+	0    1    1    0   
+$EndComp
+$Comp
+L mosfet_n M12
+U 1 1 678D0FC6
+P 9700 2800
+F 0 "M12" H 9700 2650 50  0000 R CNN
+F 1 "mosfet_n" H 9800 2750 50  0000 R CNN
+F 2 "" H 10000 2500 29  0000 C CNN
+F 3 "" H 9800 2600 60  0000 C CNN
+	1    9700 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M14
+U 1 1 678D1067
+P 10700 2800
+F 0 "M14" H 10700 2650 50  0000 R CNN
+F 1 "mosfet_n" H 10800 2750 50  0000 R CNN
+F 2 "" H 11000 2500 29  0000 C CNN
+F 3 "" H 10800 2600 60  0000 C CNN
+	1    10700 2800
+	-1   0    0    -1  
+$EndComp
+$Comp
+L resistor R5
+U 1 1 678D1327
+P 10450 4450
+F 0 "R5" H 10500 4580 50  0000 C CNN
+F 1 "1k" H 10500 4400 50  0000 C CNN
+F 2 "" H 10500 4430 30  0000 C CNN
+F 3 "" V 10500 4500 30  0000 C CNN
+	1    10450 4450
+	0    1    1    0   
+$EndComp
+$Comp
+L mosfet_p M13
+U 1 1 678D2087
+P 9750 1300
+F 0 "M13" H 9700 1350 50  0000 R CNN
+F 1 "mosfet_p" H 9800 1450 50  0000 R CNN
+F 2 "" H 10000 1400 29  0000 C CNN
+F 3 "" H 9800 1300 60  0000 C CNN
+	1    9750 1300
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_p M10
+U 1 1 678D21BD
+P 9000 1300
+F 0 "M10" H 8950 1350 50  0000 R CNN
+F 1 "mosfet_p" H 9050 1450 50  0000 R CNN
+F 2 "" H 9250 1400 29  0000 C CNN
+F 3 "" H 9050 1300 60  0000 C CNN
+	1    9000 1300
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	4700 4150 5350 4150
+Wire Wire Line
+	4400 3950 4100 3950
+Wire Wire Line
+	4100 3950 4100 3450
+Wire Wire Line
+	5050 4150 5050 3700
+Wire Wire Line
+	5050 3700 4100 3700
+Connection ~ 4100 3700
+Connection ~ 5050 4150
+Wire Wire Line
+	4300 4300 4300 4900
+Wire Wire Line
+	4300 4900 12050 4900
+Wire Wire Line
+	4400 4350 4400 4500
+Wire Wire Line
+	4400 4800 4400 4900
+Connection ~ 4400 4900
+Wire Wire Line
+	5650 4500 5650 4350
+Wire Wire Line
+	5650 4800 5650 4900
+Connection ~ 5650 4900
+Wire Wire Line
+	5750 4300 5750 4900
+Connection ~ 5750 4900
+Wire Wire Line
+	4200 3400 5600 3400
+Wire Wire Line
+	5700 3450 5700 3950
+Wire Wire Line
+	5700 3950 5650 3950
+Wire Wire Line
+	6000 3250 6000 2750
+Wire Wire Line
+	6000 2750 3150 2750
+Wire Wire Line
+	4100 3050 5700 3050
+Wire Wire Line
+	5300 1550 5300 3050
+Connection ~ 5300 3050
+Wire Wire Line
+	5300 1150 5300 900 
+Wire Wire Line
+	4900 900  4900 3400
+Connection ~ 4900 3400
+Wire Wire Line
+	5200 1200 5200 1050
+Wire Wire Line
+	5200 1050 5300 1050
+Connection ~ 5300 1050
+Wire Wire Line
+	5600 1350 6200 1350
+Wire Wire Line
+	6600 900  6600 1200
+Connection ~ 5300 900 
+Wire Wire Line
+	6500 1150 6600 1150
+Connection ~ 6600 1150
+Wire Wire Line
+	6750 4200 6750 4900
+Connection ~ 6750 4900
+Wire Wire Line
+	6650 4250 6750 4250
+Connection ~ 6750 4250
+Wire Wire Line
+	7450 4900 7450 4200
+Wire Wire Line
+	7550 4250 7450 4250
+Connection ~ 7450 4250
+Wire Wire Line
+	6500 1550 6500 3850
+Wire Wire Line
+	6500 3850 6650 3850
+Wire Wire Line
+	7550 3850 7550 3450
+Wire Wire Line
+	7550 3450 6500 3450
+Connection ~ 6500 3450
+Wire Wire Line
+	7850 4050 8400 4050
+Wire Wire Line
+	7550 3700 8150 3700
+Wire Wire Line
+	8150 3700 8150 4050
+Connection ~ 8150 4050
+Connection ~ 7550 3700
+Wire Wire Line
+	8700 4250 8800 4250
+Wire Wire Line
+	8800 4900 8800 4200
+Wire Wire Line
+	9300 4900 9300 4200
+Wire Wire Line
+	9300 4250 9400 4250
+Connection ~ 8800 4250
+Connection ~ 7450 4900
+Connection ~ 9300 4250
+Connection ~ 8800 4900
+Wire Wire Line
+	9700 4050 9900 4050
+Wire Wire Line
+	9900 3200 9900 4350
+Wire Wire Line
+	9900 4900 9900 4650
+Connection ~ 9300 4900
+Connection ~ 9900 4050
+Wire Wire Line
+	10000 3150 10400 3150
+Wire Wire Line
+	10500 3200 10500 4350
+Wire Wire Line
+	10500 4900 10500 4650
+Connection ~ 9900 4900
+Wire Wire Line
+	10200 3150 10200 4900
+Connection ~ 10200 4900
+Connection ~ 10200 3150
+Wire Wire Line
+	6350 4050 6350 3000
+Wire Wire Line
+	6350 3000 9600 3000
+Wire Wire Line
+	6350 3700 5700 3700
+Connection ~ 5700 3700
+Connection ~ 6350 3700
+Wire Wire Line
+	9900 2800 9900 1500
+$Comp
+L resistor R3
+U 1 1 678D2281
+P 9100 2450
+F 0 "R3" H 9150 2580 50  0000 C CNN
+F 1 "10k" H 9150 2400 50  0000 C CNN
+F 2 "" H 9150 2430 30  0000 C CNN
+F 3 "" V 9150 2500 30  0000 C CNN
+	1    9100 2450
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	9150 2650 9150 3000
+Connection ~ 9150 3000
+$Comp
+L capacitor_polarised C1
+U 1 1 678D2328
+P 9500 2250
+F 0 "C1" H 9525 2350 50  0000 L CNN
+F 1 "10u" H 9525 2150 50  0000 L CNN
+F 2 "" H 9500 2250 50  0001 C CNN
+F 3 "" H 9500 2250 50  0001 C CNN
+	1    9500 2250
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	9150 2350 9150 2250
+Wire Wire Line
+	9150 2250 9350 2250
+Wire Wire Line
+	9650 2250 9900 2250
+Connection ~ 9900 2250
+Wire Wire Line
+	9400 3850 9000 3850
+Wire Wire Line
+	9000 3850 9000 3000
+Connection ~ 9000 3000
+Wire Wire Line
+	8700 3850 8700 1650
+Wire Wire Line
+	8700 1650 9600 1650
+Wire Wire Line
+	9600 1650 9600 1300
+Wire Wire Line
+	8850 1500 9150 1500
+Wire Wire Line
+	9150 1500 9150 1300
+Connection ~ 6600 900 
+Wire Wire Line
+	8750 900  8750 1150
+Wire Wire Line
+	8750 1100 8850 1100
+Connection ~ 8750 900 
+Connection ~ 8750 1100
+Wire Wire Line
+	9900 1100 10000 1100
+Wire Wire Line
+	10000 900  10000 1150
+Connection ~ 10000 900 
+Connection ~ 10000 1100
+$Comp
+L mosfet_p M15
+U 1 1 678D314C
+P 10950 1300
+F 0 "M15" H 10900 1350 50  0000 R CNN
+F 1 "mosfet_p" H 11000 1450 50  0000 R CNN
+F 2 "" H 11200 1400 29  0000 C CNN
+F 3 "" H 11000 1300 60  0000 C CNN
+	1    10950 1300
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	10700 900  10700 1150
+Wire Wire Line
+	10700 1100 10800 1100
+Connection ~ 10700 900 
+Connection ~ 10700 1100
+$Comp
+L mosfet_p M17
+U 1 1 678D333F
+P 11850 1300
+F 0 "M17" H 11800 1350 50  0000 R CNN
+F 1 "mosfet_p" H 11900 1450 50  0000 R CNN
+F 2 "" H 12100 1400 29  0000 C CNN
+F 3 "" H 11900 1300 60  0000 C CNN
+	1    11850 1300
+	1    0    0    1   
+$EndComp
+Wire Wire Line
+	11100 1300 11700 1300
+Wire Wire Line
+	12100 1150 12100 1100
+Wire Wire Line
+	12100 1100 12000 1100
+Wire Wire Line
+	12000 1100 12000 900 
+Connection ~ 12000 900 
+Wire Wire Line
+	10800 1500 10500 1500
+Wire Wire Line
+	10500 1500 10500 2800
+Wire Wire Line
+	5900 1350 5900 1850
+Wire Wire Line
+	5900 1850 10500 1850
+Connection ~ 10500 1850
+Connection ~ 5900 1350
+Wire Wire Line
+	11400 1300 11400 1700
+Wire Wire Line
+	11400 1700 10500 1700
+Connection ~ 10500 1700
+Connection ~ 11400 1300
+$Comp
+L mosfet_n M16
+U 1 1 678D3BFA
+P 11750 2800
+F 0 "M16" H 11750 2650 50  0000 R CNN
+F 1 "mosfet_n" H 11850 2750 50  0000 R CNN
+F 2 "" H 12050 2500 29  0000 C CNN
+F 3 "" H 11850 2600 60  0000 C CNN
+	1    11750 2800
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	12000 1500 12000 2800
+Wire Wire Line
+	12000 2800 11950 2800
+Wire Wire Line
+	10800 3000 11650 3000
+Wire Wire Line
+	11300 3000 11300 2300
+Wire Wire Line
+	11300 2300 12000 2300
+Connection ~ 12000 2300
+Connection ~ 11300 3000
+Wire Wire Line
+	9900 2350 11150 2350
+Wire Wire Line
+	11150 2350 11150 2000
+Wire Wire Line
+	11150 2000 12450 2000
+Connection ~ 9900 2350
+Wire Wire Line
+	12000 900  4900 900 
+$Comp
+L eSim_Diode D1
+U 1 1 678D4140
+P 11900 4000
+F 0 "D1" H 11900 4100 50  0000 C CNN
+F 1 "eSim_Diode" H 11900 3900 50  0000 C CNN
+F 2 "" H 11900 4000 60  0000 C CNN
+F 3 "" H 11900 4000 60  0000 C CNN
+	1    11900 4000
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	11950 3200 11950 3850
+Wire Wire Line
+	11950 3850 11900 3850
+Wire Wire Line
+	11900 4900 11900 4150
+Connection ~ 10500 4900
+Wire Wire Line
+	12050 4900 12050 3150
+Connection ~ 11900 4900
+Wire Wire Line
+	3800 3250 3200 3250
+Wire Wire Line
+	9600 4900 9600 5100
+Connection ~ 9600 4900
+Wire Wire Line
+	9500 900  9500 750 
+Connection ~ 9500 900 
+$Comp
+L PORT U1
+U 1 1 678D4637
+P 2900 2750
+F 0 "U1" H 2950 2850 30  0000 C CNN
+F 1 "PORT" H 2900 2750 30  0000 C CNN
+F 2 "" H 2900 2750 60  0000 C CNN
+F 3 "" H 2900 2750 60  0000 C CNN
+	1    2900 2750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 678D4692
+P 2950 3250
+F 0 "U1" H 3000 3350 30  0000 C CNN
+F 1 "PORT" H 2950 3250 30  0000 C CNN
+F 2 "" H 2950 3250 60  0000 C CNN
+F 3 "" H 2950 3250 60  0000 C CNN
+	2    2950 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 678D46E3
+P 9350 5100
+F 0 "U1" H 9400 5200 30  0000 C CNN
+F 1 "PORT" H 9350 5100 30  0000 C CNN
+F 2 "" H 9350 5100 60  0000 C CNN
+F 3 "" H 9350 5100 60  0000 C CNN
+	4    9350 5100
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 678D4744
+P 9250 750
+F 0 "U1" H 9300 850 30  0000 C CNN
+F 1 "PORT" H 9250 750 30  0000 C CNN
+F 2 "" H 9250 750 60  0000 C CNN
+F 3 "" H 9250 750 60  0000 C CNN
+	3    9250 750 
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 678D479D
+P 12700 2000
+F 0 "U1" H 12750 2100 30  0000 C CNN
+F 1 "PORT" H 12700 2000 30  0000 C CNN
+F 2 "" H 12700 2000 60  0000 C CNN
+F 3 "" H 12700 2000 60  0000 C CNN
+	5    12700 2000
+	-1   0    0    1   
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264.sub b/library/SubcircuitLibrary/TLC2264/TLC2264.sub
new file mode 100644
index 000000000..1fb20de6e
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264.sub
@@ -0,0 +1,33 @@
+* Subcircuit TLC2264
+.subckt TLC2264 net-_m5-pad2_ net-_m1-pad2_ net-_m1-pad4_ net-_d1-pad2_ net-_c1-pad2_ 
+* c:\fossee\esim\library\subcircuitlibrary\tlc2264\tlc2264.cir
+.include D.lib
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m4 net-_m11-pad1_ net-_m1-pad3_ net-_m4-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m2 net-_m1-pad3_ net-_m1-pad3_ net-_m2-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+r1  net-_m2-pad3_ net-_d1-pad2_ 10k
+r2  net-_m4-pad3_ net-_d1-pad2_ 10k
+m5 net-_m1-pad1_ net-_m5-pad2_ net-_m11-pad1_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m6 net-_m6-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m7 net-_m6-pad1_ net-_m11-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m8 net-_m6-pad1_ net-_m6-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m9 net-_m13-pad2_ net-_m6-pad1_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_d1-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+r4  net-_m11-pad2_ net-_d1-pad2_ 10k
+m12 net-_c1-pad2_ net-_m11-pad1_ net-_m11-pad2_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+m14 net-_m14-pad1_ net-_m14-pad2_ net-_m14-pad3_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+r5  net-_m14-pad3_ net-_d1-pad2_ 10k
+m13 net-_c1-pad2_ net-_m13-pad2_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+r3  net-_c1-pad1_ net-_m11-pad1_ 10k
+c1  net-_c1-pad1_ net-_c1-pad2_ 10u
+m15 net-_m14-pad1_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m17 net-_m14-pad2_ net-_m14-pad1_ net-_m1-pad4_ net-_m1-pad4_ CMOSP W=100u L=100u M=1
+m16 net-_m14-pad2_ net-_m14-pad2_ net-_d1-pad1_ net-_d1-pad2_ CMOSN W=100u L=100u M=1
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+* Control Statements
+
+.ends TLC2264
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/TLC2264/TLC2264_Previous_Values.xml b/library/SubcircuitLibrary/TLC2264/TLC2264_Previous_Values.xml
new file mode 100644
index 000000000..981bfd88e
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/TLC2264_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m1><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m5><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m6><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m3><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m7><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m11><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m12><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m14><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m13><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m10><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m15><m17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m17><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m16><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/TLC2264/analysis b/library/SubcircuitLibrary/TLC2264/analysis
new file mode 100644
index 000000000..ebd5c0a94
--- /dev/null
+++ b/library/SubcircuitLibrary/TLC2264/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/lm3909/D.lib b/library/SubcircuitLibrary/lm3909/D.lib
new file mode 100644
index 000000000..f53bf3e03
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/lm3909/LED.lib b/library/SubcircuitLibrary/lm3909/LED.lib
new file mode 100644
index 000000000..000831b21
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/LED.lib
@@ -0,0 +1,2 @@
+.model LED D(is=4.36625E-25 rs=3.00014 n=1.38167 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/lm3909/NPN.lib b/library/SubcircuitLibrary/lm3909/NPN.lib
new file mode 100644
index 000000000..be5f3073a
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p 
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/lm3909/PNP.lib b/library/SubcircuitLibrary/lm3909/PNP.lib
new file mode 100644
index 000000000..7edda0eab
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/lm3909/ZenerD1N750.lib b/library/SubcircuitLibrary/lm3909/ZenerD1N750.lib
new file mode 100644
index 000000000..890c37fe2
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/ZenerD1N750.lib
@@ -0,0 +1,3 @@
+.model D1N750	D( Is=880.5E-18 Rs=.25 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516 
++ Vj=.75 Fc=.5 Isr=1.859n Nr=2 Bv=8.1 Ibv=20.245m Nbv=1.6989 Ibvl=1.9556m 
++ Nbvl=14.976 Tbv1=-21.277u) 
diff --git a/library/SubcircuitLibrary/lm3909/analysis b/library/SubcircuitLibrary/lm3909/analysis
new file mode 100644
index 000000000..ebd5c0a94
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/lm3909/lm3909-cache.lib b/library/SubcircuitLibrary/lm3909/lm3909-cache.lib
new file mode 100644
index 000000000..fa8f67b21
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909-cache.lib
@@ -0,0 +1,126 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.bak b/library/SubcircuitLibrary/lm3909/lm3909.bak
new file mode 100644
index 000000000..15eb378bd
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.bak
@@ -0,0 +1,421 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:lm3909-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 67700C9C
+P 4200 2200
+F 0 "Q1" H 4100 2250 50  0000 R CNN
+F 1 "eSim_NPN" H 4150 2350 50  0000 R CNN
+F 2 "" H 4400 2300 29  0000 C CNN
+F 3 "" H 4200 2200 60  0000 C CNN
+	1    4200 2200
+	-1   0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 67700D2B
+P 3650 1600
+F 0 "R1" H 3700 1730 50  0000 C CNN
+F 1 "12" H 3700 1550 50  0000 C CNN
+F 2 "" H 3700 1580 30  0000 C CNN
+F 3 "" V 3700 1650 30  0000 C CNN
+	1    3650 1600
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R4
+U 1 1 67701969
+P 4500 3750
+F 0 "R4" H 4550 3880 50  0000 C CNN
+F 1 "20k" H 4550 3700 50  0000 C CNN
+F 2 "" H 4550 3730 30  0000 C CNN
+F 3 "" V 4550 3800 30  0000 C CNN
+	1    4500 3750
+	0    -1   -1   0   
+$EndComp
+$Comp
+L resistor R2
+U 1 1 67701A51
+P 4100 3750
+F 0 "R2" H 4150 3880 50  0000 C CNN
+F 1 "6k" H 4150 3700 50  0000 C CNN
+F 2 "" H 4150 3730 30  0000 C CNN
+F 3 "" V 4150 3800 30  0000 C CNN
+	1    4100 3750
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R3
+U 1 1 67701D00
+P 4100 4550
+F 0 "R3" H 4150 4680 50  0000 C CNN
+F 1 "3k" H 4150 4500 50  0000 C CNN
+F 2 "" H 4150 4530 30  0000 C CNN
+F 3 "" V 4150 4600 30  0000 C CNN
+	1    4100 4550
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R5
+U 1 1 677021B1
+P 4600 2500
+F 0 "R5" H 4650 2630 50  0000 C CNN
+F 1 "20k" H 4650 2450 50  0000 C CNN
+F 2 "" H 4650 2480 30  0000 C CNN
+F 3 "" V 4650 2550 30  0000 C CNN
+	1    4600 2500
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R6
+U 1 1 677022F5
+P 4600 2950
+F 0 "R6" H 4650 3080 50  0000 C CNN
+F 1 "10k" H 4650 2900 50  0000 C CNN
+F 2 "" H 4650 2930 30  0000 C CNN
+F 3 "" V 4650 3000 30  0000 C CNN
+	1    4600 2950
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 6770291C
+P 5100 2800
+F 0 "Q2" H 5000 2850 50  0000 R CNN
+F 1 "eSim_NPN" H 5050 2950 50  0000 R CNN
+F 2 "" H 5300 2900 29  0000 C CNN
+F 3 "" H 5100 2800 60  0000 C CNN
+	1    5100 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R7
+U 1 1 677029E4
+P 5150 3150
+F 0 "R7" H 5200 3280 50  0000 C CNN
+F 1 "100" H 5200 3100 50  0000 C CNN
+F 2 "" H 5200 3130 30  0000 C CNN
+F 3 "" V 5200 3200 30  0000 C CNN
+	1    5150 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R8
+U 1 1 67702B69
+P 5450 1850
+F 0 "R8" H 5500 1980 50  0000 C CNN
+F 1 "400" H 5500 1800 50  0000 C CNN
+F 2 "" H 5500 1830 30  0000 C CNN
+F 3 "" V 5500 1900 30  0000 C CNN
+	1    5450 1850
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R9
+U 1 1 67702BA2
+P 5450 2350
+F 0 "R9" H 5500 2480 50  0000 C CNN
+F 1 "400" H 5500 2300 50  0000 C CNN
+F 2 "" H 5500 2330 30  0000 C CNN
+F 3 "" V 5500 2400 30  0000 C CNN
+	1    5450 2350
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 67703291
+P 5600 4550
+F 0 "Q3" H 5500 4600 50  0000 R CNN
+F 1 "eSim_NPN" H 5550 4700 50  0000 R CNN
+F 2 "" H 5800 4650 29  0000 C CNN
+F 3 "" H 5600 4550 60  0000 C CNN
+	1    5600 4550
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	3650 2550 5500 2550
+Wire Wire Line
+	3400 1550 3550 1550
+Wire Wire Line
+	3400 4350 3400 4250
+Wire Wire Line
+	4100 2000 4100 1550
+Wire Wire Line
+	3850 1550 7350 1550
+Wire Wire Line
+	4100 2400 4100 3250
+Wire Wire Line
+	4100 3250 4650 3250
+Connection ~ 4450 3250
+Wire Wire Line
+	4450 3250 4450 3550
+Wire Wire Line
+	3850 3400 5200 3400
+Wire Wire Line
+	4150 3400 4150 3650
+Connection ~ 4150 3400
+Wire Wire Line
+	4150 3950 4150 4450
+Connection ~ 4150 4250
+Wire Wire Line
+	4150 4750 4150 5100
+Wire Wire Line
+	4150 5100 7700 5100
+Wire Wire Line
+	4450 3850 4450 5100
+Connection ~ 4450 5100
+Wire Wire Line
+	4650 3250 4650 3150
+Connection ~ 4650 3250
+Wire Wire Line
+	4650 2400 4650 2200
+Wire Wire Line
+	4400 2200 5500 2200
+Wire Wire Line
+	4650 2700 4650 2850
+Wire Wire Line
+	4650 2800 4900 2800
+Connection ~ 4650 2800
+Wire Wire Line
+	5200 3000 5200 3050
+Wire Wire Line
+	5200 3400 5200 3350
+Connection ~ 4650 2200
+Connection ~ 5500 2200
+Wire Wire Line
+	5500 2050 5500 2250
+Wire Wire Line
+	5500 2550 5500 4350
+Wire Wire Line
+	5500 1550 5500 1750
+Connection ~ 4100 1550
+Connection ~ 5500 1550
+Connection ~ 4850 5100
+Wire Wire Line
+	4850 4250 4850 3900
+Wire Wire Line
+	4850 3900 5500 3900
+Connection ~ 5500 3900
+Wire Wire Line
+	5500 4750 5500 5100
+Connection ~ 5500 5100
+Connection ~ 6000 1550
+Connection ~ 3400 4250
+Connection ~ 3800 2550
+Wire Wire Line
+	3400 1700 3400 1550
+Connection ~ 3400 1550
+Wire Wire Line
+	7350 1550 7350 1750
+Wire Wire Line
+	7700 5100 7700 4900
+Wire Wire Line
+	3400 4250 4150 4250
+Wire Wire Line
+	3650 2600 3650 2550
+$Comp
+L PORT U1
+U 2 1 677EB797
+P 3400 2600
+F 0 "U1" H 3450 2700 30  0000 C CNN
+F 1 "PORT" H 3400 2600 30  0000 C CNN
+F 2 "" H 3400 2600 60  0000 C CNN
+F 3 "" H 3400 2600 60  0000 C CNN
+	2    3400 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 677EB7DE
+P 8050 3250
+F 0 "U1" H 8100 3350 30  0000 C CNN
+F 1 "PORT" H 8050 3250 30  0000 C CNN
+F 2 "" H 8050 3250 60  0000 C CNN
+F 3 "" H 8050 3250 60  0000 C CNN
+	3    8050 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 677EB823
+P 8050 2950
+F 0 "U1" H 8100 3050 30  0000 C CNN
+F 1 "PORT" H 8050 2950 30  0000 C CNN
+F 2 "" H 8050 2950 60  0000 C CNN
+F 3 "" H 8050 2950 60  0000 C CNN
+	7    8050 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 677EBBDB
+P 3150 1700
+F 0 "U1" H 3200 1800 30  0000 C CNN
+F 1 "PORT" H 3150 1700 30  0000 C CNN
+F 2 "" H 3150 1700 60  0000 C CNN
+F 3 "" H 3150 1700 60  0000 C CNN
+	6    3150 1700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 677EBC53
+P 7100 1750
+F 0 "U1" H 7150 1850 30  0000 C CNN
+F 1 "PORT" H 7100 1750 30  0000 C CNN
+F 2 "" H 7100 1750 60  0000 C CNN
+F 3 "" H 7100 1750 60  0000 C CNN
+	5    7100 1750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 677EBC9C
+P 3150 4350
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+F 1 "PORT" H 3150 4350 30  0000 C CNN
+F 2 "" H 3150 4350 60  0000 C CNN
+F 3 "" H 3150 4350 60  0000 C CNN
+	1    3150 4350
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 677EBCE5
+P 3600 3400
+F 0 "U1" H 3650 3500 30  0000 C CNN
+F 1 "PORT" H 3600 3400 30  0000 C CNN
+F 2 "" H 3600 3400 60  0000 C CNN
+F 3 "" H 3600 3400 60  0000 C CNN
+	8    3600 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 677EBD26
+P 7450 4900
+F 0 "U1" H 7500 5000 30  0000 C CNN
+F 1 "PORT" H 7450 4900 30  0000 C CNN
+F 2 "" H 7450 4900 60  0000 C CNN
+F 3 "" H 7450 4900 60  0000 C CNN
+	4    7450 4900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4850 4550 4850 5100
+$Comp
+L eSim_Diode D1
+U 1 1 677E92CF
+P 4850 4400
+F 0 "D1" H 4850 4500 50  0000 C CNN
+F 1 "6.5" H 4850 4300 50  0000 C CNN
+F 2 "" H 4850 4400 60  0000 C CNN
+F 3 "" H 4850 4400 60  0000 C CNN
+	1    4850 4400
+	0    -1   -1   0   
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 677EBCC1
+P 6200 2950
+F 0 "Q5" H 6100 3000 50  0000 R CNN
+F 1 "eSim_PNP" H 6150 3100 50  0000 R CNN
+F 2 "" H 6400 3050 29  0000 C CNN
+F 3 "" H 6200 2950 60  0000 C CNN
+	1    6200 2950
+	0    -1   1    0   
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 677EBD0C
+P 6200 2350
+F 0 "Q4" H 6100 2400 50  0000 R CNN
+F 1 "eSim_PNP" H 6150 2500 50  0000 R CNN
+F 2 "" H 6400 2450 29  0000 C CNN
+F 3 "" H 6200 2350 60  0000 C CNN
+	1    6200 2350
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	6200 2550 6200 2750
+Wire Wire Line
+	6400 1550 6400 3050
+Connection ~ 6200 2600
+Wire Wire Line
+	5800 4550 6600 4550
+Wire Wire Line
+	6600 4550 6600 2250
+Wire Wire Line
+	6600 2250 6500 2250
+Connection ~ 5950 1550
+Connection ~ 6400 2450
+Connection ~ 6400 1550
+Connection ~ 6400 2250
+Wire Wire Line
+	6200 2600 5200 2600
+Wire Wire Line
+	6000 3050 5800 3050
+Wire Wire Line
+	5800 3050 5800 2600
+Connection ~ 5800 2600
+Wire Wire Line
+	6000 2250 6000 2150
+Wire Wire Line
+	6000 2150 6500 2150
+Wire Wire Line
+	6500 2150 6500 2250
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.cir b/library/SubcircuitLibrary/lm3909/lm3909.cir
new file mode 100644
index 000000000..731ae0876
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.cir
@@ -0,0 +1,26 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\lm3909\lm3909.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 01/09/25 19:06:02
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
+R1  Net-_R1-Pad1_ Net-_Q1-Pad1_ 12		
+R4  Net-_D1-Pad1_ Net-_Q1-Pad3_ 20k		
+R2  Net-_R2-Pad1_ Net-_R2-Pad2_ 6k		
+R3  Net-_R2-Pad2_ Net-_D1-Pad1_ 3k		
+R5  Net-_Q1-Pad2_ Net-_Q2-Pad2_ 20k		
+R6  Net-_Q2-Pad2_ Net-_Q1-Pad3_ 10k		
+Q2  Net-_Q2-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
+R7  Net-_Q2-Pad3_ Net-_R2-Pad1_ 100		
+R8  Net-_Q1-Pad1_ Net-_Q1-Pad2_ 400		
+R9  Net-_Q1-Pad2_ Net-_D1-Pad2_ 400		
+Q3  Net-_D1-Pad2_ Net-_Q3-Pad2_ Net-_D1-Pad1_ eSim_NPN		
+U1  Net-_R2-Pad2_ Net-_D1-Pad2_ ? Net-_D1-Pad1_ Net-_Q1-Pad1_ Net-_R1-Pad1_ ? Net-_R2-Pad1_ PORT		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+Q5  Net-_Q2-Pad1_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_PNP		
+Q4  Net-_Q3-Pad2_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_PNP		
+
+.end
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.cir.out b/library/SubcircuitLibrary/lm3909/lm3909.cir.out
new file mode 100644
index 000000000..4bec75594
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.cir.out
@@ -0,0 +1,30 @@
+* c:\fossee\esim\library\subcircuitlibrary\lm3909\lm3909.cir
+
+.include NPN.lib
+.include ZenerD1N750.lib
+.include PNP.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+r1  net-_r1-pad1_ net-_q1-pad1_ 12
+r4  net-_d1-pad1_ net-_q1-pad3_ 20k
+r2  net-_r2-pad1_ net-_r2-pad2_ 6k
+r3  net-_r2-pad2_ net-_d1-pad1_ 3k
+r5  net-_q1-pad2_ net-_q2-pad2_ 20k
+r6  net-_q2-pad2_ net-_q1-pad3_ 10k
+q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+r7  net-_q2-pad3_ net-_r2-pad1_ 100
+r8  net-_q1-pad1_ net-_q1-pad2_ 400
+r9  net-_q1-pad2_ net-_d1-pad2_ 400
+q3 net-_d1-pad2_ net-_q3-pad2_ net-_d1-pad1_ Q2N2222
+* u1  net-_r2-pad2_ net-_d1-pad2_ ? net-_d1-pad1_ net-_q1-pad1_ net-_r1-pad1_ ? net-_r2-pad1_ port
+d1 net-_d1-pad1_ net-_d1-pad2_ D1N750
+q5 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2907A
+q4 net-_q3-pad2_ net-_q2-pad1_ net-_q1-pad1_ Q2N2907A
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.pro b/library/SubcircuitLibrary/lm3909/lm3909.pro
new file mode 100644
index 000000000..e27a398be
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.sch b/library/SubcircuitLibrary/lm3909/lm3909.sch
new file mode 100644
index 000000000..583711fad
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.sch
@@ -0,0 +1,421 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:lm3909-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 67700C9C
+P 4200 2200
+F 0 "Q1" H 4100 2250 50  0000 R CNN
+F 1 "eSim_NPN" H 4150 2350 50  0000 R CNN
+F 2 "" H 4400 2300 29  0000 C CNN
+F 3 "" H 4200 2200 60  0000 C CNN
+	1    4200 2200
+	-1   0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 67700D2B
+P 3650 1600
+F 0 "R1" H 3700 1730 50  0000 C CNN
+F 1 "12" H 3700 1550 50  0000 C CNN
+F 2 "" H 3700 1580 30  0000 C CNN
+F 3 "" V 3700 1650 30  0000 C CNN
+	1    3650 1600
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R4
+U 1 1 67701969
+P 4500 3750
+F 0 "R4" H 4550 3880 50  0000 C CNN
+F 1 "20k" H 4550 3700 50  0000 C CNN
+F 2 "" H 4550 3730 30  0000 C CNN
+F 3 "" V 4550 3800 30  0000 C CNN
+	1    4500 3750
+	0    -1   -1   0   
+$EndComp
+$Comp
+L resistor R2
+U 1 1 67701A51
+P 4100 3750
+F 0 "R2" H 4150 3880 50  0000 C CNN
+F 1 "6k" H 4150 3700 50  0000 C CNN
+F 2 "" H 4150 3730 30  0000 C CNN
+F 3 "" V 4150 3800 30  0000 C CNN
+	1    4100 3750
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R3
+U 1 1 67701D00
+P 4100 4550
+F 0 "R3" H 4150 4680 50  0000 C CNN
+F 1 "3k" H 4150 4500 50  0000 C CNN
+F 2 "" H 4150 4530 30  0000 C CNN
+F 3 "" V 4150 4600 30  0000 C CNN
+	1    4100 4550
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R5
+U 1 1 677021B1
+P 4600 2500
+F 0 "R5" H 4650 2630 50  0000 C CNN
+F 1 "20k" H 4650 2450 50  0000 C CNN
+F 2 "" H 4650 2480 30  0000 C CNN
+F 3 "" V 4650 2550 30  0000 C CNN
+	1    4600 2500
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R6
+U 1 1 677022F5
+P 4600 2950
+F 0 "R6" H 4650 3080 50  0000 C CNN
+F 1 "10k" H 4650 2900 50  0000 C CNN
+F 2 "" H 4650 2930 30  0000 C CNN
+F 3 "" V 4650 3000 30  0000 C CNN
+	1    4600 2950
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 6770291C
+P 5100 2800
+F 0 "Q2" H 5000 2850 50  0000 R CNN
+F 1 "eSim_NPN" H 5050 2950 50  0000 R CNN
+F 2 "" H 5300 2900 29  0000 C CNN
+F 3 "" H 5100 2800 60  0000 C CNN
+	1    5100 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R7
+U 1 1 677029E4
+P 5150 3150
+F 0 "R7" H 5200 3280 50  0000 C CNN
+F 1 "100" H 5200 3100 50  0000 C CNN
+F 2 "" H 5200 3130 30  0000 C CNN
+F 3 "" V 5200 3200 30  0000 C CNN
+	1    5150 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R8
+U 1 1 67702B69
+P 5450 1850
+F 0 "R8" H 5500 1980 50  0000 C CNN
+F 1 "400" H 5500 1800 50  0000 C CNN
+F 2 "" H 5500 1830 30  0000 C CNN
+F 3 "" V 5500 1900 30  0000 C CNN
+	1    5450 1850
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R9
+U 1 1 67702BA2
+P 5450 2350
+F 0 "R9" H 5500 2480 50  0000 C CNN
+F 1 "400" H 5500 2300 50  0000 C CNN
+F 2 "" H 5500 2330 30  0000 C CNN
+F 3 "" V 5500 2400 30  0000 C CNN
+	1    5450 2350
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 67703291
+P 5600 4550
+F 0 "Q3" H 5500 4600 50  0000 R CNN
+F 1 "eSim_NPN" H 5550 4700 50  0000 R CNN
+F 2 "" H 5800 4650 29  0000 C CNN
+F 3 "" H 5600 4550 60  0000 C CNN
+	1    5600 4550
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	3650 2550 5500 2550
+Wire Wire Line
+	3400 1550 3550 1550
+Wire Wire Line
+	3400 4350 3400 4250
+Wire Wire Line
+	4100 2000 4100 1550
+Wire Wire Line
+	3850 1550 7350 1550
+Wire Wire Line
+	4100 2400 4100 3250
+Wire Wire Line
+	4100 3250 4650 3250
+Connection ~ 4450 3250
+Wire Wire Line
+	4450 3250 4450 3550
+Wire Wire Line
+	3850 3400 5200 3400
+Wire Wire Line
+	4150 3400 4150 3650
+Connection ~ 4150 3400
+Wire Wire Line
+	4150 3950 4150 4450
+Connection ~ 4150 4250
+Wire Wire Line
+	4150 4750 4150 5100
+Wire Wire Line
+	4150 5100 7700 5100
+Wire Wire Line
+	4450 3850 4450 5100
+Connection ~ 4450 5100
+Wire Wire Line
+	4650 3250 4650 3150
+Connection ~ 4650 3250
+Wire Wire Line
+	4650 2400 4650 2200
+Wire Wire Line
+	4400 2200 5500 2200
+Wire Wire Line
+	4650 2700 4650 2850
+Wire Wire Line
+	4650 2800 4900 2800
+Connection ~ 4650 2800
+Wire Wire Line
+	5200 3000 5200 3050
+Wire Wire Line
+	5200 3400 5200 3350
+Connection ~ 4650 2200
+Connection ~ 5500 2200
+Wire Wire Line
+	5500 2050 5500 2250
+Wire Wire Line
+	5500 2550 5500 4350
+Wire Wire Line
+	5500 1550 5500 1750
+Connection ~ 4100 1550
+Connection ~ 5500 1550
+Connection ~ 4850 5100
+Wire Wire Line
+	4850 4250 4850 3900
+Wire Wire Line
+	4850 3900 5500 3900
+Connection ~ 5500 3900
+Wire Wire Line
+	5500 4750 5500 5100
+Connection ~ 5500 5100
+Connection ~ 6000 1550
+Connection ~ 3400 4250
+Connection ~ 3800 2550
+Wire Wire Line
+	3400 1700 3400 1550
+Connection ~ 3400 1550
+Wire Wire Line
+	7350 1550 7350 1750
+Wire Wire Line
+	7700 5100 7700 4900
+Wire Wire Line
+	3400 4250 4150 4250
+Wire Wire Line
+	3650 2600 3650 2550
+$Comp
+L PORT U1
+U 2 1 677EB797
+P 3400 2600
+F 0 "U1" H 3450 2700 30  0000 C CNN
+F 1 "PORT" H 3400 2600 30  0000 C CNN
+F 2 "" H 3400 2600 60  0000 C CNN
+F 3 "" H 3400 2600 60  0000 C CNN
+	2    3400 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 677EB7DE
+P 8050 3250
+F 0 "U1" H 8100 3350 30  0000 C CNN
+F 1 "PORT" H 8050 3250 30  0000 C CNN
+F 2 "" H 8050 3250 60  0000 C CNN
+F 3 "" H 8050 3250 60  0000 C CNN
+	3    8050 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 677EB823
+P 8050 2950
+F 0 "U1" H 8100 3050 30  0000 C CNN
+F 1 "PORT" H 8050 2950 30  0000 C CNN
+F 2 "" H 8050 2950 60  0000 C CNN
+F 3 "" H 8050 2950 60  0000 C CNN
+	7    8050 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 677EBBDB
+P 3150 1700
+F 0 "U1" H 3200 1800 30  0000 C CNN
+F 1 "PORT" H 3150 1700 30  0000 C CNN
+F 2 "" H 3150 1700 60  0000 C CNN
+F 3 "" H 3150 1700 60  0000 C CNN
+	6    3150 1700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 677EBC53
+P 7100 1750
+F 0 "U1" H 7150 1850 30  0000 C CNN
+F 1 "PORT" H 7100 1750 30  0000 C CNN
+F 2 "" H 7100 1750 60  0000 C CNN
+F 3 "" H 7100 1750 60  0000 C CNN
+	5    7100 1750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 677EBC9C
+P 3150 4350
+F 0 "U1" H 3200 4450 30  0000 C CNN
+F 1 "PORT" H 3150 4350 30  0000 C CNN
+F 2 "" H 3150 4350 60  0000 C CNN
+F 3 "" H 3150 4350 60  0000 C CNN
+	1    3150 4350
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 677EBCE5
+P 3600 3400
+F 0 "U1" H 3650 3500 30  0000 C CNN
+F 1 "PORT" H 3600 3400 30  0000 C CNN
+F 2 "" H 3600 3400 60  0000 C CNN
+F 3 "" H 3600 3400 60  0000 C CNN
+	8    3600 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 677EBD26
+P 7450 4900
+F 0 "U1" H 7500 5000 30  0000 C CNN
+F 1 "PORT" H 7450 4900 30  0000 C CNN
+F 2 "" H 7450 4900 60  0000 C CNN
+F 3 "" H 7450 4900 60  0000 C CNN
+	4    7450 4900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4850 4550 4850 5100
+$Comp
+L eSim_Diode D1
+U 1 1 677E92CF
+P 4850 4400
+F 0 "D1" H 4850 4500 50  0000 C CNN
+F 1 "eSim_Diode" H 4850 4300 50  0000 C CNN
+F 2 "" H 4850 4400 60  0000 C CNN
+F 3 "" H 4850 4400 60  0000 C CNN
+	1    4850 4400
+	0    -1   -1   0   
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 677EBCC1
+P 6200 2950
+F 0 "Q5" H 6100 3000 50  0000 R CNN
+F 1 "eSim_PNP" H 6150 3100 50  0000 R CNN
+F 2 "" H 6400 3050 29  0000 C CNN
+F 3 "" H 6200 2950 60  0000 C CNN
+	1    6200 2950
+	0    -1   1    0   
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 677EBD0C
+P 6200 2350
+F 0 "Q4" H 6100 2400 50  0000 R CNN
+F 1 "eSim_PNP" H 6150 2500 50  0000 R CNN
+F 2 "" H 6400 2450 29  0000 C CNN
+F 3 "" H 6200 2350 60  0000 C CNN
+	1    6200 2350
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	6200 2550 6200 2750
+Wire Wire Line
+	6400 1550 6400 3050
+Connection ~ 6200 2600
+Wire Wire Line
+	5800 4550 6600 4550
+Wire Wire Line
+	6600 4550 6600 2250
+Wire Wire Line
+	6600 2250 6500 2250
+Connection ~ 5950 1550
+Connection ~ 6400 2450
+Connection ~ 6400 1550
+Connection ~ 6400 2250
+Wire Wire Line
+	6200 2600 5200 2600
+Wire Wire Line
+	6000 3050 5800 3050
+Wire Wire Line
+	5800 3050 5800 2600
+Connection ~ 5800 2600
+Wire Wire Line
+	6000 2250 6000 2150
+Wire Wire Line
+	6000 2150 6500 2150
+Wire Wire Line
+	6500 2150 6500 2250
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/lm3909/lm3909.sub b/library/SubcircuitLibrary/lm3909/lm3909.sub
new file mode 100644
index 000000000..2c6d0962b
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909.sub
@@ -0,0 +1,24 @@
+* Subcircuit lm3909
+.subckt lm3909 net-_r2-pad2_ net-_d1-pad2_ ? net-_d1-pad1_ net-_q1-pad1_ net-_r1-pad1_ ? net-_r2-pad1_ 
+* c:\fossee\esim\library\subcircuitlibrary\lm3909\lm3909.cir
+.include NPN.lib
+.include ZenerD1N750.lib
+.include PNP.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+r1  net-_r1-pad1_ net-_q1-pad1_ 12
+r4  net-_d1-pad1_ net-_q1-pad3_ 20k
+r2  net-_r2-pad1_ net-_r2-pad2_ 6k
+r3  net-_r2-pad2_ net-_d1-pad1_ 3k
+r5  net-_q1-pad2_ net-_q2-pad2_ 20k
+r6  net-_q2-pad2_ net-_q1-pad3_ 10k
+q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+r7  net-_q2-pad3_ net-_r2-pad1_ 100
+r8  net-_q1-pad1_ net-_q1-pad2_ 400
+r9  net-_q1-pad2_ net-_d1-pad2_ 400
+q3 net-_d1-pad2_ net-_q3-pad2_ net-_d1-pad1_ Q2N2222
+d1 net-_d1-pad1_ net-_d1-pad2_ D1N750
+q5 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2907A
+q4 net-_q3-pad2_ net-_q2-pad1_ net-_q1-pad1_ Q2N2907A
+* Control Statements
+
+.ends lm3909
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/lm3909/lm3909_Previous_Values.xml b/library/SubcircuitLibrary/lm3909/lm3909_Previous_Values.xml
new file mode 100644
index 000000000..ca744208f
--- /dev/null
+++ b/library/SubcircuitLibrary/lm3909/lm3909_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\ZenerD1N750.lib</field></d1><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q4></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mc1489A/D.lib b/library/SubcircuitLibrary/mc1489A/D.lib
new file mode 100644
index 000000000..f53bf3e03
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/mc1489A/NPN.lib b/library/SubcircuitLibrary/mc1489A/NPN.lib
new file mode 100644
index 000000000..be5f3073a
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p 
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/mc1489A/analysis b/library/SubcircuitLibrary/mc1489A/analysis
new file mode 100644
index 000000000..ebd5c0a94
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A-cache.lib b/library/SubcircuitLibrary/mc1489A/mc1489A-cache.lib
new file mode 100644
index 000000000..1a8fd3d14
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A-cache.lib
@@ -0,0 +1,61 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# MC1489A_0
+#
+DEF MC1489A_0 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "MC1489A_0" 0 -100 60 H V C CNN
+F2 "" 0 -100 60 H I C CNN
+F3 "" 0 -100 60 H I C CNN
+DRAW
+S -500 150 550 -300 0 1 0 N
+X input 1 -700 -100 200 R 50 50 1 1 I
+X response_ctrl 2 750 -200 200 L 50 50 1 1 I
+X vcc 3 0 -500 200 U 50 50 1 1 O
+X out 4 300 350 200 D 50 50 1 1 I
+X gnd 5 -300 350 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A.cir b/library/SubcircuitLibrary/mc1489A/mc1489A.cir
new file mode 100644
index 000000000..e2f73d973
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A.cir
@@ -0,0 +1,15 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A\mc1489A.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/09/25 01:17:36
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ gnd Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT		
+X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad14_ Net-_U1-Pad3_ gnd MC1489A_0		
+X3  Net-_U1-Pad10_ Net-_U1-Pad9_ Net-_U1-Pad14_ Net-_U1-Pad8_ gnd MC1489A_0		
+X2  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad14_ Net-_U1-Pad6_ gnd MC1489A_0		
+X4  Net-_U1-Pad13_ Net-_U1-Pad12_ Net-_U1-Pad14_ Net-_U1-Pad11_ gnd MC1489A_0		
+
+.end
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A.cir.out b/library/SubcircuitLibrary/mc1489A/mc1489A.cir.out
new file mode 100644
index 000000000..4180fe530
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A.cir.out
@@ -0,0 +1,17 @@
+* c:\fossee\esim\library\subcircuitlibrary\mc1489a\mc1489a.cir
+
+.include mc1489A_0.sub
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ gnd net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad14_ net-_u1-pad3_ gnd mc1489A_0
+x3 net-_u1-pad10_ net-_u1-pad9_ net-_u1-pad14_ net-_u1-pad8_ gnd mc1489A_0
+x2 net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad14_ net-_u1-pad6_ gnd mc1489A_0
+x4 net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad14_ net-_u1-pad11_ gnd mc1489A_0
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A.pro b/library/SubcircuitLibrary/mc1489A/mc1489A.pro
new file mode 100644
index 000000000..e27a398be
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A.sch b/library/SubcircuitLibrary/mc1489A/mc1489A.sch
new file mode 100644
index 000000000..20b29b2ef
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A.sch
@@ -0,0 +1,312 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Wire Wire Line
+	5550 4150 5550 4900
+Wire Wire Line
+	7700 4200 7700 4850
+Wire Wire Line
+	7700 4850 7750 4850
+Wire Wire Line
+	5550 4500 7700 4500
+Connection ~ 7700 4500
+Connection ~ 5550 4500
+Wire Wire Line
+	8050 5700 8050 5900
+Wire Wire Line
+	8050 5900 8150 5900
+Wire Wire Line
+	7400 3350 7400 3200
+Wire Wire Line
+	5250 3300 5250 3050
+Wire Wire Line
+	5850 5750 5850 5950
+Text GLabel 5850 5950 3    60   Input ~ 0
+gnd
+Text GLabel 8150 5900 2    60   Input ~ 0
+gnd
+Text GLabel 7400 3200 0    60   Input ~ 0
+gnd
+Text GLabel 5250 3050 0    60   Input ~ 0
+gnd
+Wire Wire Line
+	4850 3750 4600 3750
+Wire Wire Line
+	4800 5200 4550 5200
+Wire Wire Line
+	5250 5750 5000 5750
+Wire Wire Line
+	6250 5300 6250 5200
+Wire Wire Line
+	7000 5150 7000 5050
+Wire Wire Line
+	7450 5700 7300 5700
+Wire Wire Line
+	8450 5250 8450 5050
+Wire Wire Line
+	8450 3900 8450 4000
+Wire Wire Line
+	7000 3800 7000 3950
+Wire Wire Line
+	8000 3350 8150 3350
+Wire Wire Line
+	5850 3300 5950 3300
+Wire Wire Line
+	6300 3850 6300 3700
+$Comp
+L PORT U1
+U 3 1 679A35F2
+P 6200 3300
+F 0 "U1" H 6250 3400 30  0000 C CNN
+F 1 "PORT" H 6200 3300 30  0000 C CNN
+F 2 "" H 6200 3300 60  0000 C CNN
+F 3 "" H 6200 3300 60  0000 C CNN
+	3    6200 3300
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 6 1 679A361D
+P 4750 5750
+F 0 "U1" H 4800 5850 30  0000 C CNN
+F 1 "PORT" H 4750 5750 30  0000 C CNN
+F 2 "" H 4750 5750 60  0000 C CNN
+F 3 "" H 4750 5750 60  0000 C CNN
+	6    4750 5750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 679A363E
+P 6000 5200
+F 0 "U1" H 6050 5300 30  0000 C CNN
+F 1 "PORT" H 6000 5200 30  0000 C CNN
+F 2 "" H 6000 5200 60  0000 C CNN
+F 3 "" H 6000 5200 60  0000 C CNN
+	4    6000 5200
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 679A3661
+P 4300 5200
+F 0 "U1" H 4350 5300 30  0000 C CNN
+F 1 "PORT" H 4300 5200 30  0000 C CNN
+F 2 "" H 4300 5200 60  0000 C CNN
+F 3 "" H 4300 5200 60  0000 C CNN
+	5    4300 5200
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 679A3686
+P 4350 3750
+F 0 "U1" H 4400 3850 30  0000 C CNN
+F 1 "PORT" H 4350 3750 30  0000 C CNN
+F 2 "" H 4350 3750 60  0000 C CNN
+F 3 "" H 4350 3750 60  0000 C CNN
+	1    4350 3750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 679A36AD
+P 6050 3700
+F 0 "U1" H 6100 3800 30  0000 C CNN
+F 1 "PORT" H 6050 3700 30  0000 C CNN
+F 2 "" H 6050 3700 60  0000 C CNN
+F 3 "" H 6050 3700 60  0000 C CNN
+	2    6050 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 679A36D6
+P 4900 3250
+F 0 "U1" H 4950 3350 30  0000 C CNN
+F 1 "PORT" H 4900 3250 30  0000 C CNN
+F 2 "" H 4900 3250 60  0000 C CNN
+F 3 "" H 4900 3250 60  0000 C CNN
+	7    4900 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 10 1 679A3701
+P 6750 3950
+F 0 "U1" H 6800 4050 30  0000 C CNN
+F 1 "PORT" H 6750 3950 30  0000 C CNN
+F 2 "" H 6750 3950 60  0000 C CNN
+F 3 "" H 6750 3950 60  0000 C CNN
+	10   6750 3950
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 12 1 679A372E
+P 6750 5050
+F 0 "U1" H 6800 5150 30  0000 C CNN
+F 1 "PORT" H 6750 5050 30  0000 C CNN
+F 2 "" H 6750 5050 60  0000 C CNN
+F 3 "" H 6750 5050 60  0000 C CNN
+	12   6750 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 11 1 679A375D
+P 7050 5700
+F 0 "U1" H 7100 5800 30  0000 C CNN
+F 1 "PORT" H 7050 5700 30  0000 C CNN
+F 2 "" H 7050 5700 60  0000 C CNN
+F 3 "" H 7050 5700 60  0000 C CNN
+	11   7050 5700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 13 1 679A3796
+P 8200 5050
+F 0 "U1" H 8250 5150 30  0000 C CNN
+F 1 "PORT" H 8200 5050 30  0000 C CNN
+F 2 "" H 8200 5050 60  0000 C CNN
+F 3 "" H 8200 5050 60  0000 C CNN
+	13   8200 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 9 1 679A37C9
+P 8200 4000
+F 0 "U1" H 8250 4100 30  0000 C CNN
+F 1 "PORT" H 8200 4000 30  0000 C CNN
+F 2 "" H 8200 4000 60  0000 C CNN
+F 3 "" H 8200 4000 60  0000 C CNN
+	9    8200 4000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 679A37FE
+P 8400 3350
+F 0 "U1" H 8450 3450 30  0000 C CNN
+F 1 "PORT" H 8400 3350 30  0000 C CNN
+F 2 "" H 8400 3350 60  0000 C CNN
+F 3 "" H 8400 3350 60  0000 C CNN
+	8    8400 3350
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 14 1 679A3835
+P 6650 4900
+F 0 "U1" H 6700 5000 30  0000 C CNN
+F 1 "PORT" H 6650 4900 30  0000 C CNN
+F 2 "" H 6650 4900 60  0000 C CNN
+F 3 "" H 6650 4900 60  0000 C CNN
+	14   6650 4900
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	5150 3250 5250 3250
+Connection ~ 5250 3250
+Wire Wire Line
+	6650 4650 6650 4500
+Connection ~ 6650 4500
+$Comp
+L MC1489A_0 X1
+U 1 1 679A3F1D
+P 5550 3650
+F 0 "X1" H 5550 3650 60  0000 C CNN
+F 1 "MC1489A_0" H 5550 3550 60  0000 C CNN
+F 2 "" H 5550 3550 60  0001 C CNN
+F 3 "" H 5550 3550 60  0001 C CNN
+	1    5550 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L MC1489A_0 X3
+U 1 1 679A3F5C
+P 7700 3700
+F 0 "X3" H 7700 3700 60  0000 C CNN
+F 1 "MC1489A_0" H 7700 3600 60  0000 C CNN
+F 2 "" H 7700 3600 60  0001 C CNN
+F 3 "" H 7700 3600 60  0001 C CNN
+	1    7700 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L MC1489A_0 X2
+U 1 1 679A40AD
+P 5550 5400
+F 0 "X2" H 5550 5400 60  0000 C CNN
+F 1 "MC1489A_0" H 5550 5300 60  0000 C CNN
+F 2 "" H 5550 5300 60  0001 C CNN
+F 3 "" H 5550 5300 60  0001 C CNN
+	1    5550 5400
+	-1   0    0    1   
+$EndComp
+$Comp
+L MC1489A_0 X4
+U 1 1 679A40FC
+P 7750 5350
+F 0 "X4" H 7750 5350 60  0000 C CNN
+F 1 "MC1489A_0" H 7750 5250 60  0000 C CNN
+F 2 "" H 7750 5250 60  0001 C CNN
+F 3 "" H 7750 5250 60  0001 C CNN
+	1    7750 5350
+	-1   0    0    1   
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A.sub b/library/SubcircuitLibrary/mc1489A/mc1489A.sub
new file mode 100644
index 000000000..47a54ab54
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A.sub
@@ -0,0 +1,11 @@
+* Subcircuit mc1489A
+.subckt mc1489A net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ gnd net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ 
+* c:\fossee\esim\library\subcircuitlibrary\mc1489a\mc1489a.cir
+.include mc1489A_0.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad14_ net-_u1-pad3_ gnd mc1489A_0
+x3 net-_u1-pad10_ net-_u1-pad9_ net-_u1-pad14_ net-_u1-pad8_ gnd mc1489A_0
+x2 net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad14_ net-_u1-pad6_ gnd mc1489A_0
+x4 net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad14_ net-_u1-pad11_ gnd mc1489A_0
+* Control Statements
+
+.ends mc1489A
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0-cache.lib b/library/SubcircuitLibrary/mc1489A/mc1489A_0-cache.lib
new file mode 100644
index 000000000..7e9c6731b
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0-cache.lib
@@ -0,0 +1,107 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir b/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir
new file mode 100644
index 000000000..7b3d76c7e
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir
@@ -0,0 +1,21 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A_0\mc1489A_0.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/09/25 01:16:43
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1  Net-_Q1-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad1_ eSim_NPN		
+Q2  Net-_Q2-Pad1_ Net-_Q1-Pad1_ Net-_D1-Pad1_ eSim_NPN		
+Q3  Net-_Q3-Pad1_ Net-_Q2-Pad1_ Net-_D1-Pad1_ eSim_NPN		
+R2  Net-_D1-Pad2_ Net-_D1-Pad1_ 10K		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+R5  Net-_R4-Pad1_ Net-_Q2-Pad1_ 5K		
+R4  Net-_R4-Pad1_ Net-_Q1-Pad1_ 9K		
+R6  Net-_R4-Pad1_ Net-_Q3-Pad1_ 1.7K		
+R1  Net-_R1-Pad1_ Net-_D1-Pad2_ 3.8K		
+R3  Net-_D1-Pad2_ Net-_Q1-Pad1_ 1.6K		
+U1  Net-_R1-Pad1_ Net-_D1-Pad2_ Net-_R4-Pad1_ Net-_Q3-Pad1_ Net-_D1-Pad1_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir.out b/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir.out
new file mode 100644
index 000000000..6fa09c260
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0.cir.out
@@ -0,0 +1,24 @@
+* c:\fossee\esim\library\subcircuitlibrary\mc1489a_0\mc1489a_0.cir
+
+.include NPN.lib
+.include D.lib
+q1 net-_q1-pad1_ net-_d1-pad2_ net-_d1-pad1_ Q2N2222
+q2 net-_q2-pad1_ net-_q1-pad1_ net-_d1-pad1_ Q2N2222
+q3 net-_q3-pad1_ net-_q2-pad1_ net-_d1-pad1_ Q2N2222
+r2  net-_d1-pad2_ net-_d1-pad1_ 10k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+r5  net-_r4-pad1_ net-_q2-pad1_ 5k
+r4  net-_r4-pad1_ net-_q1-pad1_ 9k
+r6  net-_r4-pad1_ net-_q3-pad1_ 1.7k
+r1  net-_r1-pad1_ net-_d1-pad2_ 3.8k
+r3  net-_d1-pad2_ net-_q1-pad1_ 1.6k
+* u1  net-_r1-pad1_ net-_d1-pad2_ net-_r4-pad1_ net-_q3-pad1_ net-_d1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0.pro b/library/SubcircuitLibrary/mc1489A/mc1489A_0.pro
new file mode 100644
index 000000000..e27a398be
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0.sch b/library/SubcircuitLibrary/mc1489A/mc1489A_0.sch
new file mode 100644
index 000000000..d247d45df
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0.sch
@@ -0,0 +1,274 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 679A2F36
+P 5550 4050
+F 0 "Q1" H 5450 4100 50  0000 R CNN
+F 1 "eSim_NPN" H 5500 4200 50  0000 R CNN
+F 2 "" H 5750 4150 29  0000 C CNN
+F 3 "" H 5550 4050 60  0000 C CNN
+	1    5550 4050
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 679A2F55
+P 6350 3850
+F 0 "Q2" H 6250 3900 50  0000 R CNN
+F 1 "eSim_NPN" H 6300 4000 50  0000 R CNN
+F 2 "" H 6550 3950 29  0000 C CNN
+F 3 "" H 6350 3850 60  0000 C CNN
+	1    6350 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 679A2F6E
+P 7300 3650
+F 0 "Q3" H 7200 3700 50  0000 R CNN
+F 1 "eSim_NPN" H 7250 3800 50  0000 R CNN
+F 2 "" H 7500 3750 29  0000 C CNN
+F 3 "" H 7300 3650 60  0000 C CNN
+	1    7300 3650
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5350 3850 6150 3850
+Wire Wire Line
+	6450 3650 7100 3650
+$Comp
+L resistor R2
+U 1 1 679A2F98
+P 4950 4300
+F 0 "R2" H 5000 4430 50  0000 C CNN
+F 1 "10K" H 5000 4250 50  0000 C CNN
+F 2 "" H 5000 4280 30  0000 C CNN
+F 3 "" V 5000 4350 30  0000 C CNN
+	1    4950 4300
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5000 3850 5000 4200
+Wire Wire Line
+	3900 4050 5350 4050
+Wire Wire Line
+	5000 4500 5000 4600
+Wire Wire Line
+	4500 4600 8100 4600
+Wire Wire Line
+	5650 4600 5650 4250
+Wire Wire Line
+	6450 4600 6450 4050
+Connection ~ 5650 4600
+Wire Wire Line
+	7400 4600 7400 3850
+Connection ~ 6450 4600
+$Comp
+L eSim_Diode D1
+U 1 1 679A2FEE
+P 4500 4350
+F 0 "D1" H 4500 4450 50  0000 C CNN
+F 1 "eSim_Diode" H 4500 4250 50  0000 C CNN
+F 2 "" H 4500 4350 60  0000 C CNN
+F 3 "" H 4500 4350 60  0000 C CNN
+	1    4500 4350
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	4500 4500 4500 4600
+Connection ~ 5000 4600
+Wire Wire Line
+	4500 4200 4500 4050
+Connection ~ 5000 4050
+$Comp
+L resistor R5
+U 1 1 679A303B
+P 6400 3150
+F 0 "R5" H 6450 3280 50  0000 C CNN
+F 1 "5K" H 6450 3100 50  0000 C CNN
+F 2 "" H 6450 3130 30  0000 C CNN
+F 3 "" V 6450 3200 30  0000 C CNN
+	1    6400 3150
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R4
+U 1 1 679A3060
+P 5600 3200
+F 0 "R4" H 5650 3330 50  0000 C CNN
+F 1 "9K" H 5650 3150 50  0000 C CNN
+F 2 "" H 5650 3180 30  0000 C CNN
+F 3 "" V 5650 3250 30  0000 C CNN
+	1    5600 3200
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R6
+U 1 1 679A3095
+P 7350 3150
+F 0 "R6" H 7400 3280 50  0000 C CNN
+F 1 "1.7K" H 7400 3100 50  0000 C CNN
+F 2 "" H 7400 3130 30  0000 C CNN
+F 3 "" V 7400 3200 30  0000 C CNN
+	1    7350 3150
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5650 3400 5650 3850
+Wire Wire Line
+	6450 3350 6450 3650
+Wire Wire Line
+	7400 3350 7400 3450
+Wire Wire Line
+	5650 3100 5650 2900
+Wire Wire Line
+	5650 2900 7950 2900
+Wire Wire Line
+	7400 2900 7400 3050
+Wire Wire Line
+	6450 3050 6450 2900
+Connection ~ 6450 2900
+Connection ~ 7400 2900
+Wire Wire Line
+	7400 3400 8000 3400
+Connection ~ 7400 3400
+Connection ~ 7400 4600
+Connection ~ 4500 4050
+$Comp
+L resistor R1
+U 1 1 679A31DB
+P 3700 4100
+F 0 "R1" H 3750 4230 50  0000 C CNN
+F 1 "3.8K" H 3750 4050 50  0000 C CNN
+F 2 "" H 3750 4080 30  0000 C CNN
+F 3 "" V 3750 4150 30  0000 C CNN
+	1    3700 4100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3600 4050 3400 4050
+Connection ~ 5650 3850
+$Comp
+L resistor R3
+U 1 1 679A3264
+P 5150 3900
+F 0 "R3" H 5200 4030 50  0000 C CNN
+F 1 "1.6K" H 5200 3850 50  0000 C CNN
+F 2 "" H 5200 3880 30  0000 C CNN
+F 3 "" V 5200 3950 30  0000 C CNN
+	1    5150 3900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3400 3850 5050 3850
+Connection ~ 5000 3850
+$Comp
+L PORT U1
+U 3 1 679A336F
+P 8200 2900
+F 0 "U1" H 8250 3000 30  0000 C CNN
+F 1 "PORT" H 8200 2900 30  0000 C CNN
+F 2 "" H 8200 2900 60  0000 C CNN
+F 3 "" H 8200 2900 60  0000 C CNN
+	3    8200 2900
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 679A33BE
+P 8250 3400
+F 0 "U1" H 8300 3500 30  0000 C CNN
+F 1 "PORT" H 8250 3400 30  0000 C CNN
+F 2 "" H 8250 3400 60  0000 C CNN
+F 3 "" H 8250 3400 60  0000 C CNN
+	4    8250 3400
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 5 1 679A33F1
+P 8350 4600
+F 0 "U1" H 8400 4700 30  0000 C CNN
+F 1 "PORT" H 8350 4600 30  0000 C CNN
+F 2 "" H 8350 4600 60  0000 C CNN
+F 3 "" H 8350 4600 60  0000 C CNN
+	5    8350 4600
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 2 1 679A3424
+P 3150 3850
+F 0 "U1" H 3200 3950 30  0000 C CNN
+F 1 "PORT" H 3150 3850 30  0000 C CNN
+F 2 "" H 3150 3850 60  0000 C CNN
+F 3 "" H 3150 3850 60  0000 C CNN
+	2    3150 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 679A3455
+P 3150 4050
+F 0 "U1" H 3200 4150 30  0000 C CNN
+F 1 "PORT" H 3150 4050 30  0000 C CNN
+F 2 "" H 3150 4050 60  0000 C CNN
+F 3 "" H 3150 4050 60  0000 C CNN
+	1    3150 4050
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0.sub b/library/SubcircuitLibrary/mc1489A/mc1489A_0.sub
new file mode 100644
index 000000000..e9ebfc802
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0.sub
@@ -0,0 +1,18 @@
+* Subcircuit mc1489A_0
+.subckt mc1489A_0 net-_r1-pad1_ net-_d1-pad2_ net-_r4-pad1_ net-_q3-pad1_ net-_d1-pad1_ 
+* c:\fossee\esim\library\subcircuitlibrary\mc1489a_0\mc1489a_0.cir
+.include NPN.lib
+.include D.lib
+q1 net-_q1-pad1_ net-_d1-pad2_ net-_d1-pad1_ Q2N2222
+q2 net-_q2-pad1_ net-_q1-pad1_ net-_d1-pad1_ Q2N2222
+q3 net-_q3-pad1_ net-_q2-pad1_ net-_d1-pad1_ Q2N2222
+r2  net-_d1-pad2_ net-_d1-pad1_ 10k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+r5  net-_r4-pad1_ net-_q2-pad1_ 5k
+r4  net-_r4-pad1_ net-_q1-pad1_ 9k
+r6  net-_r4-pad1_ net-_q3-pad1_ 1.7k
+r1  net-_r1-pad1_ net-_d1-pad2_ 3.8k
+r3  net-_d1-pad2_ net-_q1-pad1_ 1.6k
+* Control Statements
+
+.ends mc1489A_0
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_0_Previous_Values.xml b/library/SubcircuitLibrary/mc1489A/mc1489A_0_Previous_Values.xml
new file mode 100644
index 000000000..09ac93362
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_0_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mc1489A/mc1489A_Previous_Values.xml b/library/SubcircuitLibrary/mc1489A/mc1489A_Previous_Values.xml
new file mode 100644
index 000000000..2b0cf1e8d
--- /dev/null
+++ b/library/SubcircuitLibrary/mc1489A/mc1489A_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A_0</field></x1><x3><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A_0</field></x3><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A_0</field></x2><x4><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\mc1489A_0</field></x4></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4421/D.lib b/library/SubcircuitLibrary/mic4421/D.lib
new file mode 100644
index 000000000..f53bf3e03
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/mic4421/NMOS-5um.lib b/library/SubcircuitLibrary/mic4421/NMOS-5um.lib
new file mode 100644
index 000000000..a237e1fe3
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/NMOS-5um.lib
@@ -0,0 +1,5 @@
+* 5um technology
+
+.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 
++ Level=1
++ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n  )
diff --git a/library/SubcircuitLibrary/mic4421/PMOS-5um.lib b/library/SubcircuitLibrary/mic4421/PMOS-5um.lib
new file mode 100644
index 000000000..9c3ed9760
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/PMOS-5um.lib
@@ -0,0 +1,5 @@
+*5um technology
+
+.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65
++ Level=1
++ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n  )
diff --git a/library/SubcircuitLibrary/mic4421/analysis b/library/SubcircuitLibrary/mic4421/analysis
new file mode 100644
index 000000000..ebd5c0a94
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4421/mic4421-cache.lib b/library/SubcircuitLibrary/mic4421/mic4421-cache.lib
new file mode 100644
index 000000000..caa93ac57
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421-cache.lib
@@ -0,0 +1,206 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# adc_bridge_1
+#
+DEF adc_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "adc_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# dac_bridge_1
+#
+DEF dac_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "dac_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# dc
+#
+DEF dc I 0 40 Y Y 1 F N
+F0 "I" -200 100 60 H V C CNN
+F1 "dc" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+P 2 0 1 0 0 -100 0 -100 N
+P 2 0 1 0 0 100 -50 50 N
+P 2 0 1 0 0 100 0 -100 N
+P 2 0 1 0 0 100 50 50 N
+X ~ 1 0 450 300 D 50 50 1 1 P
+X ~ 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.cir b/library/SubcircuitLibrary/mic4421/mic4421.cir
new file mode 100644
index 000000000..4fc0a998e
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.cir
@@ -0,0 +1,27 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\mic4421\mic4421.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 01/08/25 22:51:02
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  Net-_U2-Pad1_ Net-_U2-Pad2_ d_inverter		
+M2  Net-_I1-Pad1_ Net-_M2-Pad2_ Net-_I2-Pad1_ Net-_I2-Pad1_ mosfet_p		
+U3  Net-_U2-Pad2_ Net-_U3-Pad2_ d_inverter		
+U4  Net-_U3-Pad2_ Net-_U4-Pad2_ d_inverter		
+M4  Net-_D2-Pad2_ Net-_M3-Pad2_ Net-_D3-Pad2_ Net-_D3-Pad2_ mosfet_p		
+M1  Net-_I1-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad1_ mosfet_n		
+M3  Net-_D2-Pad2_ Net-_M3-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad1_ mosfet_n		
+I2  Net-_I2-Pad1_ Net-_D3-Pad2_ 0.0003		
+I1  Net-_I1-Pad1_ Net-_D3-Pad2_ 0.0001		
+R1  Net-_D3-Pad1_ Net-_D1-Pad2_ 2k		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+D2  Net-_D1-Pad1_ Net-_D2-Pad2_ eSim_Diode		
+U1  Net-_D3-Pad2_ Net-_D3-Pad1_ ? Net-_D1-Pad1_ ? Net-_D2-Pad2_ ? ? PORT		
+D3  Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode		
+U7  Net-_U4-Pad2_ Net-_M3-Pad2_ dac_bridge_1		
+U6  Net-_I1-Pad1_ Net-_U2-Pad1_ adc_bridge_1		
+U5  Net-_U2-Pad2_ Net-_M2-Pad2_ dac_bridge_1		
+
+.end
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.cir.out b/library/SubcircuitLibrary/mic4421/mic4421.cir.out
new file mode 100644
index 000000000..ab68f72ed
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.cir.out
@@ -0,0 +1,49 @@
+* c:\fossee\esim\library\subcircuitlibrary\mic4421\mic4421.cir
+
+.include PMOS-5um.lib
+.include NMOS-5um.lib
+.include D.lib
+* u2  net-_u2-pad1_ net-_u2-pad2_ d_inverter
+m2 net-_i1-pad1_ net-_m2-pad2_ net-_i2-pad1_ net-_i2-pad1_ mos_p W=100u L=100u M=1
+* u3  net-_u2-pad2_ net-_u3-pad2_ d_inverter
+* u4  net-_u3-pad2_ net-_u4-pad2_ d_inverter
+m4 net-_d2-pad2_ net-_m3-pad2_ net-_d3-pad2_ net-_d3-pad2_ mos_p W=100u L=100u M=1
+m1 net-_i1-pad1_ net-_d1-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+m3 net-_d2-pad2_ net-_m3-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+i2  net-_i2-pad1_ net-_d3-pad2_ 0.0003
+i1  net-_i1-pad1_ net-_d3-pad2_ 0.0001
+r1  net-_d3-pad1_ net-_d1-pad2_ 2k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad1_ net-_d2-pad2_ 1N4148
+* u1  net-_d3-pad2_ net-_d3-pad1_ ? net-_d1-pad1_ ? net-_d2-pad2_ ? ? port
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+* u7  net-_u4-pad2_ net-_m3-pad2_ dac_bridge_1
+* u6  net-_i1-pad1_ net-_u2-pad1_ adc_bridge_1
+* u5  net-_u2-pad2_ net-_m2-pad2_ dac_bridge_1
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 net-_u2-pad2_ net-_u3-pad2_ u3
+a3 net-_u3-pad2_ net-_u4-pad2_ u4
+a4 [net-_u4-pad2_ ] [net-_m3-pad2_ ] u7
+a5 [net-_i1-pad1_ ] [net-_u2-pad1_ ] u6
+a6 [net-_u2-pad2_ ] [net-_m2-pad2_ ] u5
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u7 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
+* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
+.model u6 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u5 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.pro b/library/SubcircuitLibrary/mic4421/mic4421.pro
new file mode 100644
index 000000000..b1f437e2d
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.pro
@@ -0,0 +1,73 @@
+update=01/07/25 18:46:01
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.sch b/library/SubcircuitLibrary/mic4421/mic4421.sch
new file mode 100644
index 000000000..1cf7433fc
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.sch
@@ -0,0 +1,444 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:mic4421-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_inverter U2
+U 1 1 67782B0E
+P 5150 4550
+F 0 "U2" H 5150 4450 60  0000 C CNN
+F 1 "d_inverter" H 5150 4700 60  0000 C CNN
+F 2 "" H 5200 4500 60  0000 C CNN
+F 3 "" H 5200 4500 60  0000 C CNN
+	1    5150 4550
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M2
+U 1 1 67782B4D
+P 4700 4100
+F 0 "M2" H 4650 4150 50  0000 R CNN
+F 1 "mosfet_p" H 4750 4250 50  0000 R CNN
+F 2 "" H 4950 4200 29  0000 C CNN
+F 3 "" H 4750 4100 60  0000 C CNN
+	1    4700 4100
+	-1   0    0    1   
+$EndComp
+$Comp
+L d_inverter U3
+U 1 1 67782BA6
+P 5950 4250
+F 0 "U3" H 5950 4150 60  0000 C CNN
+F 1 "d_inverter" H 5950 4400 60  0000 C CNN
+F 2 "" H 6000 4200 60  0000 C CNN
+F 3 "" H 6000 4200 60  0000 C CNN
+	1    5950 4250
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_inverter U4
+U 1 1 67782BC1
+P 6800 4550
+F 0 "U4" H 6800 4450 60  0000 C CNN
+F 1 "d_inverter" H 6800 4700 60  0000 C CNN
+F 2 "" H 6850 4500 60  0000 C CNN
+F 3 "" H 6850 4500 60  0000 C CNN
+	1    6800 4550
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M4
+U 1 1 67782C49
+P 7550 4300
+F 0 "M4" H 7500 4350 50  0000 R CNN
+F 1 "mosfet_p" H 7600 4450 50  0000 R CNN
+F 2 "" H 7800 4400 29  0000 C CNN
+F 3 "" H 7600 4300 60  0000 C CNN
+	1    7550 4300
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_n M1
+U 1 1 67782CC7
+P 4200 4800
+F 0 "M1" H 4200 4650 50  0000 R CNN
+F 1 "mosfet_n" H 4300 4750 50  0000 R CNN
+F 2 "" H 4500 4500 29  0000 C CNN
+F 3 "" H 4300 4600 60  0000 C CNN
+	1    4200 4800
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M3
+U 1 1 67782D74
+P 7500 4600
+F 0 "M3" H 7500 4450 50  0000 R CNN
+F 1 "mosfet_n" H 7600 4550 50  0000 R CNN
+F 2 "" H 7800 4300 29  0000 C CNN
+F 3 "" H 7600 4400 60  0000 C CNN
+	1    7500 4600
+	1    0    0    -1  
+$EndComp
+$Comp
+L dc I2
+U 1 1 67782E7C
+P 4450 3300
+F 0 "I2" H 4250 3400 60  0000 C CNN
+F 1 "0.0003" H 4250 3250 60  0000 C CNN
+F 2 "R1" H 4150 3300 60  0000 C CNN
+F 3 "" H 4450 3300 60  0000 C CNN
+	1    4450 3300
+	-1   0    0    1   
+$EndComp
+$Comp
+L dc I1
+U 1 1 677830B7
+P 3850 3400
+F 0 "I1" H 3650 3500 60  0000 C CNN
+F 1 "0.0001" H 3650 3350 60  0000 C CNN
+F 2 "R1" H 3550 3400 60  0000 C CNN
+F 3 "" H 3850 3400 60  0000 C CNN
+	1    3850 3400
+	-1   0    0    1   
+$EndComp
+$Comp
+L resistor R1
+U 1 1 67783114
+P 3150 5050
+F 0 "R1" H 3200 5180 50  0000 C CNN
+F 1 "2k" H 3200 5000 50  0000 C CNN
+F 2 "" H 3200 5030 30  0000 C CNN
+F 3 "" V 3200 5100 30  0000 C CNN
+	1    3150 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 677831E0
+P 3700 5250
+F 0 "D1" H 3700 5350 50  0000 C CNN
+F 1 "eSim_Diode" H 3700 5150 50  0000 C CNN
+F 2 "" H 3700 5250 60  0000 C CNN
+F 3 "" H 3700 5250 60  0000 C CNN
+	1    3700 5250
+	0    -1   -1   0   
+$EndComp
+$Comp
+L eSim_Diode D2
+U 1 1 67783487
+P 8050 5000
+F 0 "D2" H 8050 5100 50  0000 C CNN
+F 1 "eSim_Diode" H 8050 4900 50  0000 C CNN
+F 2 "" H 8050 5000 60  0000 C CNN
+F 3 "" H 8050 5000 60  0000 C CNN
+	1    8050 5000
+	0    -1   -1   0   
+$EndComp
+$Comp
+L PORT U1
+U 2 1 67783761
+P 2200 5000
+F 0 "U1" H 2250 5100 30  0000 C CNN
+F 1 "PORT" H 2200 5000 30  0000 C CNN
+F 2 "" H 2200 5000 60  0000 C CNN
+F 3 "" H 2200 5000 60  0000 C CNN
+	2    2200 5000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 67783884
+P 7950 5550
+F 0 "U1" H 8000 5650 30  0000 C CNN
+F 1 "PORT" H 7950 5550 30  0000 C CNN
+F 2 "" H 7950 5550 60  0000 C CNN
+F 3 "" H 7950 5550 60  0000 C CNN
+	4    7950 5550
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 3 1 677838C7
+P 10000 5350
+F 0 "U1" H 10050 5450 30  0000 C CNN
+F 1 "PORT" H 10000 5350 30  0000 C CNN
+F 2 "" H 10000 5350 60  0000 C CNN
+F 3 "" H 10000 5350 60  0000 C CNN
+	3    10000 5350
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 1 1 6778390C
+P 7450 2600
+F 0 "U1" H 7500 2700 30  0000 C CNN
+F 1 "PORT" H 7450 2600 30  0000 C CNN
+F 2 "" H 7450 2600 60  0000 C CNN
+F 3 "" H 7450 2600 60  0000 C CNN
+	1    7450 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 67783D9B
+P 8950 4900
+F 0 "U1" H 9000 5000 30  0000 C CNN
+F 1 "PORT" H 8950 4900 30  0000 C CNN
+F 2 "" H 8950 4900 60  0000 C CNN
+F 3 "" H 8950 4900 60  0000 C CNN
+	5    8950 4900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 67783DD2
+P 9000 5200
+F 0 "U1" H 9050 5300 30  0000 C CNN
+F 1 "PORT" H 9000 5200 30  0000 C CNN
+F 2 "" H 9000 5200 60  0000 C CNN
+F 3 "" H 9000 5200 60  0000 C CNN
+	8    9000 5200
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 67783E0B
+P 8950 5500
+F 0 "U1" H 9000 5600 30  0000 C CNN
+F 1 "PORT" H 8950 5500 30  0000 C CNN
+F 2 "" H 8950 5500 60  0000 C CNN
+F 3 "" H 8950 5500 60  0000 C CNN
+	7    8950 5500
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 67783E46
+P 8550 4550
+F 0 "U1" H 8600 4650 30  0000 C CNN
+F 1 "PORT" H 8550 4550 30  0000 C CNN
+F 2 "" H 8550 4550 60  0000 C CNN
+F 3 "" H 8550 4550 60  0000 C CNN
+	6    8550 4550
+	-1   0    0    1   
+$EndComp
+NoConn ~ 9750 5350
+$Comp
+L eSim_Diode D3
+U 1 1 677D29EC
+P 2800 3750
+F 0 "D3" H 2800 3850 50  0000 C CNN
+F 1 "eSim_Diode" H 2800 3650 50  0000 C CNN
+F 2 "" H 2800 3750 60  0000 C CNN
+F 3 "" H 2800 3750 60  0000 C CNN
+	1    2800 3750
+	0    -1   -1   0   
+$EndComp
+$Comp
+L dac_bridge_1 U7
+U 1 1 677D98FF
+P 7000 3700
+F 0 "U7" H 7000 3700 60  0000 C CNN
+F 1 "dac_bridge_1" H 7000 3850 60  0000 C CNN
+F 2 "" H 7000 3700 60  0000 C CNN
+F 3 "" H 7000 3700 60  0000 C CNN
+	1    7000 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L adc_bridge_1 U6
+U 1 1 677D9438
+P 5400 5050
+F 0 "U6" H 5400 5050 60  0000 C CNN
+F 1 "adc_bridge_1" H 5400 5200 60  0000 C CNN
+F 2 "" H 5400 5050 60  0000 C CNN
+F 3 "" H 5400 5050 60  0000 C CNN
+	1    5400 5050
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4450 3750 4450 3950
+Wire Wire Line
+	4450 3900 4550 3900
+Wire Wire Line
+	4550 4300 4550 5000
+Wire Wire Line
+	3850 4550 4550 4550
+Connection ~ 5650 4550
+Connection ~ 6500 4550
+Wire Wire Line
+	7250 4300 7250 4800
+Wire Wire Line
+	7250 4300 7400 4300
+Wire Wire Line
+	7250 4800 7400 4800
+Connection ~ 7250 4550
+Wire Wire Line
+	7800 4150 7800 4100
+Wire Wire Line
+	7800 4100 7700 4100
+Connection ~ 4450 3900
+Wire Wire Line
+	4500 5150 4500 5200
+Wire Wire Line
+	4500 5200 4400 5200
+Wire Wire Line
+	4400 4550 4400 4800
+Connection ~ 4550 4550
+Wire Wire Line
+	7700 5000 7800 5000
+Wire Wire Line
+	7800 5000 7800 4950
+Wire Wire Line
+	4400 5200 4400 5400
+Wire Wire Line
+	7700 5000 7700 5550
+Wire Wire Line
+	7700 4500 7700 4600
+Wire Wire Line
+	3850 4550 3850 3850
+Connection ~ 4400 4550
+Wire Wire Line
+	3350 5000 4100 5000
+Wire Wire Line
+	3850 2950 3850 2850
+Wire Wire Line
+	2800 2850 7700 2850
+Wire Wire Line
+	2450 5000 3050 5000
+Connection ~ 3850 2850
+Connection ~ 4400 5250
+Connection ~ 3700 5000
+Wire Wire Line
+	3700 5000 3700 5100
+Wire Wire Line
+	3700 5400 8050 5400
+Connection ~ 4400 5400
+Wire Wire Line
+	7700 4100 7700 2600
+Connection ~ 4450 2850
+Connection ~ 2800 5000
+Connection ~ 7700 5400
+Wire Wire Line
+	7700 4550 8300 4550
+Wire Wire Line
+	8050 4550 8050 4850
+Connection ~ 7700 4550
+Wire Wire Line
+	8050 5400 8050 5150
+Connection ~ 8050 4550
+Connection ~ 7700 2850
+Wire Wire Line
+	6500 4250 6500 4550
+Wire Wire Line
+	5650 4550 5650 4250
+Wire Wire Line
+	4550 5000 4800 5000
+Wire Wire Line
+	4850 4750 4850 4550
+Wire Wire Line
+	7200 4550 7250 4550
+Connection ~ 5450 4550
+Wire Wire Line
+	6250 4250 6500 4250
+Wire Wire Line
+	2800 2850 2800 3600
+Wire Wire Line
+	2800 3900 2800 5000
+Wire Wire Line
+	4750 4000 4850 4000
+Wire Wire Line
+	4850 4000 4850 4100
+Wire Wire Line
+	4750 4000 4750 3700
+Wire Wire Line
+	5900 3700 5900 4050
+Wire Wire Line
+	5900 4050 5450 4050
+Wire Wire Line
+	5450 4050 5450 4550
+Wire Wire Line
+	4850 4750 5950 4750
+Wire Wire Line
+	5950 4750 5950 5000
+Wire Wire Line
+	5450 4550 5650 4550
+Wire Wire Line
+	7100 4550 7100 3900
+Wire Wire Line
+	7100 3900 6400 3900
+Wire Wire Line
+	6400 3900 6400 3650
+Wire Wire Line
+	7550 3650 7550 4200
+Wire Wire Line
+	7550 4200 7200 4200
+Wire Wire Line
+	7200 4200 7200 4550
+NoConn ~ 9200 4900
+NoConn ~ 9250 5200
+NoConn ~ 9200 5500
+$Comp
+L dac_bridge_1 U5
+U 1 1 677EB41B
+P 5300 3650
+F 0 "U5" H 5300 3650 60  0000 C CNN
+F 1 "dac_bridge_1" H 5300 3800 60  0000 C CNN
+F 2 "" H 5300 3650 60  0000 C CNN
+F 3 "" H 5300 3650 60  0000 C CNN
+	1    5300 3650
+	-1   0    0    1   
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.sub b/library/SubcircuitLibrary/mic4421/mic4421.sub
new file mode 100644
index 000000000..1400f1099
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.sub
@@ -0,0 +1,43 @@
+* Subcircuit mic4421
+.subckt mic4421 net-_d3-pad2_ net-_d3-pad1_ ? net-_d1-pad1_ ? net-_d2-pad2_ ? ? 
+* c:\fossee\esim\library\subcircuitlibrary\mic4421\mic4421.cir
+.include PMOS-5um.lib
+.include NMOS-5um.lib
+.include D.lib
+* u2  net-_u2-pad1_ net-_u2-pad2_ d_inverter
+m2 net-_i1-pad1_ net-_m2-pad2_ net-_i2-pad1_ net-_i2-pad1_ mos_p W=100u L=100u M=1
+* u3  net-_u2-pad2_ net-_u3-pad2_ d_inverter
+* u4  net-_u3-pad2_ net-_u4-pad2_ d_inverter
+m4 net-_d2-pad2_ net-_m3-pad2_ net-_d3-pad2_ net-_d3-pad2_ mos_p W=100u L=100u M=1
+m1 net-_i1-pad1_ net-_d1-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+m3 net-_d2-pad2_ net-_m3-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+i2  net-_i2-pad1_ net-_d3-pad2_ 0.0003
+i1  net-_i1-pad1_ net-_d3-pad2_ 0.0001
+r1  net-_d3-pad1_ net-_d1-pad2_ 2k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad1_ net-_d2-pad2_ 1N4148
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+* u7  net-_u4-pad2_ net-_m3-pad2_ dac_bridge_1
+* u6  net-_i1-pad1_ net-_u2-pad1_ adc_bridge_1
+* u5  net-_u2-pad2_ net-_m2-pad2_ dac_bridge_1
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 net-_u2-pad2_ net-_u3-pad2_ u3
+a3 net-_u3-pad2_ net-_u4-pad2_ u4
+a4 [net-_u4-pad2_ ] [net-_m3-pad2_ ] u7
+a5 [net-_i1-pad1_ ] [net-_u2-pad1_ ] u6
+a6 [net-_u2-pad2_ ] [net-_m2-pad2_ ] u5
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u7 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
+* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
+.model u6 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u5 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
+* Control Statements
+
+.ends mic4421
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4421/mic4421.xml b/library/SubcircuitLibrary/mic4421/mic4421.xml
new file mode 100644
index 000000000..00af11f45
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421.xml
@@ -0,0 +1,372 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<export version="D">
+  <design>
+    <source>C:\FOSSEE\eSim\library\SubcircuitLibrary\mic4421\mic4421.sch</source>
+    <date>01/07/25 19:36:43</date>
+    <tool>Eeschema 4.0.7</tool>
+    <sheet number="1" name="/" tstamps="/">
+      <title_block>
+        <title/>
+        <company/>
+        <rev/>
+        <date/>
+        <source>mic4421.sch</source>
+        <comment number="1" value=""/>
+        <comment number="2" value=""/>
+        <comment number="3" value=""/>
+        <comment number="4" value=""/>
+      </title_block>
+    </sheet>
+  </design>
+  <components>
+    <comp ref="U2">
+      <value>d_inverter</value>
+      <libsource lib="eSim_Digital" part="d_inverter"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782B0E</tstamp>
+    </comp>
+    <comp ref="M2">
+      <value>mosfet_p</value>
+      <libsource lib="eSim_Devices" part="mosfet_p"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782B4D</tstamp>
+    </comp>
+    <comp ref="U3">
+      <value>d_inverter</value>
+      <libsource lib="eSim_Digital" part="d_inverter"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782BA6</tstamp>
+    </comp>
+    <comp ref="U4">
+      <value>d_inverter</value>
+      <libsource lib="eSim_Digital" part="d_inverter"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782BC1</tstamp>
+    </comp>
+    <comp ref="M4">
+      <value>mosfet_p</value>
+      <libsource lib="eSim_Devices" part="mosfet_p"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782C49</tstamp>
+    </comp>
+    <comp ref="M1">
+      <value>mosfet_n</value>
+      <libsource lib="eSim_Devices" part="mosfet_n"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782CC7</tstamp>
+    </comp>
+    <comp ref="M3">
+      <value>mosfet_n</value>
+      <libsource lib="eSim_Devices" part="mosfet_n"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782D74</tstamp>
+    </comp>
+    <comp ref="I2">
+      <value>0.0003</value>
+      <footprint>R1</footprint>
+      <libsource lib="eSim_Sources" part="dc"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67782E7C</tstamp>
+    </comp>
+    <comp ref="I1">
+      <value>0.0001</value>
+      <footprint>R1</footprint>
+      <libsource lib="eSim_Sources" part="dc"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677830B7</tstamp>
+    </comp>
+    <comp ref="R1">
+      <value>2k</value>
+      <libsource lib="eSim_Devices" part="resistor"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67783114</tstamp>
+    </comp>
+    <comp ref="D1">
+      <value>eSim_Diode</value>
+      <libsource lib="eSim_Devices" part="eSim_Diode"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677831E0</tstamp>
+    </comp>
+    <comp ref="D2">
+      <value>eSim_Diode</value>
+      <libsource lib="eSim_Devices" part="eSim_Diode"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67783487</tstamp>
+    </comp>
+    <comp ref="U1">
+      <value>PORT</value>
+      <libsource lib="eSim_Miscellaneous" part="PORT"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>67783761</tstamp>
+    </comp>
+    <comp ref="D3">
+      <value>eSim_Diode</value>
+      <libsource lib="eSim_Devices" part="eSim_Diode"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677D29EC</tstamp>
+    </comp>
+    <comp ref="U6">
+      <value>adc_bridge_1</value>
+      <libsource lib="eSim_Hybrid" part="adc_bridge_1"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677D9438</tstamp>
+    </comp>
+    <comp ref="U7">
+      <value>dac_bridge_1</value>
+      <libsource lib="eSim_Hybrid" part="dac_bridge_1"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677D98FF</tstamp>
+    </comp>
+    <comp ref="U5">
+      <value>dac_bridge_1</value>
+      <libsource lib="eSim_Hybrid" part="dac_bridge_1"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>677DB7D0</tstamp>
+    </comp>
+  </components>
+  <libparts>
+    <libpart lib="eSim_Miscellaneous" part="PORT">
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">PORT</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="BiDi"/>
+        <pin num="2" name="~" type="BiDi"/>
+        <pin num="3" name="~" type="BiDi"/>
+        <pin num="4" name="~" type="BiDi"/>
+        <pin num="5" name="~" type="BiDi"/>
+        <pin num="6" name="~" type="BiDi"/>
+        <pin num="7" name="~" type="BiDi"/>
+        <pin num="8" name="~" type="BiDi"/>
+        <pin num="9" name="~" type="BiDi"/>
+        <pin num="10" name="~" type="BiDi"/>
+        <pin num="11" name="~" type="BiDi"/>
+        <pin num="12" name="~" type="BiDi"/>
+        <pin num="13" name="~" type="BiDi"/>
+        <pin num="14" name="~" type="BiDi"/>
+        <pin num="15" name="~" type="BiDi"/>
+        <pin num="16" name="~" type="BiDi"/>
+        <pin num="17" name="~" type="BiDi"/>
+        <pin num="18" name="~" type="BiDi"/>
+        <pin num="19" name="~" type="BiDi"/>
+        <pin num="20" name="~" type="BiDi"/>
+        <pin num="21" name="~" type="BiDi"/>
+        <pin num="22" name="~" type="BiDi"/>
+        <pin num="23" name="~" type="BiDi"/>
+        <pin num="24" name="~" type="BiDi"/>
+        <pin num="25" name="~" type="BiDi"/>
+        <pin num="26" name="~" type="BiDi"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Hybrid" part="adc_bridge_1">
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">adc_bridge_1</field>
+      </fields>
+      <pins>
+        <pin num="1" name="IN1" type="input"/>
+        <pin num="2" name="OUT1" type="output"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Digital" part="d_inverter">
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">d_inverter</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="input"/>
+        <pin num="2" name="~" type="output"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Hybrid" part="dac_bridge_1">
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">dac_bridge_1</field>
+      </fields>
+      <pins>
+        <pin num="1" name="IN1" type="input"/>
+        <pin num="2" name="OUT1" type="output"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Sources" part="dc">
+      <footprints>
+        <fp>1_pin</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">I</field>
+        <field name="Value">dc</field>
+        <field name="Footprint">R1</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Devices" part="eSim_Diode">
+      <footprints>
+        <fp>TO-???*</fp>
+        <fp>*SingleDiode</fp>
+        <fp>*_Diode_*</fp>
+        <fp>*SingleDiode*</fp>
+        <fp>D_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">D</field>
+        <field name="Value">eSim_Diode</field>
+      </fields>
+      <pins>
+        <pin num="1" name="A" type="passive"/>
+        <pin num="2" name="K" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Devices" part="eSim_MOS_N">
+      <aliases>
+        <alias>mosfet_n</alias>
+      </aliases>
+      <fields>
+        <field name="Reference">M</field>
+        <field name="Value">eSim_MOS_N</field>
+      </fields>
+      <pins>
+        <pin num="1" name="D" type="passive"/>
+        <pin num="2" name="G" type="passive"/>
+        <pin num="3" name="S" type="passive"/>
+        <pin num="4" name="B" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Devices" part="eSim_MOS_P">
+      <aliases>
+        <alias>mosfet_p</alias>
+      </aliases>
+      <fields>
+        <field name="Reference">M</field>
+        <field name="Value">eSim_MOS_P</field>
+      </fields>
+      <pins>
+        <pin num="1" name="D" type="passive"/>
+        <pin num="2" name="G" type="passive"/>
+        <pin num="3" name="S" type="passive"/>
+        <pin num="4" name="B" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="eSim_Devices" part="eSim_R">
+      <aliases>
+        <alias>resistor</alias>
+      </aliases>
+      <footprints>
+        <fp>R_*</fp>
+        <fp>Resistor_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">R</field>
+        <field name="Value">eSim_R</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+      </pins>
+    </libpart>
+  </libparts>
+  <libraries>
+    <library logical="eSim_Miscellaneous">
+      <uri>C:\FOSSEE\KiCad\share\kicad\library\eSim_Miscellaneous.lib</uri>
+    </library>
+    <library logical="eSim_Hybrid">
+      <uri>C:\FOSSEE\KiCad\share\kicad\library\eSim_Hybrid.lib</uri>
+    </library>
+    <library logical="eSim_Digital">
+      <uri>C:\FOSSEE\KiCad\share\kicad\library\eSim_Digital.lib</uri>
+    </library>
+    <library logical="eSim_Devices">
+      <uri>C:\FOSSEE\KiCad\share\kicad\library\eSim_Devices.lib</uri>
+    </library>
+    <library logical="eSim_Sources">
+      <uri>C:\FOSSEE\KiCad\share\kicad\library\eSim_Sources.lib</uri>
+    </library>
+  </libraries>
+  <nets>
+    <net code="1" name="Net-(U2-Pad2)">
+      <node ref="U5" pin="1"/>
+      <node ref="U2" pin="2"/>
+      <node ref="U3" pin="1"/>
+    </net>
+    <net code="2" name="Net-(U3-Pad2)">
+      <node ref="U4" pin="1"/>
+      <node ref="U3" pin="2"/>
+    </net>
+    <net code="3" name="Net-(D2-Pad2)">
+      <node ref="U1" pin="6"/>
+      <node ref="M3" pin="1"/>
+      <node ref="D2" pin="2"/>
+      <node ref="M4" pin="1"/>
+    </net>
+    <net code="4" name="Net-(D3-Pad1)">
+      <node ref="U1" pin="2"/>
+      <node ref="D3" pin="1"/>
+      <node ref="R1" pin="1"/>
+    </net>
+    <net code="5" name="Net-(D1-Pad2)">
+      <node ref="D1" pin="2"/>
+      <node ref="R1" pin="2"/>
+      <node ref="M1" pin="2"/>
+    </net>
+    <net code="6" name="Net-(D1-Pad1)">
+      <node ref="M1" pin="3"/>
+      <node ref="D1" pin="1"/>
+      <node ref="M3" pin="4"/>
+      <node ref="M3" pin="3"/>
+      <node ref="D2" pin="1"/>
+      <node ref="M1" pin="4"/>
+      <node ref="U1" pin="4"/>
+    </net>
+    <net code="7" name="Net-(U4-Pad2)">
+      <node ref="U4" pin="2"/>
+      <node ref="U7" pin="1"/>
+    </net>
+    <net code="8" name="Net-(U2-Pad1)">
+      <node ref="U6" pin="2"/>
+      <node ref="U2" pin="1"/>
+    </net>
+    <net code="9" name="Net-(M2-Pad2)">
+      <node ref="U5" pin="2"/>
+      <node ref="M2" pin="2"/>
+    </net>
+    <net code="10" name="Net-(D3-Pad2)">
+      <node ref="U1" pin="1"/>
+      <node ref="M4" pin="3"/>
+      <node ref="M4" pin="4"/>
+      <node ref="D3" pin="2"/>
+      <node ref="I2" pin="2"/>
+      <node ref="I1" pin="2"/>
+    </net>
+    <net code="11" name="Net-(M3-Pad2)">
+      <node ref="M4" pin="2"/>
+      <node ref="M3" pin="2"/>
+      <node ref="U7" pin="2"/>
+    </net>
+    <net code="12" name="Net-(I1-Pad1)">
+      <node ref="U6" pin="1"/>
+      <node ref="M1" pin="1"/>
+      <node ref="I1" pin="1"/>
+      <node ref="M2" pin="1"/>
+    </net>
+    <net code="13" name="Net-(I2-Pad1)">
+      <node ref="I2" pin="1"/>
+      <node ref="M2" pin="4"/>
+      <node ref="M2" pin="3"/>
+    </net>
+    <net code="14" name="Net-(U1-Pad3)">
+      <node ref="U1" pin="3"/>
+    </net>
+    <net code="15" name="Net-(U1-Pad7)">
+      <node ref="U1" pin="7"/>
+    </net>
+    <net code="16" name="Net-(U1-Pad8)">
+      <node ref="U1" pin="8"/>
+    </net>
+    <net code="17" name="Net-(U1-Pad5)">
+      <node ref="U1" pin="5"/>
+    </net>
+  </nets>
+</export>
diff --git a/library/SubcircuitLibrary/mic4421/mic4421_Previous_Values.xml b/library/SubcircuitLibrary/mic4421/mic4421_Previous_Values.xml
new file mode 100644
index 000000000..d15d0634b
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4421/mic4421_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><i2 name="Source type">0.0003</i2><i1 name="Source type">0.0001</i1></source><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_inverter<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_inverter<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">adc_bridge<field10 name="Enter value for in_low (default=1.0)" /><field11 name="Enter value for in_high (default=2.0)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /><field13 name="Enter Fall Delay (default=1.0e-9)" /></u5><u6 name="type">dac_bridge<field14 name="Enter value for out_low (default=0.0)" /><field15 name="Enter value for out_high (default=5.0)" /><field16 name="Enter value for out_undef (default=0.5)" /><field17 name="Enter value for input load (default=1.0e-12)" /><field18 name="Enter the Rise Time (default=1.0e-9)" /><field19 name="Enter the Fall Time (default=1.0e-9)" /></u6><u9 name="type">dac_bridge<field20 name="Enter value for out_low (default=0.0)" /><field21 name="Enter value for out_high (default=5.0)" /><field22 name="Enter value for out_undef (default=0.5)" /><field23 name="Enter value for input load (default=1.0e-12)" /><field24 name="Enter the Rise Time (default=1.0e-9)" /><field25 name="Enter the Fall Time (default=1.0e-9)" /></u9><u8 name="type">adc_bridge<field26 name="Enter value for in_low (default=1.0)" /><field27 name="Enter value for in_high (default=2.0)" /><field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /></u8><u7 name="type">dac_bridge<field30 name="Enter value for out_low (default=0.0)" /><field31 name="Enter value for out_high (default=5.0)" /><field32 name="Enter value for out_undef (default=0.5)" /><field33 name="Enter value for input load (default=1.0e-12)" /><field34 name="Enter the Rise Time (default=1.0e-9)" /><field35 name="Enter the Fall Time (default=1.0e-9)" /></u7><u10 name="type">adc_bridge<field36 name="Enter value for in_low (default=1.0)" /><field37 name="Enter value for in_high (default=2.0)" /><field38 name="Enter Rise Delay (default=1.0e-9)" /><field39 name="Enter Fall Delay (default=1.0e-9)" /></u10><u11 name="type">adc_bridge<field40 name="Enter value for in_low (default=1.0)" /><field41 name="Enter value for in_high (default=2.0)" /><field42 name="Enter Rise Delay (default=1.0e-9)" /><field43 name="Enter Fall Delay (default=1.0e-9)" /></u11><u6 name="type">adc_bridge<field10 name="Enter value for in_low (default=1.0)" /><field11 name="Enter value for in_high (default=2.0)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /><field13 name="Enter Fall Delay (default=1.0e-9)" /></u6><u5 name="type">dac_bridge<field20 name="Enter value for out_low (default=0.0)" /><field21 name="Enter value for out_high (default=5.0)" /><field22 name="Enter value for out_undef (default=0.5)" /><field23 name="Enter value for input load (default=1.0e-12)" /><field24 name="Enter the Rise Time (default=1.0e-9)" /><field25 name="Enter the Fall Time (default=1.0e-9)" /></u5></model><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-5um.lib</field><field /><field /><field /></m2><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-5um.lib</field><field /><field /><field /></m4><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-5um.lib</field><field /><field /><field /></m1><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-5um.lib</field><field /><field /><field /></m3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><d3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4422/D.lib b/library/SubcircuitLibrary/mic4422/D.lib
new file mode 100644
index 000000000..f53bf3e03
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/mic4422/NMOS-5um.lib b/library/SubcircuitLibrary/mic4422/NMOS-5um.lib
new file mode 100644
index 000000000..a237e1fe3
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/NMOS-5um.lib
@@ -0,0 +1,5 @@
+* 5um technology
+
+.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7 
++ Level=1
++ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n  )
diff --git a/library/SubcircuitLibrary/mic4422/PMOS-5um.lib b/library/SubcircuitLibrary/mic4422/PMOS-5um.lib
new file mode 100644
index 000000000..9c3ed9760
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/PMOS-5um.lib
@@ -0,0 +1,5 @@
+*5um technology
+
+.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65
++ Level=1
++ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n  )
diff --git a/library/SubcircuitLibrary/mic4422/analysis b/library/SubcircuitLibrary/mic4422/analysis
new file mode 100644
index 000000000..ebd5c0a94
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4422/mic4422-cache.lib b/library/SubcircuitLibrary/mic4422/mic4422-cache.lib
new file mode 100644
index 000000000..caa93ac57
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422-cache.lib
@@ -0,0 +1,206 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# adc_bridge_1
+#
+DEF adc_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "adc_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# dac_bridge_1
+#
+DEF dac_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "dac_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# dc
+#
+DEF dc I 0 40 Y Y 1 F N
+F0 "I" -200 100 60 H V C CNN
+F1 "dc" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+P 2 0 1 0 0 -100 0 -100 N
+P 2 0 1 0 0 100 -50 50 N
+P 2 0 1 0 0 100 0 -100 N
+P 2 0 1 0 0 100 50 50 N
+X ~ 1 0 450 300 D 50 50 1 1 P
+X ~ 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/mic4422/mic4422.cir b/library/SubcircuitLibrary/mic4422/mic4422.cir
new file mode 100644
index 000000000..63863f983
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422.cir
@@ -0,0 +1,26 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\mic4422\mic4422.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 01/07/25 20:16:11
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  Net-_U2-Pad1_ Net-_U2-Pad2_ d_inverter		
+M2  Net-_I1-Pad1_ Net-_M2-Pad2_ Net-_I2-Pad1_ Net-_I2-Pad1_ mosfet_p		
+U4  Net-_U2-Pad2_ Net-_U4-Pad2_ d_inverter		
+M4  Net-_D2-Pad2_ Net-_M3-Pad2_ Net-_D3-Pad2_ Net-_D3-Pad2_ mosfet_p		
+M1  Net-_I1-Pad1_ Net-_D1-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad1_ mosfet_n		
+M3  Net-_D2-Pad2_ Net-_M3-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad1_ mosfet_n		
+I2  Net-_I2-Pad1_ Net-_D3-Pad2_ 0.0003		
+I1  Net-_I1-Pad1_ Net-_D3-Pad2_ 0.0001		
+R1  Net-_D3-Pad1_ Net-_D1-Pad2_ 2k		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+D2  Net-_D1-Pad1_ Net-_D2-Pad2_ eSim_Diode		
+U1  Net-_D3-Pad2_ Net-_D3-Pad1_ ? Net-_D1-Pad1_ ? Net-_D2-Pad2_ ? ? PORT		
+D3  Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode		
+U5  Net-_I1-Pad1_ Net-_U2-Pad1_ adc_bridge_1		
+U6  Net-_U4-Pad2_ Net-_M3-Pad2_ dac_bridge_1		
+U3  Net-_U2-Pad2_ Net-_M2-Pad2_ dac_bridge_1		
+
+.end
diff --git a/library/SubcircuitLibrary/mic4422/mic4422.cir.out b/library/SubcircuitLibrary/mic4422/mic4422.cir.out
new file mode 100644
index 000000000..7b32d8850
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422.cir.out
@@ -0,0 +1,45 @@
+* c:\fossee\esim\library\subcircuitlibrary\mic4422\mic4422.cir
+
+.include PMOS-5um.lib
+.include NMOS-5um.lib
+.include D.lib
+* u2  net-_u2-pad1_ net-_u2-pad2_ d_inverter
+m2 net-_i1-pad1_ net-_m2-pad2_ net-_i2-pad1_ net-_i2-pad1_ mos_p W=100u L=100u M=1
+* u4  net-_u2-pad2_ net-_u4-pad2_ d_inverter
+m4 net-_d2-pad2_ net-_m3-pad2_ net-_d3-pad2_ net-_d3-pad2_ mos_p W=100u L=100u M=1
+m1 net-_i1-pad1_ net-_d1-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+m3 net-_d2-pad2_ net-_m3-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+i2  net-_i2-pad1_ net-_d3-pad2_ 0.0003
+i1  net-_i1-pad1_ net-_d3-pad2_ 0.0001
+r1  net-_d3-pad1_ net-_d1-pad2_ 2k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad1_ net-_d2-pad2_ 1N4148
+* u1  net-_d3-pad2_ net-_d3-pad1_ ? net-_d1-pad1_ ? net-_d2-pad2_ ? ? port
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+* u5  net-_i1-pad1_ net-_u2-pad1_ adc_bridge_1
+* u6  net-_u4-pad2_ net-_m3-pad2_ dac_bridge_1
+* u3  net-_u2-pad2_ net-_m2-pad2_ dac_bridge_1
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 net-_u2-pad2_ net-_u4-pad2_ u4
+a3 [net-_i1-pad1_ ] [net-_u2-pad1_ ] u5
+a4 [net-_u4-pad2_ ] [net-_m3-pad2_ ] u6
+a5 [net-_u2-pad2_ ] [net-_m2-pad2_ ] u3
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
+.model u5 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u6 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u3 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/mic4422/mic4422.pro b/library/SubcircuitLibrary/mic4422/mic4422.pro
new file mode 100644
index 000000000..e27a398be
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/mic4422/mic4422.sch b/library/SubcircuitLibrary/mic4422/mic4422.sch
new file mode 100644
index 000000000..023e922a3
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422.sch
@@ -0,0 +1,422 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
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+Date ""
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diff --git a/library/SubcircuitLibrary/mic4422/mic4422.sub b/library/SubcircuitLibrary/mic4422/mic4422.sub
new file mode 100644
index 000000000..b893facd5
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422.sub
@@ -0,0 +1,39 @@
+* Subcircuit mic4422
+.subckt mic4422 net-_d3-pad2_ net-_d3-pad1_ ? net-_d1-pad1_ ? net-_d2-pad2_ ? ? 
+* c:\fossee\esim\library\subcircuitlibrary\mic4422\mic4422.cir
+.include PMOS-5um.lib
+.include NMOS-5um.lib
+.include D.lib
+* u2  net-_u2-pad1_ net-_u2-pad2_ d_inverter
+m2 net-_i1-pad1_ net-_m2-pad2_ net-_i2-pad1_ net-_i2-pad1_ mos_p W=100u L=100u M=1
+* u4  net-_u2-pad2_ net-_u4-pad2_ d_inverter
+m4 net-_d2-pad2_ net-_m3-pad2_ net-_d3-pad2_ net-_d3-pad2_ mos_p W=100u L=100u M=1
+m1 net-_i1-pad1_ net-_d1-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+m3 net-_d2-pad2_ net-_m3-pad2_ net-_d1-pad1_ net-_d1-pad1_ mos_n W=100u L=100u M=1
+i2  net-_i2-pad1_ net-_d3-pad2_ 0.0003
+i1  net-_i1-pad1_ net-_d3-pad2_ 0.0001
+r1  net-_d3-pad1_ net-_d1-pad2_ 2k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad1_ net-_d2-pad2_ 1N4148
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+* u5  net-_i1-pad1_ net-_u2-pad1_ adc_bridge_1
+* u6  net-_u4-pad2_ net-_m3-pad2_ dac_bridge_1
+* u3  net-_u2-pad2_ net-_m2-pad2_ dac_bridge_1
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 net-_u2-pad2_ net-_u4-pad2_ u4
+a3 [net-_i1-pad1_ ] [net-_u2-pad1_ ] u5
+a4 [net-_u4-pad2_ ] [net-_m3-pad2_ ] u6
+a5 [net-_u2-pad2_ ] [net-_m2-pad2_ ] u3
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             adc_bridge_1, NgSpice Name: adc_bridge
+.model u5 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u6 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
+* Schematic Name:                             dac_bridge_1, NgSpice Name: dac_bridge
+.model u3 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
+* Control Statements
+
+.ends mic4422
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/mic4422/mic4422_Previous_Values.xml b/library/SubcircuitLibrary/mic4422/mic4422_Previous_Values.xml
new file mode 100644
index 000000000..5beb94705
--- /dev/null
+++ b/library/SubcircuitLibrary/mic4422/mic4422_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><i2 name="Source type">0.0003</i2><i1 name="Source type">0.0001</i1></source><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u4 name="type">d_inverter<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">adc_bridge<field7 name="Enter value for in_low (default=1.0)" /><field8 name="Enter value for in_high (default=2.0)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /><field10 name="Enter Fall Delay (default=1.0e-9)" /></u5><u6 name="type">dac_bridge<field11 name="Enter value for out_low (default=0.0)" /><field12 name="Enter value for out_high (default=5.0)" /><field13 name="Enter value for out_undef (default=0.5)" /><field14 name="Enter value for input load (default=1.0e-12)" /><field15 name="Enter the Rise Time (default=1.0e-9)" /><field16 name="Enter the Fall Time (default=1.0e-9)" /></u6><u3 name="type">dac_bridge<field17 name="Enter value for out_low (default=0.0)" /><field18 name="Enter value for out_high (default=5.0)" /><field19 name="Enter value for out_undef (default=0.5)" /><field20 name="Enter value for input load (default=1.0e-12)" /><field21 name="Enter the Rise Time (default=1.0e-9)" /><field22 name="Enter the Fall Time (default=1.0e-9)" /></u3></model><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-5um.lib</field><field /><field /><field /></m2><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-5um.lib</field><field /><field /><field /></m4><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-5um.lib</field><field /><field /><field /></m1><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-5um.lib</field><field /><field /><field /></m3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><d3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file