[AMDGPU] Avoid or clean unused IMPLICIT_DEF generated from SIFixSGPRCopies pass with REG_SEQUENCE instructions

[JanekvO]

An example can be found in llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll:

   ....
   [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
   [[DEF1:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
   [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.sub0, [[COPY3]], %subreg.sub1
   ....

Where the implicit_defs remain unused

Seems to be caused by some juggling of sgpr/vgpr with reg_sequence in SIFixSGPRCopies.

sgpr = reg_sequence vgpr, ...., vgpr, ....

to

sgpr = copy vgpr
sgpr = copy vgpr
sgpr = reg_sequence sgpr, ...., sgpr, ....

to

sgpr = implicit_def
sgpr = implicit_def
vgpr= reg_sequence vgpr, ...., vgpr, ....
<uses changes to vgpr>

I assume it's a non-issue, but I'd like to see it not emit implicit_def. Not sure if it's best to avoid the implicit_def altogether or have a clean up stage.

[llvmbot]

@llvm/issue-subscribers-backend-amdgpu

Author: Janek van Oirschot (JanekvO)

An example can be found in `llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll`: ``` .... [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF [[DEF1:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY4]], %subreg.sub0, [[COPY3]], %subreg.sub1 .... ``` Where the implicit_defs remain unused

Seems to be caused by some juggling of sgpr/vgpr with reg_sequence in SIFixSGPRCopies.

sgpr = reg_sequence vgpr, ...., vgpr, ....

to

sgpr = copy vgpr
sgpr = copy vgpr
sgpr = reg_sequence sgpr, ...., sgpr, ....

to

sgpr = implicit_def
sgpr = implicit_def
vgpr= reg_sequence vgpr, ...., vgpr, ....
<uses changes to vgpr>

I assume it's a non-issue, but I'd like to see it not emit implicit_def. Not sure if it's best to avoid the implicit_def altogether or have a clean up stage.