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    • Multi-platform nightly builds of open source digital design and verification tools
      Shell
      1051.2k726Updated Oct 31, 2025Oct 31, 2025
    • yosys

      Public
      Yosys Open SYnthesis Suite
      C++
      9944.1k48194Updated Oct 30, 2025Oct 30, 2025
    • nextpnr

      Public
      nextpnr portable FPGA place and route tool
      C++
      2741.5k10810Updated Oct 29, 2025Oct 29, 2025
    • Project Peppercorn - GateMate FPGA Bitstream Documentation
      Python
      32700Updated Oct 29, 2025Oct 29, 2025
    • apicula

      Public
      Project Apicula 🐝: bitstream documentation for Gowin FPGAs
      Verilog
      79593182Updated Oct 28, 2025Oct 28, 2025
    • Documenting the Lattice ECP5 bit-stream format.
      Python
      944283714Updated Oct 27, 2025Oct 27, 2025
    • RISC-V Formal Verification Framework
      Verilog
      3616263Updated Oct 22, 2025Oct 22, 2025
    • Project Peppercorn GateMate Test Cases
      Verilog
      61000Updated Oct 21, 2025Oct 21, 2025
    • sby

      Public
      SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
      Python
      83476419Updated Oct 20, 2025Oct 20, 2025
    • mcy

      Public
      Mutation Cover with Yosys (MCY)
      C++
      148811Updated Oct 15, 2025Oct 15, 2025
    • abc

      Public
      ABC: System for Sequential Logic Synthesis and Formal Verification
      C
      7092903Updated Oct 14, 2025Oct 14, 2025
    • sby-gui

      Public
      GUI for SymbiYosys
      C++
      51771Updated Oct 13, 2025Oct 13, 2025
    • nerv

      Public
      Naive Educational RISC V processor
      SystemVerilog
      169121Updated Oct 12, 2025Oct 12, 2025
    • eqy

      Public
      Equivalence checking with Yosys
      C++
      851180Updated Oct 8, 2025Oct 8, 2025
    • icestorm

      Public
      Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
      Python
      2341.1k4720Updated Sep 22, 2025Sep 22, 2025
    • Project Trellis database
      121301Updated Sep 15, 2025Sep 15, 2025
    • scy

      Public
      Sequence of Covers with Yosys
      SystemVerilog
      1610Updated Sep 4, 2025Sep 4, 2025
    • Yosys RTLIL dialect for MLIR
      C++
      11210Updated Jun 12, 2025Jun 12, 2025
    • furo-ys

      Public
      A clean customizable documentation theme for Sphinx
      Sass
      368100Updated Apr 21, 2025Apr 21, 2025
    • mau

      Public
      Modular Application Utilities
      Python
      3510Updated Feb 12, 2025Feb 12, 2025
    • imctk

      Public
      Incremental Model Checking Toolkit
      Rust
      210411Updated Jan 30, 2025Jan 30, 2025
    • Verilog
      5622Updated Jan 16, 2025Jan 16, 2025
    • HTML
      1400Updated Oct 7, 2024Oct 7, 2024
    • yosys-web

      Public
      Yosys Web Page
      HTML
      6210Updated Oct 7, 2024Oct 7, 2024
    • picorv32

      Public
      PicoRV32 - A Size-Optimized RISC-V CPU
      Verilog
      8703.7k6615Updated Jun 27, 2024Jun 27, 2024
    • A Verilog Synthesis Regression Test
      Shell
      113703Updated Mar 21, 2024Mar 21, 2024
    • Set up your GitHub Actions workflow with a OSS CAD Suite
      TypeScript
      31641Updated Mar 21, 2024Mar 21, 2024
    • padring

      Public
      A padring generator for ASICs
      C++
      112521Updated May 17, 2023May 17, 2023
    • .github

      Public
      0000Updated Apr 4, 2023Apr 4, 2023
    • yosys-manual-build

      Public archive
      Yosys manual
      Dockerfile
      0100Updated Oct 24, 2022Oct 24, 2022