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uni normalize removes NOP delay slots generated from .asm.mir file  #49

@romits800

Description

@romits800

When running uni normalize for Mips the delay slots two of the delay slots (NOPs) in .asm.mir file do not appear in the .llvm.mir file:

uni normalize --target=Mips sphinx3.glist.glist_tail.asm.mir -o sphinx3.glist.glist_tail.llvm.mir
cat sphinx3.glist.glist_tail.asm.mir
body:             |
  bb.0 (%ir-block.0, freq 8):
    successors: %bb.2..loopexit(37), %bb.1..preheader(62)
    liveins: %a0
  
    BEQ %a0, %zero, %bb.2..loopexit, implicit-def dead %at {
      %v0 = ADDiu %zero, 0
    }
  
  bb.1..preheader (freq 159):
    successors: %bb.2..loopexit(3), %bb.1..preheader(96)
    liveins: %a0
  
    %v0 = OR killed %a0, %zero
    %a0 = LW %v0, 8 :: (load 4 from %ir.2, align 8)
    BNE %a0, %zero, %bb.1..preheader, implicit-def %at {
      NOP
    }
  
  bb.2..loopexit (freq 8):
    liveins: %v0
    liveouts:
  
    PseudoReturn %ra {
      NOP
    }

...

and

cat sphinx3.glist.glist_tail.llvm.mir
name:            glist_tail
body:             |
  bb.0 (freq 8):
    successors: %bb.2(1), %bb.1(2)
  
    BEQ %a0, %zero, %bb.2, implicit %at, implicit-def %at {
      %v0 = ADDiu %zero, 0
    }
  
  bb.1 (freq 159):
    successors: %bb.1(1), %bb.2(2)
  
    %v0 = OR %a0, %zero
    %a0 = LW %v0, 8
    BNE %a0, %zero, %bb.1, implicit %at, implicit-def %at
  
  bb.2 (freq 8):
  
    PseudoReturn %ra

...

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