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remove 3d arch file from arch/titan
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vtr_flow/arch/multi_die/stratixiv_3d/3d_full_OPIN_inter_die_stratixiv_arch.timing.xml

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@@ -5048,6 +5048,140 @@
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<col type="EMPTY" startx="33" repeatx="43" starty="1" priority="99"/>
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</layer>
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</fixed_layout>
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<fixed_layout name="neuron3d" width="92" height="68">
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<layer die="1">
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<!-- Stratix IV IO blocks connect to both horizontal and vertical
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routing channels. We approximate this by placing them one unit
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'in' from the true perimeter (which is left empty). This means
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that they are fully surrounded by routing channels, allowing them
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to connect to both horizontal and vertical channels. This is a
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minor approximation since on real Stratix IV devices there is no
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perimeter-side vertical routing channel -->
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<perimeter type="EMPTY" priority="5000"/>
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<col type="io" startx="1" priority="1001"/>
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<!-- Left side -->
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<col type="io" startx="W-2" priority="1001"/>
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<!-- Right side -->
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<row type="io" starty="1" priority="1000"/>
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<!-- Bottom side -->
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<row type="io" starty="H-2" priority="1000"/>
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<!-- Top side -->
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<!-- Stratix IV devices support up to 16 Global clocks and 12 PLLs located
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around the device perimeter as indicated in Figure 5-1 of Chapter 5
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of the Stratix IV handbook.
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Note the use of different priorities to avoid ambiguity on small devices -->
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<single type="PLL" x="1" y="H-2" priority="1997"/>
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<!-- L1 -->
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<single type="PLL" x="1" y="H/2" priority="2000"/>
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<!-- L2 -->
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<single type="PLL" x="1" y="H/2 - 1" priority="1999"/>
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<!-- L3 -->
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<single type="PLL" x="1" y="1" priority="1998"/>
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<!-- L4 -->
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<single type="PLL" x="W - 2" y="H-2" priority="1997"/>
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<!-- R1 -->
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<single type="PLL" x="W - 2" y="H/2" priority="2000"/>
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<!-- R2 -->
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<single type="PLL" x="W - 2" y="H/2 - 1" priority="1999"/>
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<!-- R3 -->
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<single type="PLL" x="W - 2" y="1" priority="1998"/>
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<!-- R4 -->
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<single type="PLL" x="W/2" y="H-2" priority="1996"/>
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<!-- T1 -->
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<single type="PLL" x="W/2 + 1" y="H-2" priority="1995"/>
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<!-- T2 -->
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<single type="PLL" x="W/2 - 1" y="H-2" priority="1992"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2 + 2" y="H-2" priority="1991"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2" y="1" priority="1994"/>
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<!-- B1 -->
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<single type="PLL" x="W/2 + 1" y="1" priority="1993"/>
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<!-- B2 -->
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<single type="PLL" x="W/2 - 1" y="1" priority="1990"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2 + 2" y="1" priority="1989"/>
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<!-- GCLK -->
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<!--Fill with 'LAB'-->
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<fill type="LAB" priority="10"/>
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<!--Column of 'DSP' with 'EMPTY' blocks wherever a 'DSP' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="DSP" startx="6" starty="2" repeatx="40" priority="150"/>
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<col type="EMPTY" startx="6" repeatx="40" starty="1" priority="149"/>
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<!--Column of 'M9K' with 'EMPTY' blocks wherever a 'M9K' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="M9K" startx="5" starty="2" repeatx="26" priority="50"/>
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<col type="EMPTY" startx="5" repeatx="26" starty="1" priority="49"/>
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<!--Column of 'M144K' with 'EMPTY' blocks wherever a 'M144K' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="M144K" startx="33" starty="2" repeatx="43" priority="100"/>
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<col type="EMPTY" startx="33" repeatx="43" starty="1" priority="99"/>
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</layer>
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<layer die="0">
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<!-- Stratix IV IO blocks connect to both horizontal and vertical
5120+
routing channels. We approximate this by placing them one unit
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'in' from the true perimeter (which is left empty). This means
5122+
that they are fully surrounded by routing channels, allowing them
5123+
to connect to both horizontal and vertical channels. This is a
5124+
minor approximation since on real Stratix IV devices there is no
5125+
perimeter-side vertical routing channel -->
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<perimeter type="EMPTY" priority="5000"/>
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<col type="io" startx="1" priority="1001"/>
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<!-- Left side -->
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<col type="io" startx="W-2" priority="1001"/>
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<!-- Right side -->
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<row type="io" starty="1" priority="1000"/>
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<!-- Bottom side -->
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<row type="io" starty="H-2" priority="1000"/>
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<!-- Top side -->
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<!-- Stratix IV devices support up to 16 Global clocks and 12 PLLs located
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around the device perimeter as indicated in Figure 5-1 of Chapter 5
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of the Stratix IV handbook.
5138+
5139+
Note the use of different priorities to avoid ambiguity on small devices -->
5140+
<single type="PLL" x="1" y="H-2" priority="1997"/>
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<!-- L1 -->
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<single type="PLL" x="1" y="H/2" priority="2000"/>
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<!-- L2 -->
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<single type="PLL" x="1" y="H/2 - 1" priority="1999"/>
5145+
<!-- L3 -->
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<single type="PLL" x="1" y="1" priority="1998"/>
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<!-- L4 -->
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<single type="PLL" x="W - 2" y="H-2" priority="1997"/>
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<!-- R1 -->
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<single type="PLL" x="W - 2" y="H/2" priority="2000"/>
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<!-- R2 -->
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<single type="PLL" x="W - 2" y="H/2 - 1" priority="1999"/>
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<!-- R3 -->
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<single type="PLL" x="W - 2" y="1" priority="1998"/>
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<!-- R4 -->
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<single type="PLL" x="W/2" y="H-2" priority="1996"/>
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<!-- T1 -->
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<single type="PLL" x="W/2 + 1" y="H-2" priority="1995"/>
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<!-- T2 -->
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<single type="PLL" x="W/2 - 1" y="H-2" priority="1992"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2 + 2" y="H-2" priority="1991"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2" y="1" priority="1994"/>
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<!-- B1 -->
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<single type="PLL" x="W/2 + 1" y="1" priority="1993"/>
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<!-- B2 -->
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<single type="PLL" x="W/2 - 1" y="1" priority="1990"/>
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<!-- GCLK -->
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<single type="PLL" x="W/2 + 2" y="1" priority="1989"/>
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<!-- GCLK -->
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<!--Fill with 'LAB'-->
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<fill type="LAB" priority="10"/>
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<!--Column of 'DSP' with 'EMPTY' blocks wherever a 'DSP' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="DSP" startx="6" starty="2" repeatx="40" priority="150"/>
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<col type="EMPTY" startx="6" repeatx="40" starty="1" priority="149"/>
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<!--Column of 'M9K' with 'EMPTY' blocks wherever a 'M9K' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="M9K" startx="5" starty="2" repeatx="26" priority="50"/>
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<col type="EMPTY" startx="5" repeatx="26" starty="1" priority="49"/>
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<!--Column of 'M144K' with 'EMPTY' blocks wherever a 'M144K' does not fit. Vertical offset by 1 for perimeter.-->
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<col type="M144K" startx="33" starty="2" repeatx="43" priority="100"/>
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<col type="EMPTY" startx="33" repeatx="43" starty="1" priority="99"/>
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</layer>
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</fixed_layout>
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<!--
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Stratix IV has only 4 unique device dies.
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Some devices are 'virtual': based off another die, with utilization limits controlled by Quartus

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