diff --git a/ODIN_II/SRC/BLIFElaborate.cpp b/ODIN_II/SRC/BLIFElaborate.cpp index 73f8bb66544..7ae10dc3fd9 100644 --- a/ODIN_II/SRC/BLIFElaborate.cpp +++ b/ODIN_II/SRC/BLIFElaborate.cpp @@ -317,13 +317,13 @@ void blif_elaborate_node(nnode_t* node, short traverse_number, netlist_t* netlis case INPUT_NODE: //fallthrough case OUTPUT_NODE: //fallthrough case HARD_IP: //fallthrough + case CLOCK_NODE: //fallthroguh case BUF_NODE: { /* some are already resolved for this phase */ break; } case ADDER_FUNC: case CARRY_FUNC: - case CLOCK_NODE: case GENERIC: default: error_message(BLIF_ELABORATION, node->loc, "node (%s: %s) should have been converted to softer version.", node->type, node->name); diff --git a/ODIN_II/SRC/BLIFReader.cpp b/ODIN_II/SRC/BLIFReader.cpp index d96a5a3f9a3..0d606d47727 100644 --- a/ODIN_II/SRC/BLIFReader.cpp +++ b/ODIN_II/SRC/BLIFReader.cpp @@ -273,8 +273,13 @@ void BLIF::Reader::hook_up_node(nnode_t* node) { nnet_t* output_net = (nnet_t*)output_nets_hash->get(input_pin->name); - if (!output_net) - error_message(PARSE_BLIF, my_location, "Error: Could not hook up the pin %s: not available.", input_pin->name); + if (!output_net) { + if (configuration.coarsen) + warning_message(PARSE_BLIF, my_location, "Warn: Could not hook up the pin %s: not available.", input_pin->name); + else + error_message(PARSE_BLIF, my_location, "Error: Could not hook up the pin %s: not available.", input_pin->name); + return; + } add_fanout_pin_to_net(output_net, input_pin); } @@ -1186,11 +1191,11 @@ operation_list BLIF::Reader::read_bit_map_find_unknown_gate(int input_count, nno /* Assumption that bit map is in order when read from blif */ else if (line_count_bitmap == 2) { /* LOGICAL_XOR */ - if ((strcmp(bit_map[0], "01") == 0) && (strcmp(bit_map[1], "10") == 0)) { + if (((strcmp(bit_map[0], "01") == 0) && (strcmp(bit_map[1], "10") == 0)) || ((strcmp(bit_map[0], "10") == 0) && (strcmp(bit_map[1], "01") == 0))) { to_return = LOGICAL_XOR; } /* LOGICAL_XNOR */ - else if ((strcmp(bit_map[0], "00") == 0) && (strcmp(bit_map[1], "11") == 0)) { + else if (((strcmp(bit_map[0], "00") == 0) && (strcmp(bit_map[1], "11") == 0)) || ((strcmp(bit_map[0], "11") == 0) && (strcmp(bit_map[1], "00") == 0))) { to_return = LOGICAL_XNOR; } /* SMUX_2 */ @@ -1372,7 +1377,11 @@ void BLIF::Reader::create_latch_node_and_driver() { input_token_count += 1; names = (char**)vtr::realloc(names, (sizeof(char*)) * (input_token_count)); - names[input_token_count - 1] = resolve_signal_name_based_on_blif_type(blif_netlist->identifier, ptr); + // to avoid concatenating the top module name to edge sentivity and init value inputs + if (configuration.coarsen && (input_token_count == 3 || input_token_count == 5)) + names[input_token_count - 1] = resolve_signal_name_based_on_blif_type(nullptr, ptr); + else + names[input_token_count - 1] = resolve_signal_name_based_on_blif_type(blif_netlist->identifier, ptr); } /* assigning the new_node */ diff --git a/ODIN_II/SRC/BLIFWriter.cpp b/ODIN_II/SRC/BLIFWriter.cpp index 21ced99c6b6..f73dfbecab6 100644 --- a/ODIN_II/SRC/BLIFWriter.cpp +++ b/ODIN_II/SRC/BLIFWriter.cpp @@ -342,6 +342,9 @@ void BLIF::Writer::output_blif(FILE* out, const netlist_t* netlist) { nnet_t* net = node->input_pins[0]->net; warn_undriven(node, net); for (int j = 0; j < net->num_driver_pins; j++) { + // skip if their names is identical + if (coarsen_cleanup && net->driver_pins[j]->name && node->name && !strcmp(net->driver_pins[j]->name, node->name)) + continue; fprintf(out, ".names"); print_net_driver(out, node, net, j); print_output_pin(out, node); diff --git a/ODIN_II/SRC/BlockMemories.cpp b/ODIN_II/SRC/BlockMemories.cpp index b964283072f..f0501aaa4fc 100644 --- a/ODIN_II/SRC/BlockMemories.cpp +++ b/ODIN_II/SRC/BlockMemories.cpp @@ -1074,13 +1074,8 @@ static void create_nrmw_dual_port_ram(block_memory_t* bram, netlist_t* netlist) nnode_t* old_node = bram->node; int data_width = bram->node->attributes->DBITS; int addr_width = bram->node->attributes->ABITS; - int num_rd_ports = old_node->attributes->RD_PORTS; int num_wr_ports = old_node->attributes->WR_PORTS; - /* should have been resovled before this function */ - oassert(num_rd_ports > 2); - oassert(num_wr_ports > 2); - /* dual port ram signals */ dp_ram_signals* signals = (dp_ram_signals*)vtr::calloc(1, sizeof(dp_ram_signals)); signal_list_t* selectors = NULL; @@ -1706,9 +1701,20 @@ static void perform_optimization(block_memory_t* memory) { * @return last item outputs in the chain of cascaded signals */ static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t* selectors, int desired_width, nnode_t* node, netlist_t* netlist) { + signal_list_t* return_value = NULL; + /* check if cascade is needed */ if (signalvar->count == desired_width) { - return (signalvar); + return_value = init_signal_list(); + if (selectors->count == desired_width) { + for (int i = 0; i < signalvar->count; ++i) + add_pin_to_signal_list(return_value, selectors->pins[i]); + } else { + for (int i = 0; i < signalvar->count; ++i) + add_pin_to_signal_list(return_value, signalvar->pins[i]); + } + + return (return_value); } /* validate signals list size */ @@ -1716,7 +1722,6 @@ static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t int i, j; int num_chunk = signalvar->count / desired_width; - signal_list_t* return_value = NULL; /* validate selector size */ oassert(selectors->count == num_chunk); diff --git a/ODIN_II/SRC/FlipFlop.cpp b/ODIN_II/SRC/FlipFlop.cpp index 982978a8387..7a128f22f14 100644 --- a/ODIN_II/SRC/FlipFlop.cpp +++ b/ODIN_II/SRC/FlipFlop.cpp @@ -65,6 +65,10 @@ void resolve_dff_node(nnode_t* node, uintptr_t traverse_mark_number, netlist_t* npin_t* clk_pin = node->input_pins[0]; clk_pin->sensitivity = node->attributes->clk_edge_type; + /* already satisfy the partial mapper requirements */ + if (width == 1) + return; + /* remapping the D inputs to [1..n] */ for (i = 0; i < width; i++) { make_ff_node(node->input_pins[i + clk_width], // D diff --git a/ODIN_II/SRC/YYosys.cpp b/ODIN_II/SRC/YYosys.cpp index 84e62fa2cbd..a0b67dafbbd 100644 --- a/ODIN_II/SRC/YYosys.cpp +++ b/ODIN_II/SRC/YYosys.cpp @@ -300,12 +300,28 @@ void YYosys::execute() { run_pass(std::string("hierarchy -check -auto-top -purge_lib")); } - // Translate processes to netlist components such as MUXs, FFs and latches - run_pass(std::string("proc; opt;")); + /* + * Translate processes to netlist components such as MUXs, FFs and latches + * Transform the design into a new one with single top module + */ + run_pass(std::string("proc; flatten; opt_expr; opt_clean;")); + /* + * Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. + * "-nodffe" to disable dff -> dffe conversion, and other transforms recognizing clock enable + * "-nosdff" to disable dff -> sdff conversion, and other transforms recognizing sync resets + */ + run_pass(std::string("check; opt -nodffe -nosdff;")); // Extraction and optimization of finite state machines run_pass(std::string("fsm; opt;")); - // Collects memories, their port and create multiport memory cells - run_pass(std::string("memory_collect; memory_dff; opt;")); + // To possibly reduce word sizes by Yosys + run_pass(std::string("wreduce;")); + // To applies a collection of peephole optimizers to the current design. + run_pass(std::string("peepopt; opt_clean;")); + /* + * To merge shareable resources into a single resource. A SAT solver + * is used to determine if two resources are share-able + */ + run_pass(std::string("share; opt;")); // Use a readable name convention // [NOTE]: the 'autoname' process has a high memory footprint for giant netlists @@ -317,8 +333,15 @@ void YYosys::execute() { // Transform asynchronous dffs to synchronous dffs using techlib files provided by Yosys run_pass(std::string("techmap -map " + this->odin_techlib + "/adff2dff.v")); run_pass(std::string("techmap -map " + this->odin_techlib + "/adffe2dff.v")); - // To resolve Yosys internal indexed part-select circuitries - run_pass(std::string("techmap */t:$shift */t:$shiftx")); + + // Yosys performs various optimizations on memories in the design. Then, it detects DFFs at + // memory read ports and merges them into the memory port. I.e. it consumes an asynchronous + // memory port and the flip-flops at its interface and yields a synchronous memory port. + // Afterwards, Yosys detects cases where an asynchronous read port is only connected via a mux + // tree to a write port with the same address. When such a connection is found, it is replaced + // with a new condition on an enable signal, allowing for removal of the read port. Finally + // Yosys collects memories, their port and create multiport memory cells. + run_pass(std::string("opt_mem; memory_dff; opt_clean; opt_mem_feedback; opt_clean; memory_collect;")); /** * convert yosys mem blocks to BRAMs / ROMs @@ -333,19 +356,35 @@ void YYosys::execute() { * Yosys::run_pass(std::string("techmap -map ", this->odin_techlib, "/mem_map.v")); */ + /* + * Transforming all RTLIL components into LUTs except for memories, adders, subtractors, + * multipliers, DFFs with set (VCC) and clear (GND) signals, and DFFs with the set (VCC), + * clear (GND), and enable signals The Odin-II partial mapper will perform the technology + * mapping for the above-mentioned circuits + * + * [NOTE]: the purpose of using this pass is to keep the connectivity of internal signals + * in the coarse-grained BLIF file, as they were not properly connected in the + * initial implementation of Yosys+Odin-II, which did not use this pass + */ + run_pass(std::string("techmap -autoproc */t:$mem */t:$memrd */t:$add */t:$sub */t:$mul */t:$dffsr */t:$dffsre */t:$sr */t:$dlatch */t:$adlatch %% %n")); + // Transform the design into a new one with single top module run_pass(std::string("flatten")); - // Transforms PMUXes into trees of regular multiplexers - run_pass(std::string("pmuxtree")); - // To possibly reduce word sizes by Yosys - run_pass(std::string("wreduce")); + + // To possibly reduce word sizes by Yosys and fine-graining the basic operations + run_pass(std::string("wreduce; simplemap */t:$dffsr */t:$dffsre */t:$sr */t:$dlatch */t:$adlatch %% %n;")); + // Turn all DFFs into simple latches + run_pass(std::string("dffunmap; opt -fast -noff;")); + + // Check the hierarchy for any unknown modules, and purge all modules (including blackboxes) that aren't used + run_pass(std::string("hierarchy -check -purge_lib")); // "-undriven" to ensure there is no wire without drive - // -noff #potential option to remove all sdffXX and etc. Only dff will remain + // "-noff" option to remove all sdffXX and etc. Only dff will remain // "opt_muxtree" removes dead branches, "opt_expr" performs const folding and // removes "undef" from mux inputs and replace muxes with buffers and inverters - run_pass(std::string("opt -undriven -full; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;")); + run_pass(std::string("opt -undriven -full -noff; opt_muxtree; opt_expr -mux_undef -mux_bool -fine;;;")); // Use a readable name convention - run_pass(std::string("autoname")); + run_pass(std::string("autoname;")); // Print statistics run_pass(std::string("stat")); } diff --git a/ODIN_II/SRC/include/odin_error.h b/ODIN_II/SRC/include/odin_error.h index 115133f0faf..8a71f62599f 100644 --- a/ODIN_II/SRC/include/odin_error.h +++ b/ODIN_II/SRC/include/odin_error.h @@ -39,25 +39,29 @@ extern std::vector> include_file_names; extern int delayed_errors; extern const loc_t unknown_location; -#ifdef ODIN_USE_YOSYS +#define SYSTEMVERILOG_PARSER_ERROR \ + "The SystemVerilog parser is provided within Yosys. " \ + "Please use the Yosys elaborator to synthesize SystemVerilog files.\n" +#define UHDM_PARSER_ERROR \ + "The UHDM parser is provided within Yosys. " \ + "Please use the Yosys elaborator to synthesize UHDM files.\n" + +#ifndef ODIN_USE_YOSYS +# define YOSYS_INSTALLATION_ERROR \ + "It seems Yosys is not installed in the VTR repository. " \ + "Please compile the VTR with (\" -DODIN_USE_YOSYS=ON \") flag.\n" +#else # define YOSYS_ELABORATION_ERROR \ "Yosys failed to perform elaboration, " \ "Please look at the log file for the failure cause or pass \'--show_yosys_log\' to Odin-II to see the logs.\n" # define YOSYS_FORK_ERROR \ "Yosys child process failed to be created\n" -# define YOSYS_PLUGINS_WITH_ODIN_ERROR \ - "Utilizing SystemVerilog/UHDM plugins requires activating the Yosys frontend.\ - Please recompile the VTR project either with the \"WITH_YOSYS\" or \"ODIN_USE_YOSYS\" flag on." -#else -# define YOSYS_INSTALLATION_ERROR \ - "It seems Yosys is not installed in the VTR repository." \ - " Please compile the VTR with (\" -DODIN_USE_YOSYS=ON \") flag.\n" #endif #ifndef YOSYS_SV_UHDM_PLUGIN -# define YOSYS_PLUGINS_NOT_COMPILED \ - "SystemVerilog/UHDM plugins are not compiled.\ - Please recompile the VTR project with the \"YOSYS_SV_UHDM_PLUGIN\" flag on." +# define YOSYS_PLUGINS_NOT_COMPILED \ + "SystemVerilog/UHDM plugins are not compiled. " \ + "Please recompile the VTR project with the \"YOSYS_SV_UHDM_PLUGIN\" flag on." #endif // causes an interrupt in GDB diff --git a/ODIN_II/SRC/include/odin_util.h b/ODIN_II/SRC/include/odin_util.h index fb9c51ffaf5..d2c8b51ff5c 100644 --- a/ODIN_II/SRC/include/odin_util.h +++ b/ODIN_II/SRC/include/odin_util.h @@ -12,7 +12,7 @@ long shift_left_value_with_overflow_check(long input_value, long shift_by, loc_t std::string get_file_extension(std::string input_file); std::string get_directory(std::string input_file); void create_directory(std::string path); -void assert_valid_file_extenstion(std::vector name_list, file_type_e type); +void report_frontend_elaborator(); void assert_supported_file_extension(std::string input_file, loc_t loc); FILE* open_file(const char* file_name, const char* open_type); void get_current_path(); diff --git a/ODIN_II/SRC/netlist_statistic.cpp b/ODIN_II/SRC/netlist_statistic.cpp index 5866114395e..625b3a5548c 100644 --- a/ODIN_II/SRC/netlist_statistic.cpp +++ b/ODIN_II/SRC/netlist_statistic.cpp @@ -487,7 +487,7 @@ void compute_statistics(netlist_t* netlist, bool display) { auto unused_pi = netlist->num_top_input_nodes - netlist->num_of_type[op] - netlist->num_of_type[CLOCK_NODE]; if (unused_pi > 0) { hdr = std::string("Number of unused <") - + operation_list_STR[op][ODIN_LONG_STRING] + + operation_list_STR[INPUT_NODE][ODIN_LONG_STRING] + "> node: "; printf("%-42s%lld\n", hdr.c_str(), unused_pi); } @@ -497,7 +497,7 @@ void compute_statistics(netlist_t* netlist, bool display) { auto unused_po = netlist->num_top_output_nodes - netlist->num_of_type[op]; if (unused_po > 0) { hdr = std::string("Number of unused <") - + operation_list_STR[op][ODIN_LONG_STRING] + + operation_list_STR[OUTPUT_NODE][ODIN_LONG_STRING] + "> node: "; printf("%-42s%lld\n", hdr.c_str(), unused_po); } diff --git a/ODIN_II/SRC/netlist_utils.cpp b/ODIN_II/SRC/netlist_utils.cpp index 07a4c3fbb89..adeaf434ac7 100644 --- a/ODIN_II/SRC/netlist_utils.cpp +++ b/ODIN_II/SRC/netlist_utils.cpp @@ -1613,9 +1613,9 @@ void reduce_input_ports(nnode_t*& node, netlist_t* netlist) { int max = std::max(input_ports[0]->count, input_ports[1]->count); while (input_ports[0]->count < max) - add_pin_to_signal_list(input_ports[0], get_pad_pin(netlist)); + add_pin_to_signal_list(input_ports[0], get_zero_pin(netlist)); while (input_ports[1]->count < max) - add_pin_to_signal_list(input_ports[1], get_pad_pin(netlist)); + add_pin_to_signal_list(input_ports[1], get_zero_pin(netlist)); } /* creating a new node */ @@ -1890,16 +1890,6 @@ void equalize_input_ports_size(nnode_t*& node, uintptr_t traverse_mark_number, n oassert(node->traverse_visited == traverse_mark_number); oassert(node->num_input_port_sizes > 0 && node->num_input_port_sizes <= 2); - /** - * INPUTS - * A: (width_a) - * B: (width_b) [optional] - * OUTPUT - * Y: width_y - */ - /* removing extra pad pins based on the signedness of ports */ - reduce_input_ports(node, netlist); - int port_a_size = node->input_port_sizes[0]; int port_b_size = -1; if (node->num_input_port_sizes == 2) { @@ -1914,6 +1904,16 @@ void equalize_input_ports_size(nnode_t*& node, uintptr_t traverse_mark_number, n if (port_a_size == port_y_size) return; + /** + * INPUTS + * A: (width_a) + * B: (width_b) [optional] + * OUTPUT + * Y: width_y + */ + /* removing extra pad pins based on the signedness of ports */ + reduce_input_ports(node, netlist); + /* creating the new node */ nnode_t* new_node = (port_b_size == -1) ? make_1port_gate(node->type, port_a_size, port_y_size, node, traverse_mark_number) : make_2port_gate(node->type, port_a_size, port_b_size, port_y_size, node, traverse_mark_number); diff --git a/ODIN_II/SRC/odin_ii.cpp b/ODIN_II/SRC/odin_ii.cpp index 12ec1169bcf..31350089175 100644 --- a/ODIN_II/SRC/odin_ii.cpp +++ b/ODIN_II/SRC/odin_ii.cpp @@ -349,7 +349,7 @@ netlist_t* start_odin_ii(int argc, char** argv) { ODIN_ERROR_CODE error_code; print_input_files_info(); - assert_valid_file_extenstion(configuration.list_of_file_names, configuration.input_file_type); + report_frontend_elaborator(); if (configuration.input_file_type != file_type_e::_BLIF || configuration.coarsen) { try { diff --git a/ODIN_II/SRC/odin_util.cpp b/ODIN_II/SRC/odin_util.cpp index 6fdacdfc024..27b7b711836 100644 --- a/ODIN_II/SRC/odin_util.cpp +++ b/ODIN_II/SRC/odin_util.cpp @@ -92,80 +92,56 @@ void create_directory(std::string path) { } /** - * @brief assert all input files have valid type and extenstion - * - * @param name_list list of input files - * @param type the type to be checked with + * @brief report the frontend elaborator and its parser */ -void assert_valid_file_extenstion(std::vector name_list, file_type_e type) { - for (auto file_name : name_list) { - // lookup the file type string from file extension map - auto file_ext_str = string_to_lower(get_file_extension(file_name)); - auto file_ext_it = file_extension_strmap.find(file_ext_str); - - // Unsupported file types should be already check. - // However, we double-check here - if (file_ext_it == file_extension_strmap.end()) { - assert_supported_file_extension(file_name, unknown_location); - } else { - file_type_e file_type = file_ext_it->second; - // Check if the file_name extension matches with type - switch (type) { - case (file_type_e::_VERILOG): // fallthrough - case (file_type_e::_VERILOG_HEADER): { - if (file_type != file_type_e::_VERILOG && file_type != file_type_e::_VERILOG_HEADER) - error_message(UTIL, unknown_location, - "File (%s) has an invalid extension (%s), supposed to be a %s or %s file { %s, %s },\ - please see ./odin --help", - file_name.c_str(), - file_ext_str.c_str(), - file_type_strmap.find(file_type_e::_VERILOG)->second.c_str(), - file_type_strmap.find(file_type_e::_VERILOG_HEADER)->second.c_str(), - file_extension_strmap.find(file_type_e::_VERILOG)->second.c_str(), - file_extension_strmap.find(file_type_e::_VERILOG_HEADER)->second.c_str()); - break; - } - case (file_type_e::_SYSTEM_VERILOG): //fallthrough - case (file_type_e::_UHDM): { - if (configuration.elaborator_type != elaborator_e::_YOSYS) { -#ifndef ODIN_USE_YOSYS - error_message(PARSE_ARGS, unknown_location, "%s", YOSYS_INSTALLATION_ERROR); +void report_frontend_elaborator() { + // Check if the file_name extension matches with type + switch (configuration.input_file_type) { + case (file_type_e::_VERILOG): // fallthrough + case (file_type_e::_VERILOG_HEADER): { + if (configuration.elaborator_type == elaborator_e::_ODIN) { + printf("Using the ODIN_II parser for elaboration\n"); + } else if (configuration.elaborator_type == elaborator_e::_YOSYS) { + printf("Using the Yosys elaborator with it's conventional Verilog/SystemVerilog parser\n"); + } + break; + } + case (file_type_e::_SYSTEM_VERILOG): { + if (configuration.elaborator_type != elaborator_e::_YOSYS) { + error_message(PARSE_ARGS, unknown_location, "%s", SYSTEMVERILOG_PARSER_ERROR); + } +#ifndef YOSYS_SV_UHDM_PLUGIN + printf("Using the Yosys elaborator with it's conventional Verilog/SystemVerilog parser\n"); #else - error_message(UTIL, unknown_location, "%s", YOSYS_PLUGINS_WITH_ODIN_ERROR); + printf("Using the Yosys elaborator with the Yosys-F4PGA-Plugin parser for SystemVerilog\n"); #endif - } else { -#ifndef YOSYS_SV_UHDM_PLUGIN - error_message(UTIL, unknown_location, "%s", YOSYS_PLUGINS_NOT_COMPILED); + break; + } + case (file_type_e::_UHDM): { + if (configuration.elaborator_type != elaborator_e::_YOSYS) { + error_message(PARSE_ARGS, unknown_location, "%s", UHDM_PARSER_ERROR); + + } else if (configuration.elaborator_type == elaborator_e::_YOSYS) { +#ifndef ODIN_USE_YOSYS + error_message(PARSE_ARGS, unknown_location, "%s", YOSYS_INSTALLATION_ERROR); +#else +# ifndef YOSYS_SV_UHDM_PLUGIN + error_message(PARSE_ARGS, unknown_location, "%s", YOSYS_PLUGINS_NOT_COMPILED); +# endif #endif - } - if (file_type != type && type != file_type_e::_UHDM) - error_message(UTIL, unknown_location, - "File (%s) has an invalid extension (%s), supposed to be a %s file { %s },\ - please see ./odin --help", - file_name.c_str(), - file_ext_str.c_str(), - file_type_strmap.find(type)->second.c_str(), - file_extension_strmap.find(type)->second.c_str()); - break; - } - case (file_type_e::_BLIF): { - if (file_type != type) - error_message(UTIL, unknown_location, - "File (%s) has an invalid extension (%s), supposed to be a %s file { %s },\ - please see ./odin --help", - file_name.c_str(), - file_ext_str.c_str(), - file_type_strmap.find(type)->second.c_str(), - file_extension_strmap.find(type)->second.c_str()); - break; - } - case (file_type_e::_EBLIF): //fallthrough - case (file_type_e::_ILANG): // fallthrough - default: { - assert_supported_file_extension(file_name, unknown_location); - break; - } } + printf("Using the Yosys elaborator with the Surelog parser for UHDM\n"); + break; + } + case (file_type_e::_BLIF): { + printf("Using the ODIN_II BLIF parser\n"); + break; + } + case (file_type_e::_EBLIF): //fallthrough + case (file_type_e::_ILANG): //fallthrough + default: { + error_message(UTIL, unknown_location, "%s", "Invalid file type"); + break; } } } diff --git a/ODIN_II/SRC/partial_map.cpp b/ODIN_II/SRC/partial_map.cpp index f22bb0616f5..07efff8f374 100644 --- a/ODIN_II/SRC/partial_map.cpp +++ b/ODIN_II/SRC/partial_map.cpp @@ -544,6 +544,10 @@ void instantiate_multi_port_n_bits_mux(nnode_t* node, short mark, netlist_t* net *-------------------------------------------------------------------------------------------*/ void instantiate_not_logic(nnode_t* node, short mark, netlist_t* /*netlist*/) { int width = node->num_input_pins; + + if (coarsen_cleanup && width == 1) + return; + nnode_t** new_not_cells; int i; @@ -619,6 +623,9 @@ void instantiate_logical_logic(nnode_t* node, operation_list op, short mark) { width_b = node->input_port_sizes[1]; port_B_offset = width_a; + if (coarsen_cleanup && (width_a == width_b) == 1) + return; + /* instantiate the cells */ new_logic_cell = make_1port_logic_gate(op, 2, node, mark); reduction1 = make_1port_logic_gate(BITWISE_OR, width_a, node, mark); @@ -689,8 +696,10 @@ void instantiate_bitwise_reduction(nnode_t* node, operation_list op, short mark) oassert(false); break; } + /* instantiate the cells */ - new_logic_cell = make_1port_logic_gate(cell_op, width_a, node, mark); + new_logic_cell = (coarsen_cleanup && cell_op == LOGICAL_OR && width_a == 1) ? make_1port_logic_gate(BUF_NODE, width_a, node, BLIF_ELABORATE_TRAVERSE_VALUE) + : make_1port_logic_gate(cell_op, width_a, node, mark); /* connect inputs. In the case that a signal is smaller than the other then zero pad */ for (i = 0; i < width_a; i++) { diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/simulation_result.json index 84930696e54..f6e8b8f3225 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/simulation_result.json @@ -10,14 +10,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 220, - "latch": 1706, - "Adder": 758, + "logic element": 191, + "latch": 1688, + "Adder": 759, "generic logic size": 4, - "Longest Path": 92, - "Average Path": 5, - "Estimated LUTs": 220, - "Total Node": 2685 + "Longest Path": 91, + "Average Path": 4, + "Estimated LUTs": 191, + "Total Node": 2639 }, "FIR/ex1BT16_fir_20/k6_N10_40nm": { "test_name": "FIR/ex1BT16_fir_20/k6_N10_40nm", @@ -30,13 +30,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1640, - "latch": 1706, + "logic element": 1613, + "latch": 1688, "generic logic size": 6, - "Longest Path": 92, - "Average Path": 5, - "Estimated LUTs": 1640, - "Total Node": 3347 + "Longest Path": 91, + "Average Path": 4, + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1BT16_fir_20/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1BT16_fir_20/k6_N10_mem32K_40nm", @@ -49,13 +49,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1640, - "latch": 1706, + "logic element": 1613, + "latch": 1688, "generic logic size": 6, - "Longest Path": 92, - "Average Path": 5, - "Estimated LUTs": 1640, - "Total Node": 3347 + "Longest Path": 91, + "Average Path": 4, + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1BT16_fir_20/no_arch": { "test_name": "FIR/ex1BT16_fir_20/no_arch", @@ -67,12 +67,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1640, - "latch": 1706, - "Longest Path": 92, - "Average Path": 5, - "Estimated LUTs": 1640, - "Total Node": 3347 + "logic element": 1613, + "latch": 1688, + "Longest Path": 91, + "Average Path": 4, + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1EP16_fir_6/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_frac_N10_frac_chain_mem32K_40nm", @@ -85,14 +85,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 89, - "latch": 570, - "Adder": 262, + "logic element": 60, + "latch": 550, + "Adder": 230, "generic logic size": 4, - "Longest Path": 54, - "Average Path": 5, - "Estimated LUTs": 89, - "Total Node": 922 + "Longest Path": 53, + "Average Path": 4, + "Estimated LUTs": 60, + "Total Node": 841 }, "FIR/ex1EP16_fir_6/k6_N10_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_N10_40nm", @@ -105,13 +105,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 580, - "latch": 570, + "logic element": 487, + "latch": 550, "generic logic size": 6, - "Longest Path": 54, - "Average Path": 5, - "Estimated LUTs": 580, - "Total Node": 1151 + "Longest Path": 53, + "Average Path": 4, + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1EP16_fir_6/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_N10_mem32K_40nm", @@ -124,13 +124,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 580, - "latch": 570, + "logic element": 487, + "latch": 550, "generic logic size": 6, - "Longest Path": 54, - "Average Path": 5, - "Estimated LUTs": 580, - "Total Node": 1151 + "Longest Path": 53, + "Average Path": 4, + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1EP16_fir_6/no_arch": { "test_name": "FIR/ex1EP16_fir_6/no_arch", @@ -142,12 +142,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 580, - "latch": 570, - "Longest Path": 54, - "Average Path": 5, - "Estimated LUTs": 580, - "Total Node": 1151 + "logic element": 487, + "latch": 550, + "Longest Path": 53, + "Average Path": 4, + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1LS16_fir_41/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_frac_N10_frac_chain_mem32K_40nm", @@ -160,14 +160,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 391, - "latch": 4314, - "Adder": 1876, + "logic element": 609, + "latch": 4051, + "Adder": 1715, "generic logic size": 4, - "Longest Path": 159, - "Average Path": 5, - "Estimated LUTs": 391, - "Total Node": 6582 + "Longest Path": 158, + "Average Path": 4, + "Estimated LUTs": 609, + "Total Node": 6376 }, "FIR/ex1LS16_fir_41/k6_N10_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_N10_40nm", @@ -180,13 +180,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3906, - "latch": 4314, + "logic element": 3817, + "latch": 4051, "generic logic size": 6, - "Longest Path": 159, - "Average Path": 5, - "Estimated LUTs": 3906, - "Total Node": 8221 + "Longest Path": 158, + "Average Path": 4, + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1LS16_fir_41/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_N10_mem32K_40nm", @@ -199,13 +199,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3906, - "latch": 4314, + "logic element": 3817, + "latch": 4051, "generic logic size": 6, - "Longest Path": 159, - "Average Path": 5, - "Estimated LUTs": 3906, - "Total Node": 8221 + "Longest Path": 158, + "Average Path": 4, + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1LS16_fir_41/no_arch": { "test_name": "FIR/ex1LS16_fir_41/no_arch", @@ -217,12 +217,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3906, - "latch": 4314, - "Longest Path": 159, - "Average Path": 5, - "Estimated LUTs": 3906, - "Total Node": 8221 + "logic element": 3817, + "latch": 4051, + "Longest Path": 158, + "Average Path": 4, + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1PM16_fir_28/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_frac_N10_frac_chain_mem32K_40nm", @@ -235,14 +235,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 327, - "latch": 2629, - "Adder": 1273, + "logic element": 345, + "latch": 2519, + "Adder": 1181, "generic logic size": 4, - "Longest Path": 119, - "Average Path": 5, - "Estimated LUTs": 327, - "Total Node": 4230 + "Longest Path": 118, + "Average Path": 4, + "Estimated LUTs": 345, + "Total Node": 4046 }, "FIR/ex1PM16_fir_28/k6_N10_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_N10_40nm", @@ -255,13 +255,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2717, - "latch": 2629, + "logic element": 2554, + "latch": 2519, "generic logic size": 6, - "Longest Path": 119, - "Average Path": 5, - "Estimated LUTs": 2717, - "Total Node": 5347 + "Longest Path": 118, + "Average Path": 4, + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex1PM16_fir_28/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_N10_mem32K_40nm", @@ -274,13 +274,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2717, - "latch": 2629, + "logic element": 2554, + "latch": 2519, "generic logic size": 6, - "Longest Path": 119, - "Average Path": 5, - "Estimated LUTs": 2717, - "Total Node": 5347 + "Longest Path": 118, + "Average Path": 4, + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex1PM16_fir_28/no_arch": { "test_name": "FIR/ex1PM16_fir_28/no_arch", @@ -292,12 +292,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2717, - "latch": 2629, - "Longest Path": 119, - "Average Path": 5, - "Estimated LUTs": 2717, - "Total Node": 5347 + "logic element": 2554, + "latch": 2519, + "Longest Path": 118, + "Average Path": 4, + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex2BT16_fir_71/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_frac_N10_frac_chain_mem32K_40nm", @@ -310,14 +310,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 364, - "latch": 4400, - "Adder": 1585, + "logic element": 335, + "latch": 4298, + "Adder": 1586, "generic logic size": 4, - "Longest Path": 179, - "Average Path": 5, - "Estimated LUTs": 364, - "Total Node": 6350 + "Longest Path": 178, + "Average Path": 4, + "Estimated LUTs": 335, + "Total Node": 6220 }, "FIR/ex2BT16_fir_71/k6_N10_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_N10_40nm", @@ -330,13 +330,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3342, - "latch": 4400, + "logic element": 3315, + "latch": 4298, "generic logic size": 6, - "Longest Path": 179, - "Average Path": 5, - "Estimated LUTs": 3342, - "Total Node": 7743 + "Longest Path": 178, + "Average Path": 4, + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2BT16_fir_71/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_N10_mem32K_40nm", @@ -349,13 +349,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3342, - "latch": 4400, + "logic element": 3315, + "latch": 4298, "generic logic size": 6, - "Longest Path": 179, - "Average Path": 5, - "Estimated LUTs": 3342, - "Total Node": 7743 + "Longest Path": 178, + "Average Path": 4, + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2BT16_fir_71/no_arch": { "test_name": "FIR/ex2BT16_fir_71/no_arch", @@ -367,12 +367,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3342, - "latch": 4400, - "Longest Path": 179, - "Average Path": 5, - "Estimated LUTs": 3342, - "Total Node": 7743 + "logic element": 3315, + "latch": 4298, + "Longest Path": 178, + "Average Path": 4, + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2EP16_fir_13/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_frac_N10_frac_chain_mem32K_40nm", @@ -385,14 +385,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 103, - "latch": 846, - "Adder": 376, + "logic element": 74, + "latch": 778, + "Adder": 369, "generic logic size": 4, - "Longest Path": 55, - "Average Path": 5, - "Estimated LUTs": 103, - "Total Node": 1326 + "Longest Path": 54, + "Average Path": 4, + "Estimated LUTs": 74, + "Total Node": 1222 }, "FIR/ex2EP16_fir_13/k6_N10_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_N10_40nm", @@ -405,13 +405,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 801, - "latch": 846, + "logic element": 758, + "latch": 778, "generic logic size": 6, - "Longest Path": 55, - "Average Path": 5, - "Estimated LUTs": 801, - "Total Node": 1648 + "Longest Path": 54, + "Average Path": 4, + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2EP16_fir_13/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_N10_mem32K_40nm", @@ -424,13 +424,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 801, - "latch": 846, + "logic element": 758, + "latch": 778, "generic logic size": 6, - "Longest Path": 55, - "Average Path": 5, - "Estimated LUTs": 801, - "Total Node": 1648 + "Longest Path": 54, + "Average Path": 4, + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2EP16_fir_13/no_arch": { "test_name": "FIR/ex2EP16_fir_13/no_arch", @@ -442,12 +442,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 801, - "latch": 846, - "Longest Path": 55, - "Average Path": 5, - "Estimated LUTs": 801, - "Total Node": 1648 + "logic element": 758, + "latch": 778, + "Longest Path": 54, + "Average Path": 4, + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2PM16_fir_119/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_frac_N10_frac_chain_mem32K_40nm", @@ -460,14 +460,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 915, - "latch": 11756, - "Adder": 5090, + "logic element": 1634, + "latch": 10884, + "Adder": 4594, "generic logic size": 4, - "Longest Path": 393, - "Average Path": 5, - "Estimated LUTs": 915, - "Total Node": 17762 + "Longest Path": 395, + "Average Path": 4, + "Estimated LUTs": 1634, + "Total Node": 17113 }, "FIR/ex2PM16_fir_119/k6_N10_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_N10_40nm", @@ -480,13 +480,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10495, - "latch": 11756, + "logic element": 10267, + "latch": 10884, "generic logic size": 6, - "Longest Path": 393, - "Average Path": 5, - "Estimated LUTs": 10495, - "Total Node": 22252 + "Longest Path": 395, + "Average Path": 4, + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex2PM16_fir_119/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_N10_mem32K_40nm", @@ -499,13 +499,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10495, - "latch": 11756, + "logic element": 10267, + "latch": 10884, "generic logic size": 6, - "Longest Path": 393, - "Average Path": 5, - "Estimated LUTs": 10495, - "Total Node": 22252 + "Longest Path": 395, + "Average Path": 4, + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex2PM16_fir_119/no_arch": { "test_name": "FIR/ex2PM16_fir_119/no_arch", @@ -517,12 +517,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10495, - "latch": 11756, - "Longest Path": 393, - "Average Path": 5, - "Estimated LUTs": 10495, - "Total Node": 22252 + "logic element": 10267, + "latch": 10884, + "Longest Path": 395, + "Average Path": 4, + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex3PM16_fir_61/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_frac_N10_frac_chain_mem32K_40nm", @@ -535,14 +535,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 573, - "latch": 6452, - "Adder": 2772, + "logic element": 913, + "latch": 6105, + "Adder": 2550, "generic logic size": 4, "Longest Path": 218, - "Average Path": 5, - "Estimated LUTs": 573, - "Total Node": 9798 + "Average Path": 4, + "Estimated LUTs": 913, + "Total Node": 9569 }, "FIR/ex3PM16_fir_61/k6_N10_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_N10_40nm", @@ -555,13 +555,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5784, - "latch": 6452, + "logic element": 5701, + "latch": 6105, "generic logic size": 6, "Longest Path": 218, - "Average Path": 5, - "Estimated LUTs": 5784, - "Total Node": 12237 + "Average Path": 4, + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex3PM16_fir_61/k6_N10_mem32K_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_N10_mem32K_40nm", @@ -574,13 +574,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5784, - "latch": 6452, + "logic element": 5701, + "latch": 6105, "generic logic size": 6, "Longest Path": 218, - "Average Path": 5, - "Estimated LUTs": 5784, - "Total Node": 12237 + "Average Path": 4, + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex3PM16_fir_61/no_arch": { "test_name": "FIR/ex3PM16_fir_61/no_arch", @@ -592,12 +592,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5784, - "latch": 6452, + "logic element": 5701, + "latch": 6105, "Longest Path": 218, - "Average Path": 5, - "Estimated LUTs": 5784, - "Total Node": 12237 + "Average Path": 4, + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex4EP16_fir_10/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_frac_N10_frac_chain_mem32K_40nm", @@ -610,14 +610,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 143, - "latch": 1015, - "Adder": 461, + "logic element": 114, + "latch": 929, + "Adder": 423, "generic logic size": 4, - "Longest Path": 64, - "Average Path": 5, - "Estimated LUTs": 143, - "Total Node": 1620 + "Longest Path": 63, + "Average Path": 4, + "Estimated LUTs": 114, + "Total Node": 1467 }, "FIR/ex4EP16_fir_10/k6_N10_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_N10_40nm", @@ -630,13 +630,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1008, - "latch": 1015, + "logic element": 903, + "latch": 929, "generic logic size": 6, - "Longest Path": 64, - "Average Path": 5, - "Estimated LUTs": 1008, - "Total Node": 2024 + "Longest Path": 63, + "Average Path": 4, + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4EP16_fir_10/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_N10_mem32K_40nm", @@ -649,13 +649,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1008, - "latch": 1015, + "logic element": 903, + "latch": 929, "generic logic size": 6, - "Longest Path": 64, - "Average Path": 5, - "Estimated LUTs": 1008, - "Total Node": 2024 + "Longest Path": 63, + "Average Path": 4, + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4EP16_fir_10/no_arch": { "test_name": "FIR/ex4EP16_fir_10/no_arch", @@ -667,12 +667,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1008, - "latch": 1015, - "Longest Path": 64, - "Average Path": 5, - "Estimated LUTs": 1008, - "Total Node": 2024 + "logic element": 903, + "latch": 929, + "Longest Path": 63, + "Average Path": 4, + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4LS16_fir/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4LS16_fir/k6_frac_N10_frac_chain_mem32K_40nm", @@ -685,14 +685,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1430, - "latch": 22091, - "Adder": 9527, + "logic element": 2677, + "latch": 20565, + "Adder": 8669, "generic logic size": 4, - "Longest Path": 786, - "Average Path": 5, - "Estimated LUTs": 1430, - "Total Node": 33049 + "Longest Path": 785, + "Average Path": 4, + "Estimated LUTs": 2677, + "Total Node": 31912 }, "FIR/ex4LS16_fir/k6_N10_40nm": { "test_name": "FIR/ex4LS16_fir/k6_N10_40nm", @@ -705,13 +705,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19395, - "latch": 22091, + "logic element": 19019, + "latch": 20565, "generic logic size": 6, - "Longest Path": 786, - "Average Path": 5, - "Estimated LUTs": 19395, - "Total Node": 41487 + "Longest Path": 785, + "Average Path": 4, + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4LS16_fir/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4LS16_fir/k6_N10_mem32K_40nm", @@ -724,13 +724,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19395, - "latch": 22091, + "logic element": 19019, + "latch": 20565, "generic logic size": 6, - "Longest Path": 786, - "Average Path": 5, - "Estimated LUTs": 19395, - "Total Node": 41487 + "Longest Path": 785, + "Average Path": 4, + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4LS16_fir/no_arch": { "test_name": "FIR/ex4LS16_fir/no_arch", @@ -742,12 +742,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19395, - "latch": 22091, - "Longest Path": 786, - "Average Path": 5, - "Estimated LUTs": 19395, - "Total Node": 41487 + "logic element": 19019, + "latch": 20565, + "Longest Path": 785, + "Average Path": 4, + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4PM16_fir_152/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_frac_N10_frac_chain_mem32K_40nm", @@ -760,14 +760,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1262, - "latch": 14797, - "Adder": 6411, + "logic element": 2193, + "latch": 13891, + "Adder": 5789, "generic logic size": 4, "Longest Path": 488, - "Average Path": 5, - "Estimated LUTs": 1262, - "Total Node": 22471 + "Average Path": 4, + "Estimated LUTs": 2193, + "Total Node": 21874 }, "FIR/ex4PM16_fir_152/k6_N10_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_N10_40nm", @@ -780,13 +780,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13334, - "latch": 14797, + "logic element": 13081, + "latch": 13891, "generic logic size": 6, "Longest Path": 488, - "Average Path": 5, - "Estimated LUTs": 13334, - "Total Node": 28132 + "Average Path": 4, + "Estimated LUTs": 13081, + "Total Node": 26973 }, "FIR/ex4PM16_fir_152/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_N10_mem32K_40nm", @@ -799,13 +799,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13334, - "latch": 14797, + "logic element": 13081, + "latch": 13891, "generic logic size": 6, "Longest Path": 488, - "Average Path": 5, - "Estimated LUTs": 13334, - "Total Node": 28132 + "Average Path": 4, + "Estimated LUTs": 13081, + "Total Node": 26973 }, "FIR/ex4PM16_fir_152/no_arch": { "test_name": "FIR/ex4PM16_fir_152/no_arch", @@ -817,12 +817,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13334, - "latch": 14797, + "logic element": 13081, + "latch": 13891, "Longest Path": 488, - "Average Path": 5, - "Estimated LUTs": 13334, - "Total Node": 28132 + "Average Path": 4, + "Estimated LUTs": 13081, + "Total Node": 26973 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/synthesis_result.json index 31c583dc97e..e9a5e2ef232 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/FIR/synthesis_result.json @@ -13,13 +13,13 @@ "Pi": 12, "Po": 29, "logic element": 191, - "latch": 1706, - "Adder": 758, + "latch": 1688, + "Adder": 759, "generic logic size": 4, "Longest Path": 91, "Average Path": 4, "Estimated LUTs": 191, - "Total Node": 2656 + "Total Node": 2639 }, "FIR/ex1BT16_fir_20/k6_N10_40nm": { "test_name": "FIR/ex1BT16_fir_20/k6_N10_40nm", @@ -34,13 +34,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1611, - "latch": 1706, + "logic element": 1613, + "latch": 1688, "generic logic size": 6, "Longest Path": 91, "Average Path": 4, - "Estimated LUTs": 1611, - "Total Node": 3318 + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1BT16_fir_20/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1BT16_fir_20/k6_N10_mem32K_40nm", @@ -55,13 +55,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1611, - "latch": 1706, + "logic element": 1613, + "latch": 1688, "generic logic size": 6, "Longest Path": 91, "Average Path": 4, - "Estimated LUTs": 1611, - "Total Node": 3318 + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1BT16_fir_20/no_arch": { "test_name": "FIR/ex1BT16_fir_20/no_arch", @@ -75,12 +75,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1611, - "latch": 1706, + "logic element": 1613, + "latch": 1688, "Longest Path": 91, "Average Path": 4, - "Estimated LUTs": 1611, - "Total Node": 3318 + "Estimated LUTs": 1613, + "Total Node": 3302 }, "FIR/ex1EP16_fir_6/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_frac_N10_frac_chain_mem32K_40nm", @@ -96,13 +96,13 @@ "Pi": 12, "Po": 29, "logic element": 60, - "latch": 570, - "Adder": 262, + "latch": 550, + "Adder": 230, "generic logic size": 4, "Longest Path": 53, "Average Path": 4, "Estimated LUTs": 60, - "Total Node": 893 + "Total Node": 841 }, "FIR/ex1EP16_fir_6/k6_N10_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_N10_40nm", @@ -117,13 +117,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 551, - "latch": 570, + "logic element": 487, + "latch": 550, "generic logic size": 6, "Longest Path": 53, "Average Path": 4, - "Estimated LUTs": 551, - "Total Node": 1122 + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1EP16_fir_6/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1EP16_fir_6/k6_N10_mem32K_40nm", @@ -138,13 +138,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 551, - "latch": 570, + "logic element": 487, + "latch": 550, "generic logic size": 6, "Longest Path": 53, "Average Path": 4, - "Estimated LUTs": 551, - "Total Node": 1122 + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1EP16_fir_6/no_arch": { "test_name": "FIR/ex1EP16_fir_6/no_arch", @@ -158,12 +158,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 551, - "latch": 570, + "logic element": 487, + "latch": 550, "Longest Path": 53, "Average Path": 4, - "Estimated LUTs": 551, - "Total Node": 1122 + "Estimated LUTs": 487, + "Total Node": 1038 }, "FIR/ex1LS16_fir_41/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_frac_N10_frac_chain_mem32K_40nm", @@ -178,14 +178,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 362, - "latch": 4314, - "Adder": 1876, + "logic element": 609, + "latch": 4051, + "Adder": 1715, "generic logic size": 4, "Longest Path": 158, "Average Path": 4, - "Estimated LUTs": 362, - "Total Node": 6553 + "Estimated LUTs": 609, + "Total Node": 6376 }, "FIR/ex1LS16_fir_41/k6_N10_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_N10_40nm", @@ -200,13 +200,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3877, - "latch": 4314, + "logic element": 3817, + "latch": 4051, "generic logic size": 6, "Longest Path": 158, "Average Path": 4, - "Estimated LUTs": 3877, - "Total Node": 8192 + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1LS16_fir_41/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1LS16_fir_41/k6_N10_mem32K_40nm", @@ -221,13 +221,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3877, - "latch": 4314, + "logic element": 3817, + "latch": 4051, "generic logic size": 6, "Longest Path": 158, "Average Path": 4, - "Estimated LUTs": 3877, - "Total Node": 8192 + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1LS16_fir_41/no_arch": { "test_name": "FIR/ex1LS16_fir_41/no_arch", @@ -241,12 +241,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3877, - "latch": 4314, + "logic element": 3817, + "latch": 4051, "Longest Path": 158, "Average Path": 4, - "Estimated LUTs": 3877, - "Total Node": 8192 + "Estimated LUTs": 3817, + "Total Node": 7869 }, "FIR/ex1PM16_fir_28/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_frac_N10_frac_chain_mem32K_40nm", @@ -261,14 +261,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 298, - "latch": 2629, - "Adder": 1273, + "logic element": 345, + "latch": 2519, + "Adder": 1181, "generic logic size": 4, "Longest Path": 118, "Average Path": 4, - "Estimated LUTs": 298, - "Total Node": 4201 + "Estimated LUTs": 345, + "Total Node": 4046 }, "FIR/ex1PM16_fir_28/k6_N10_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_N10_40nm", @@ -283,13 +283,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2688, - "latch": 2629, + "logic element": 2554, + "latch": 2519, "generic logic size": 6, "Longest Path": 118, "Average Path": 4, - "Estimated LUTs": 2688, - "Total Node": 5318 + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex1PM16_fir_28/k6_N10_mem32K_40nm": { "test_name": "FIR/ex1PM16_fir_28/k6_N10_mem32K_40nm", @@ -304,13 +304,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2688, - "latch": 2629, + "logic element": 2554, + "latch": 2519, "generic logic size": 6, "Longest Path": 118, "Average Path": 4, - "Estimated LUTs": 2688, - "Total Node": 5318 + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex1PM16_fir_28/no_arch": { "test_name": "FIR/ex1PM16_fir_28/no_arch", @@ -324,12 +324,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 2688, - "latch": 2629, + "logic element": 2554, + "latch": 2519, "Longest Path": 118, "Average Path": 4, - "Estimated LUTs": 2688, - "Total Node": 5318 + "Estimated LUTs": 2554, + "Total Node": 5074 }, "FIR/ex2BT16_fir_71/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_frac_N10_frac_chain_mem32K_40nm", @@ -345,13 +345,13 @@ "Pi": 12, "Po": 29, "logic element": 335, - "latch": 4400, - "Adder": 1585, + "latch": 4298, + "Adder": 1586, "generic logic size": 4, "Longest Path": 178, "Average Path": 4, "Estimated LUTs": 335, - "Total Node": 6321 + "Total Node": 6220 }, "FIR/ex2BT16_fir_71/k6_N10_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_N10_40nm", @@ -366,13 +366,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3313, - "latch": 4400, + "logic element": 3315, + "latch": 4298, "generic logic size": 6, "Longest Path": 178, "Average Path": 4, - "Estimated LUTs": 3313, - "Total Node": 7714 + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2BT16_fir_71/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2BT16_fir_71/k6_N10_mem32K_40nm", @@ -387,13 +387,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3313, - "latch": 4400, + "logic element": 3315, + "latch": 4298, "generic logic size": 6, "Longest Path": 178, "Average Path": 4, - "Estimated LUTs": 3313, - "Total Node": 7714 + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2BT16_fir_71/no_arch": { "test_name": "FIR/ex2BT16_fir_71/no_arch", @@ -407,12 +407,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 3313, - "latch": 4400, + "logic element": 3315, + "latch": 4298, "Longest Path": 178, "Average Path": 4, - "Estimated LUTs": 3313, - "Total Node": 7714 + "Estimated LUTs": 3315, + "Total Node": 7614 }, "FIR/ex2EP16_fir_13/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_frac_N10_frac_chain_mem32K_40nm", @@ -428,13 +428,13 @@ "Pi": 12, "Po": 29, "logic element": 74, - "latch": 846, - "Adder": 376, + "latch": 778, + "Adder": 369, "generic logic size": 4, "Longest Path": 54, "Average Path": 4, "Estimated LUTs": 74, - "Total Node": 1297 + "Total Node": 1222 }, "FIR/ex2EP16_fir_13/k6_N10_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_N10_40nm", @@ -449,13 +449,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 772, - "latch": 846, + "logic element": 758, + "latch": 778, "generic logic size": 6, "Longest Path": 54, "Average Path": 4, - "Estimated LUTs": 772, - "Total Node": 1619 + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2EP16_fir_13/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2EP16_fir_13/k6_N10_mem32K_40nm", @@ -470,13 +470,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 772, - "latch": 846, + "logic element": 758, + "latch": 778, "generic logic size": 6, "Longest Path": 54, "Average Path": 4, - "Estimated LUTs": 772, - "Total Node": 1619 + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2EP16_fir_13/no_arch": { "test_name": "FIR/ex2EP16_fir_13/no_arch", @@ -490,12 +490,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 772, - "latch": 846, + "logic element": 758, + "latch": 778, "Longest Path": 54, "Average Path": 4, - "Estimated LUTs": 772, - "Total Node": 1619 + "Estimated LUTs": 758, + "Total Node": 1537 }, "FIR/ex2PM16_fir_119/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_frac_N10_frac_chain_mem32K_40nm", @@ -510,14 +510,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 886, - "latch": 11756, - "Adder": 5090, + "logic element": 1634, + "latch": 10884, + "Adder": 4594, "generic logic size": 4, - "Longest Path": 392, + "Longest Path": 395, "Average Path": 4, - "Estimated LUTs": 886, - "Total Node": 17733 + "Estimated LUTs": 1634, + "Total Node": 17113 }, "FIR/ex2PM16_fir_119/k6_N10_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_N10_40nm", @@ -532,13 +532,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10466, - "latch": 11756, + "logic element": 10267, + "latch": 10884, "generic logic size": 6, - "Longest Path": 392, + "Longest Path": 395, "Average Path": 4, - "Estimated LUTs": 10466, - "Total Node": 22223 + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex2PM16_fir_119/k6_N10_mem32K_40nm": { "test_name": "FIR/ex2PM16_fir_119/k6_N10_mem32K_40nm", @@ -553,13 +553,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10466, - "latch": 11756, + "logic element": 10267, + "latch": 10884, "generic logic size": 6, - "Longest Path": 392, + "Longest Path": 395, "Average Path": 4, - "Estimated LUTs": 10466, - "Total Node": 22223 + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex2PM16_fir_119/no_arch": { "test_name": "FIR/ex2PM16_fir_119/no_arch", @@ -573,12 +573,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 10466, - "latch": 11756, - "Longest Path": 392, + "logic element": 10267, + "latch": 10884, + "Longest Path": 395, "Average Path": 4, - "Estimated LUTs": 10466, - "Total Node": 22223 + "Estimated LUTs": 10267, + "Total Node": 21152 }, "FIR/ex3PM16_fir_61/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_frac_N10_frac_chain_mem32K_40nm", @@ -593,14 +593,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 544, - "latch": 6452, - "Adder": 2772, + "logic element": 913, + "latch": 6105, + "Adder": 2550, "generic logic size": 4, - "Longest Path": 217, + "Longest Path": 218, "Average Path": 4, - "Estimated LUTs": 544, - "Total Node": 9769 + "Estimated LUTs": 913, + "Total Node": 9569 }, "FIR/ex3PM16_fir_61/k6_N10_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_N10_40nm", @@ -615,13 +615,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5755, - "latch": 6452, + "logic element": 5701, + "latch": 6105, "generic logic size": 6, - "Longest Path": 217, + "Longest Path": 218, "Average Path": 4, - "Estimated LUTs": 5755, - "Total Node": 12208 + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex3PM16_fir_61/k6_N10_mem32K_40nm": { "test_name": "FIR/ex3PM16_fir_61/k6_N10_mem32K_40nm", @@ -636,13 +636,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5755, - "latch": 6452, + "logic element": 5701, + "latch": 6105, "generic logic size": 6, - "Longest Path": 217, + "Longest Path": 218, "Average Path": 4, - "Estimated LUTs": 5755, - "Total Node": 12208 + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex3PM16_fir_61/no_arch": { "test_name": "FIR/ex3PM16_fir_61/no_arch", @@ -656,12 +656,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 5755, - "latch": 6452, - "Longest Path": 217, + "logic element": 5701, + "latch": 6105, + "Longest Path": 218, "Average Path": 4, - "Estimated LUTs": 5755, - "Total Node": 12208 + "Estimated LUTs": 5701, + "Total Node": 11807 }, "FIR/ex4EP16_fir_10/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_frac_N10_frac_chain_mem32K_40nm", @@ -677,13 +677,13 @@ "Pi": 12, "Po": 29, "logic element": 114, - "latch": 1015, - "Adder": 461, + "latch": 929, + "Adder": 423, "generic logic size": 4, "Longest Path": 63, "Average Path": 4, "Estimated LUTs": 114, - "Total Node": 1591 + "Total Node": 1467 }, "FIR/ex4EP16_fir_10/k6_N10_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_N10_40nm", @@ -698,13 +698,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 979, - "latch": 1015, + "logic element": 903, + "latch": 929, "generic logic size": 6, "Longest Path": 63, "Average Path": 4, - "Estimated LUTs": 979, - "Total Node": 1995 + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4EP16_fir_10/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4EP16_fir_10/k6_N10_mem32K_40nm", @@ -719,13 +719,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 979, - "latch": 1015, + "logic element": 903, + "latch": 929, "generic logic size": 6, "Longest Path": 63, "Average Path": 4, - "Estimated LUTs": 979, - "Total Node": 1995 + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4EP16_fir_10/no_arch": { "test_name": "FIR/ex4EP16_fir_10/no_arch", @@ -739,12 +739,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 979, - "latch": 1015, + "logic element": 903, + "latch": 929, "Longest Path": 63, "Average Path": 4, - "Estimated LUTs": 979, - "Total Node": 1995 + "Estimated LUTs": 903, + "Total Node": 1833 }, "FIR/ex4LS16_fir/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4LS16_fir/k6_frac_N10_frac_chain_mem32K_40nm", @@ -759,14 +759,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1401, - "latch": 22091, - "Adder": 9527, + "logic element": 2677, + "latch": 20565, + "Adder": 8669, "generic logic size": 4, "Longest Path": 785, "Average Path": 4, - "Estimated LUTs": 1401, - "Total Node": 33020 + "Estimated LUTs": 2677, + "Total Node": 31912 }, "FIR/ex4LS16_fir/k6_N10_40nm": { "test_name": "FIR/ex4LS16_fir/k6_N10_40nm", @@ -781,13 +781,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19366, - "latch": 22091, + "logic element": 19019, + "latch": 20565, "generic logic size": 6, "Longest Path": 785, "Average Path": 4, - "Estimated LUTs": 19366, - "Total Node": 41458 + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4LS16_fir/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4LS16_fir/k6_N10_mem32K_40nm", @@ -802,13 +802,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19366, - "latch": 22091, + "logic element": 19019, + "latch": 20565, "generic logic size": 6, "Longest Path": 785, "Average Path": 4, - "Estimated LUTs": 19366, - "Total Node": 41458 + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4LS16_fir/no_arch": { "test_name": "FIR/ex4LS16_fir/no_arch", @@ -822,12 +822,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 19366, - "latch": 22091, + "logic element": 19019, + "latch": 20565, "Longest Path": 785, "Average Path": 4, - "Estimated LUTs": 19366, - "Total Node": 41458 + "Estimated LUTs": 19019, + "Total Node": 39585 }, "FIR/ex4PM16_fir_152/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_frac_N10_frac_chain_mem32K_40nm", @@ -842,14 +842,14 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 1233, - "latch": 14797, - "Adder": 6411, + "logic element": 2193, + "latch": 13891, + "Adder": 5789, "generic logic size": 4, - "Longest Path": 487, + "Longest Path": 488, "Average Path": 4, - "Estimated LUTs": 1233, - "Total Node": 22442 + "Estimated LUTs": 2193, + "Total Node": 21874 }, "FIR/ex4PM16_fir_152/k6_N10_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_N10_40nm", @@ -864,13 +864,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13305, - "latch": 14797, + "logic element": 13081, + "latch": 13891, "generic logic size": 6, - "Longest Path": 487, + "Longest Path": 488, "Average Path": 4, - "Estimated LUTs": 13305, - "Total Node": 28103 + "Estimated LUTs": 13081, + "Total Node": 26973 }, "FIR/ex4PM16_fir_152/k6_N10_mem32K_40nm": { "test_name": "FIR/ex4PM16_fir_152/k6_N10_mem32K_40nm", @@ -885,13 +885,13 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13305, - "latch": 14797, + "logic element": 13081, + "latch": 13891, "generic logic size": 6, - "Longest Path": 487, + "Longest Path": 488, "Average Path": 4, - "Estimated LUTs": 13305, - "Total Node": 28103 + "Estimated LUTs": 13081, + "Total Node": 26973 }, "FIR/ex4PM16_fir_152/no_arch": { "test_name": "FIR/ex4PM16_fir_152/no_arch", @@ -905,12 +905,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 29, - "logic element": 13305, - "latch": 14797, - "Longest Path": 487, + "logic element": 13081, + "latch": 13891, + "Longest Path": 488, "Average Path": 4, - "Estimated LUTs": 13305, - "Total Node": 28103 + "Estimated LUTs": 13081, + "Total Node": 26973 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/common/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/common/simulation_result.json index fb5fc673c17..ac37e025d3c 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/common/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/common/simulation_result.json @@ -42,15 +42,15 @@ "exec_time(ms)": 229.3, "simulation_time(ms)": 85.9, "test_coverage(%)": 100, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 8, - "Memory": 8, + "logic element": 7, + "latch": 1, "generic logic size": 4, "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 16 + "Estimated LUTs": 7, + "Total Node": 9 }, "common/1r/no_arch": { "test_name": "common/1r/no_arch", @@ -60,14 +60,13 @@ "simulation_time(ms)": 203, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, "Po": 8, - "logic element": 308, - "latch": 128, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 308, - "Total Node": 437 + "logic element": 7, + "latch": 1, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 9 }, "common/2r1w/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/2r1w/k6_frac_N10_frac_chain_mem32K_40nm", @@ -147,15 +146,15 @@ "exec_time(ms)": 294.3, "simulation_time(ms)": 110.9, "test_coverage(%)": 100, - "Pi": 9, + "Latch Drivers": 1, "Po": 16, - "logic element": 16, - "Memory": 8, + "logic element": 15, + "latch": 1, "generic logic size": 4, "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 24 + "Estimated LUTs": 15, + "Total Node": 17 }, "common/2r/no_arch": { "test_name": "common/2r/no_arch", @@ -165,14 +164,13 @@ "simulation_time(ms)": 292.3, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 8, "Po": 16, - "logic element": 504, - "latch": 128, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 504, - "Total Node": 633 + "logic element": 15, + "latch": 1, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 15, + "Total Node": 17 }, "common/adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -218,13 +216,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 9 + "Estimated LUTs": 4, + "Total Node": 7 }, "common/adffe/no_arch": { "test_name": "common/adffe/no_arch", @@ -236,12 +234,12 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 9 + "Estimated LUTs": 4, + "Total Node": 7 }, "common/adff/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/adff/k6_frac_N10_frac_chain_mem32K_40nm", @@ -254,13 +252,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Estimated LUTs": 2, + "Total Node": 5 }, "common/adff/no_arch": { "test_name": "common/adff/no_arch", @@ -272,12 +270,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Estimated LUTs": 2, + "Total Node": 5 }, "common/adlatch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/adlatch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -289,12 +287,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "common/adlatch/no_arch": { "test_name": "common/adlatch/no_arch", @@ -305,11 +303,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "common/bitwise_not/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/bitwise_not/k6_frac_N10_frac_chain_mem32K_40nm", @@ -321,12 +319,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 4, - "logic element": 8, + "logic element": 4, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 8 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/bitwise_not/no_arch": { "test_name": "common/bitwise_not/no_arch", @@ -337,11 +335,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 4, - "logic element": 8, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 8 + "logic element": 4, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/bram/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/bram/k6_frac_N10_frac_chain_mem32K_40nm", @@ -351,7 +349,7 @@ "exec_time(ms)": 271.5, "simulation_time(ms)": 113.5, "test_coverage(%)": 100, - "Pi": 19, + "Pi": 23, "Po": 8, "logic element": 9, "Memory": 8, @@ -369,14 +367,14 @@ "simulation_time(ms)": 312.5, "test_coverage(%)": 98.5, "Latch Drivers": 1, - "Pi": 18, + "Pi": 22, "Po": 8, - "logic element": 489, - "latch": 128, + "logic element": 1885, + "latch": 512, "Longest Path": 11, "Average Path": 6, - "Estimated LUTs": 489, - "Total Node": 618 + "Estimated LUTs": 1885, + "Total Node": 2398 }, "common/dffe/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dffe/k6_frac_N10_frac_chain_mem32K_40nm", @@ -389,13 +387,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 5 }, "common/dffe/no_arch": { "test_name": "common/dffe/no_arch", @@ -407,12 +405,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 5 }, "common/dff/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dff/k6_frac_N10_frac_chain_mem32K_40nm", @@ -425,13 +423,11 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 3 }, "common/dff/no_arch": { "test_name": "common/dff/no_arch", @@ -443,12 +439,10 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 2, "latch": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 3 }, "common/dffsre/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dffsre/k6_frac_N10_frac_chain_mem32K_40nm", @@ -532,13 +526,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 7, - "logic element": 16, - "Adder": 11, + "logic element": 137, "generic logic size": 4, - "Longest Path": 17, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 27 + "Longest Path": 38, + "Average Path": 7, + "Estimated LUTs": 137, + "Total Node": 137 }, "common/div_by_const/no_arch": { "test_name": "common/div_by_const/no_arch", @@ -547,13 +540,13 @@ "exec_time(ms)": 7290.3, "simulation_time(ms)": 1742.3, "test_coverage(%)": 100, - "Pi": 3, + "Pi": 4, "Po": 7, - "logic element": 65, - "Longest Path": 23, - "Average Path": 6, - "Estimated LUTs": 65, - "Total Node": 65 + "logic element": 137, + "Longest Path": 38, + "Average Path": 7, + "Estimated LUTs": 137, + "Total Node": 137 }, "common/div/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/div/k6_frac_N10_frac_chain_mem32K_40nm", @@ -564,14 +557,13 @@ "simulation_time(ms)": 24.3, "test_coverage(%)": 100, "Pi": 8, - "Po": 7, - "logic element": 23, - "Adder": 19, + "Po": 4, + "logic element": 97, "generic logic size": 4, - "Longest Path": 26, - "Average Path": 5, - "Estimated LUTs": 23, - "Total Node": 42 + "Longest Path": 43, + "Average Path": 9, + "Estimated LUTs": 97, + "Total Node": 97 }, "common/div/no_arch": { "test_name": "common/div/no_arch", @@ -580,13 +572,13 @@ "exec_time(ms)": 218.8, "simulation_time(ms)": 75.2, "test_coverage(%)": 100, - "Pi": 6, - "Po": 7, - "logic element": 106, - "Longest Path": 31, - "Average Path": 8, - "Estimated LUTs": 106, - "Total Node": 106 + "Pi": 8, + "Po": 4, + "logic element": 97, + "Longest Path": 43, + "Average Path": 9, + "Estimated LUTs": 97, + "Total Node": 97 }, "common/dlatch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dlatch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -665,12 +657,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 10, + "logic element": 14, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 10, - "Total Node": 10 + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 14, + "Total Node": 14 }, "common/ge/no_arch": { "test_name": "common/ge/no_arch", @@ -681,11 +673,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 10, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 10, - "Total Node": 10 + "logic element": 14, + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 14, + "Total Node": 14 }, "common/gt/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/gt/k6_frac_N10_frac_chain_mem32K_40nm", @@ -697,12 +689,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 6, + "logic element": 13, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "Longest Path": 10, + "Average Path": 7, + "Estimated LUTs": 13, + "Total Node": 13 }, "common/gt/no_arch": { "test_name": "common/gt/no_arch", @@ -713,11 +705,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 13, + "Longest Path": 10, + "Average Path": 7, + "Estimated LUTs": 13, + "Total Node": 13 }, "common/hierarchy/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/hierarchy/k6_frac_N10_frac_chain_mem32K_40nm", @@ -762,12 +754,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 10, + "logic element": 12, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 9, "Average Path": 6, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 12 }, "common/le/no_arch": { "test_name": "common/le/no_arch", @@ -778,11 +770,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 10, - "Longest Path": 8, + "logic element": 12, + "Longest Path": 9, "Average Path": 6, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 12 }, "common/logical_not/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/logical_not/k6_frac_N10_frac_chain_mem32K_40nm", @@ -794,12 +786,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 4, - "logic element": 5, + "logic element": 7, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 7 }, "common/logical_not/no_arch": { "test_name": "common/logical_not/no_arch", @@ -810,11 +802,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 4, - "logic element": 5, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 7, + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 7 }, "common/lt/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/lt/k6_frac_N10_frac_chain_mem32K_40nm", @@ -826,12 +818,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 6, + "logic element": 10, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 10, + "Total Node": 10 }, "common/lt/no_arch": { "test_name": "common/lt/no_arch", @@ -842,11 +834,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 1, - "logic element": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 10, + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 10, + "Total Node": 10 }, "common/mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -891,15 +883,15 @@ "exec_time(ms)": 282.6, "simulation_time(ms)": 103, "test_coverage(%)": 100, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 8, - "Memory": 8, + "logic element": 7, + "latch": 1, "generic logic size": 4, "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 16 + "Estimated LUTs": 7, + "Total Node": 9 }, "common/memrd/no_arch": { "test_name": "common/memrd/no_arch", @@ -909,14 +901,13 @@ "simulation_time(ms)": 235.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, "Po": 8, - "logic element": 308, - "latch": 128, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 308, - "Total Node": 437 + "logic element": 7, + "latch": 1, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 9 }, "common/mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -927,14 +918,13 @@ "simulation_time(ms)": 28.2, "test_coverage(%)": 100, "Pi": 8, - "Po": 7, - "logic element": 27, - "Adder": 19, + "Po": 4, + "logic element": 107, "generic logic size": 4, - "Longest Path": 27, - "Average Path": 6, - "Estimated LUTs": 27, - "Total Node": 46 + "Longest Path": 44, + "Average Path": 9, + "Estimated LUTs": 107, + "Total Node": 107 }, "common/mod/no_arch": { "test_name": "common/mod/no_arch", @@ -944,12 +934,12 @@ "simulation_time(ms)": 98, "test_coverage(%)": 100, "Pi": 8, - "Po": 7, - "logic element": 138, - "Longest Path": 32, - "Average Path": 7, - "Estimated LUTs": 138, - "Total Node": 138 + "Po": 4, + "logic element": 107, + "Longest Path": 44, + "Average Path": 9, + "Estimated LUTs": 107, + "Total Node": 107 }, "common/mult_const/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mult_const/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1027,12 +1017,12 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 2, - "logic element": 6, + "logic element": 4, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/mux/no_arch": { "test_name": "common/mux/no_arch", @@ -1043,11 +1033,11 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 2, - "logic element": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 4, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/nr/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/nr/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1057,15 +1047,13 @@ "exec_time(ms)": 461.5, "simulation_time(ms)": 158.7, "test_coverage(%)": 100, - "Pi": 16, + "Latch Drivers": 1, "Po": 24, - "logic element": 64, - "Memory": 8, + "latch": 24, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 64, - "Total Node": 72 + "Longest Path": 3, + "Average Path": 2, + "Total Node": 25 }, "common/nr/no_arch": { "test_name": "common/nr/no_arch", @@ -1075,49 +1063,11 @@ "simulation_time(ms)": 275.6, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 15, - "Po": 24, - "logic element": 364, - "latch": 128, - "Longest Path": 16, - "Average Path": 6, - "Estimated LUTs": 364, - "Total Node": 493 - }, - "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm": { - "test_name": "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm", - "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", - "generated_blif": "nrnw_generated.blif", - "max_rss(MiB)": 122.7, - "exec_time(ms)": 580, - "simulation_time(ms)": 179.5, - "test_coverage(%)": 100, - "Pi": 38, "Po": 24, - "logic element": 106, - "Memory": 8, - "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 106, - "Total Node": 114 - }, - "common/nrnw/no_arch": { - "test_name": "common/nrnw/no_arch", - "generated_blif": "nrnw_generated.blif", - "max_rss(MiB)": 105.3, - "exec_time(ms)": 1334, - "simulation_time(ms)": 390.5, - "test_coverage(%)": 100, - "Latch Drivers": 1, - "Pi": 37, - "Po": 24, - "logic element": 586, - "latch": 128, - "Longest Path": 17, - "Average Path": 6, - "Estimated LUTs": 586, - "Total Node": 715 + "latch": 24, + "Longest Path": 3, + "Average Path": 2, + "Total Node": 25 }, "common/pmux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/pmux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1129,12 +1079,12 @@ "test_coverage(%)": 100, "Pi": 230, "Po": 10, - "logic element": 210, + "logic element": 200, "generic logic size": 4, - "Longest Path": 23, - "Average Path": 4, - "Estimated LUTs": 210, - "Total Node": 210 + "Longest Path": 22, + "Average Path": 3, + "Estimated LUTs": 200, + "Total Node": 200 }, "common/pmux/no_arch": { "test_name": "common/pmux/no_arch", @@ -1145,11 +1095,11 @@ "test_coverage(%)": 100, "Pi": 230, "Po": 10, - "logic element": 210, - "Longest Path": 23, - "Average Path": 4, - "Estimated LUTs": 210, - "Total Node": 210 + "logic element": 200, + "Longest Path": 22, + "Average Path": 3, + "Estimated LUTs": 200, + "Total Node": 200 }, "common/pow_const/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/pow_const/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1227,12 +1177,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 5, + "logic element": 4, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "Estimated LUTs": 4, + "Total Node": 4 }, "common/reduce_and/no_arch": { "test_name": "common/reduce_and/no_arch", @@ -1243,11 +1193,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 5, - "Longest Path": 5, + "logic element": 4, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "Estimated LUTs": 4, + "Total Node": 4 }, "common/reduce_bool/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/reduce_bool/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1259,12 +1209,12 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 2, - "logic element": 4, + "logic element": 12, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 4 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 12, + "Total Node": 12 }, "common/reduce_bool/no_arch": { "test_name": "common/reduce_bool/no_arch", @@ -1275,11 +1225,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 2, - "logic element": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 12, + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 12, + "Total Node": 12 }, "common/register/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/register/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1289,16 +1239,14 @@ "exec_time(ms)": 139.7, "simulation_time(ms)": 12.4, "test_coverage(%)": 100, - "Latch Drivers": 4, + "Latch Drivers": 1, "Pi": 3, "Po": 6, - "logic element": 9, "latch": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 19 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 7 }, "common/register/no_arch": { "test_name": "common/register/no_arch", @@ -1307,15 +1255,13 @@ "exec_time(ms)": 41.9, "simulation_time(ms)": 14, "test_coverage(%)": 100, - "Latch Drivers": 4, + "Latch Drivers": 1, "Pi": 3, "Po": 6, - "logic element": 9, "latch": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 19 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 7 }, "common/rom/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/rom/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1325,15 +1271,13 @@ "exec_time(ms)": 265.4, "simulation_time(ms)": 110.6, "test_coverage(%)": 100, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 8, - "Memory": 8, + "latch": 8, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 16 + "Longest Path": 3, + "Average Path": 2, + "Total Node": 9 }, "common/rom/no_arch": { "test_name": "common/rom/no_arch", @@ -1343,14 +1287,11 @@ "simulation_time(ms)": 190.1, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, "Po": 8, - "logic element": 308, - "latch": 128, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 308, - "Total Node": 437 + "latch": 8, + "Longest Path": 3, + "Average Path": 2, + "Total Node": 9 }, "common/sdffce/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/sdffce/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1363,13 +1304,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 9 + "Estimated LUTs": 4, + "Total Node": 7 }, "common/sdffce/no_arch": { "test_name": "common/sdffce/no_arch", @@ -1381,12 +1322,12 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 9 + "Estimated LUTs": 4, + "Total Node": 7 }, "common/sdffe/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/sdffe/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1399,13 +1340,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 9 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 7 }, "common/sdffe/no_arch": { "test_name": "common/sdffe/no_arch", @@ -1417,12 +1358,12 @@ "Latch Drivers": 1, "Pi": 4, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 2, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 9 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 7 }, "common/sdff/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/sdff/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1435,13 +1376,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Estimated LUTs": 2, + "Total Node": 5 }, "common/sdff/no_arch": { "test_name": "common/sdff/no_arch", @@ -1453,12 +1394,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 7 + "Estimated LUTs": 2, + "Total Node": 5 }, "common/spram/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/spram/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1505,12 +1446,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 3, - "logic element": 6, + "logic element": 3, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "common/sr/no_arch": { "test_name": "common/sr/no_arch", @@ -1521,11 +1462,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 3, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "common/sub/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/sub/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1564,33 +1505,68 @@ "test_name": "common/shiftx/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "generated_blif": "shiftx_generated.blif", - "max_rss(MiB)": 81.9, - "exec_time(ms)": 105, - "simulation_time(ms)": 5.7, + "max_rss(MiB)": 76, + "exec_time(ms)": 125.4, + "simulation_time(ms)": 6.4, "test_coverage(%)": 100, "Pi": 6, "Po": 4, - "logic element": 9, + "logic element": 6, "generic logic size": 4, "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "common/shiftx/no_arch": { "test_name": "common/shiftx/no_arch", "generated_blif": "shiftx_generated.blif", - "max_rss(MiB)": 61.8, - "exec_time(ms)": 24.1, - "simulation_time(ms)": 6, + "max_rss(MiB)": 56.1, + "exec_time(ms)": 30.5, + "simulation_time(ms)": 7, "test_coverage(%)": 100, "Pi": 6, "Po": 4, - "logic element": 9, + "logic element": 6, "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 + }, + "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm": { + "test_name": "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm", + "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", + "generated_blif": "nrnw_generated.blif", + "max_rss(MiB)": 123, + "exec_time(ms)": 573, + "simulation_time(ms)": 102.1, + "test_coverage(%)": 100, + "Pi": 38, + "Po": 24, + "logic element": 107, + "Memory": 8, + "generic logic size": 4, + "Longest Path": 11, + "Average Path": 5, + "Estimated LUTs": 107, + "Total Node": 115 + }, + "common/nrnw/no_arch": { + "test_name": "common/nrnw/no_arch", + "generated_blif": "nrnw_generated.blif", + "max_rss(MiB)": 100.3, + "exec_time(ms)": 1103.1, + "simulation_time(ms)": 196.7, + "test_coverage(%)": 100, + "Latch Drivers": 1, + "Pi": 37, + "Po": 24, + "logic element": 587, + "latch": 128, + "Longest Path": 18, + "Average Path": 6, + "Estimated LUTs": 587, + "Total Node": 716 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/common/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/common/synthesis_result.json index d87e565dd67..ce5a68c397a 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/common/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/common/synthesis_result.json @@ -45,13 +45,13 @@ "optimization_time(ms)": 1.4, "techmap_time(ms)": 0.4, "synthesis_time(ms)": 311.6, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "Memory": 8, + "latch": 1, "generic logic size": 4, "Longest Path": 3, "Average Path": 3, - "Total Node": 8 + "Total Node": 2 }, "common/1r/no_arch": { "test_name": "common/1r/no_arch", @@ -62,14 +62,12 @@ "optimization_time(ms)": 0.2, "techmap_time(ms)": 8, "synthesis_time(ms)": 420.6, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 300, - "latch": 128, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 300, - "Total Node": 428 + "latch": 1, + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "common/2r1w/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/2r1w/k6_frac_N10_frac_chain_mem32K_40nm", @@ -153,13 +151,13 @@ "optimization_time(ms)": 1.9, "techmap_time(ms)": 0.7, "synthesis_time(ms)": 311.7, - "Pi": 9, + "Latch Drivers": 1, "Po": 16, - "Memory": 8, + "latch": 1, "generic logic size": 4, "Longest Path": 3, "Average Path": 3, - "Total Node": 8 + "Total Node": 2 }, "common/2r/no_arch": { "test_name": "common/2r/no_arch", @@ -170,14 +168,12 @@ "optimization_time(ms)": 0.3, "techmap_time(ms)": 12.6, "synthesis_time(ms)": 432.1, - "Pi": 9, + "Latch Drivers": 1, "Po": 16, - "logic element": 488, - "latch": 128, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 488, - "Total Node": 616 + "latch": 1, + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "common/adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -370,23 +366,13 @@ "test_name": "common/bram/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "bram.v", - "warnings": [ - "[NETLIST] Input pin (block_ram^rd_addr~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~7) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~7) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 71.7, "exec_time(ms)": 154.3, "elaboration_time(ms)": 63.9, "optimization_time(ms)": 1.1, "techmap_time(ms)": 0.4, "synthesis_time(ms)": 65.4, - "Pi": 19, + "Pi": 23, "Po": 8, "logic element": 1, "Memory": 8, @@ -399,30 +385,20 @@ "common/bram/no_arch": { "test_name": "common/bram/no_arch", "verilog": "bram.v", - "warnings": [ - "[NETLIST] Input pin (block_ram^rd_addr~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^rd_addr~7) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (block_ram^wr_addr~7) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 53.8, "exec_time(ms)": 80.1, "elaboration_time(ms)": 65.7, "optimization_time(ms)": 0.2, "techmap_time(ms)": 8.1, "synthesis_time(ms)": 74.1, - "Pi": 19, + "Pi": 23, "Po": 8, - "logic element": 481, - "latch": 128, + "logic element": 1877, + "latch": 512, "Longest Path": 10, "Average Path": 5, - "Estimated LUTs": 481, - "Total Node": 609 + "Estimated LUTs": 1877, + "Total Node": 2389 }, "common/dffe/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dffe/k6_frac_N10_frac_chain_mem32K_40nm", @@ -584,6 +560,36 @@ "test_name": "common/div_by_const/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "div_by_const.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available." + ], "max_rss(MiB)": 102.7, "exec_time(ms)": 239.9, "elaboration_time(ms)": 95.3, @@ -592,30 +598,59 @@ "synthesis_time(ms)": 137.1, "Pi": 4, "Po": 7, - "logic element": 9, - "Adder": 11, + "logic element": 133, "generic logic size": 4, - "Longest Path": 16, - "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 20 + "Longest Path": 38, + "Average Path": 6, + "Estimated LUTs": 133, + "Total Node": 133 }, "common/div_by_const/no_arch": { "test_name": "common/div_by_const/no_arch", "verilog": "div_by_const.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin div_by_const^Y_$_OR__Y_B_$_AND__Y_A~31: not available." + ], "max_rss(MiB)": 107.6, "exec_time(ms)": 230.5, "elaboration_time(ms)": 96.6, "optimization_time(ms)": 0, "techmap_time(ms)": 105.8, "synthesis_time(ms)": 202.4, - "Pi": 3, + "Pi": 4, "Po": 7, - "logic element": 58, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 58, - "Total Node": 58 + "logic element": 133, + "Longest Path": 38, + "Average Path": 6, + "Estimated LUTs": 133, + "Total Node": 133 }, "common/div/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/div/k6_frac_N10_frac_chain_mem32K_40nm", @@ -628,14 +663,13 @@ "techmap_time(ms)": 0.8, "synthesis_time(ms)": 41.4, "Pi": 8, - "Po": 7, - "logic element": 16, - "Adder": 19, + "Po": 4, + "logic element": 97, "generic logic size": 4, - "Longest Path": 25, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 35 + "Longest Path": 43, + "Average Path": 9, + "Estimated LUTs": 97, + "Total Node": 97 }, "common/div/no_arch": { "test_name": "common/div/no_arch", @@ -646,13 +680,13 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 3, "synthesis_time(ms)": 53.1, - "Pi": 6, - "Po": 7, - "logic element": 99, - "Longest Path": 30, - "Average Path": 7, - "Estimated LUTs": 99, - "Total Node": 99 + "Pi": 8, + "Po": 4, + "logic element": 97, + "Longest Path": 43, + "Average Path": 9, + "Estimated LUTs": 97, + "Total Node": 97 }, "common/dlatch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/dlatch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -732,12 +766,12 @@ "synthesis_time(ms)": 49.9, "Pi": 4, "Po": 1, - "logic element": 9, + "logic element": 14, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 14, + "Total Node": 14 }, "common/ge/no_arch": { "test_name": "common/ge/no_arch", @@ -750,11 +784,11 @@ "synthesis_time(ms)": 39.8, "Pi": 4, "Po": 1, - "logic element": 9, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 14, + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 14, + "Total Node": 14 }, "common/gt/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/gt/k6_frac_N10_frac_chain_mem32K_40nm", @@ -768,12 +802,12 @@ "synthesis_time(ms)": 38.9, "Pi": 4, "Po": 1, - "logic element": 5, + "logic element": 13, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 10, + "Average Path": 7, + "Estimated LUTs": 13, + "Total Node": 13 }, "common/gt/no_arch": { "test_name": "common/gt/no_arch", @@ -786,11 +820,11 @@ "synthesis_time(ms)": 34.1, "Pi": 4, "Po": 1, - "logic element": 5, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 13, + "Longest Path": 10, + "Average Path": 7, + "Estimated LUTs": 13, + "Total Node": 13 }, "common/hierarchy/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/hierarchy/k6_frac_N10_frac_chain_mem32K_40nm", @@ -839,12 +873,12 @@ "synthesis_time(ms)": 32.5, "Pi": 4, "Po": 1, - "logic element": 9, + "logic element": 12, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "Longest Path": 9, + "Average Path": 6, + "Estimated LUTs": 12, + "Total Node": 12 }, "common/le/no_arch": { "test_name": "common/le/no_arch", @@ -857,11 +891,11 @@ "synthesis_time(ms)": 47.9, "Pi": 4, "Po": 1, - "logic element": 9, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 12, + "Longest Path": 9, + "Average Path": 6, + "Estimated LUTs": 12, + "Total Node": 12 }, "common/logical_not/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/logical_not/k6_frac_N10_frac_chain_mem32K_40nm", @@ -875,12 +909,12 @@ "synthesis_time(ms)": 36.7, "Pi": 4, "Po": 4, - "logic element": 1, + "logic element": 4, "generic logic size": 4, - "Longest Path": 3, - "Average Path": 2, - "Estimated LUTs": 1, - "Total Node": 1 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/logical_not/no_arch": { "test_name": "common/logical_not/no_arch", @@ -893,11 +927,11 @@ "synthesis_time(ms)": 37.5, "Pi": 4, "Po": 4, - "logic element": 1, - "Longest Path": 3, - "Average Path": 2, - "Estimated LUTs": 1, - "Total Node": 1 + "logic element": 4, + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "common/lt/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/lt/k6_frac_N10_frac_chain_mem32K_40nm", @@ -911,12 +945,12 @@ "synthesis_time(ms)": 40.3, "Pi": 4, "Po": 1, - "logic element": 5, + "logic element": 10, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 10, + "Total Node": 10 }, "common/lt/no_arch": { "test_name": "common/lt/no_arch", @@ -929,11 +963,11 @@ "synthesis_time(ms)": 46.6, "Pi": 4, "Po": 1, - "logic element": 5, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 10, + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 10, + "Total Node": 10 }, "common/mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -981,13 +1015,13 @@ "optimization_time(ms)": 0.8, "techmap_time(ms)": 0.3, "synthesis_time(ms)": 51.5, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "Memory": 8, + "latch": 1, "generic logic size": 4, "Longest Path": 3, "Average Path": 3, - "Total Node": 8 + "Total Node": 2 }, "common/memrd/no_arch": { "test_name": "common/memrd/no_arch", @@ -998,14 +1032,12 @@ "optimization_time(ms)": 0.1, "techmap_time(ms)": 4, "synthesis_time(ms)": 53.2, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 300, - "latch": 128, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 300, - "Total Node": 428 + "latch": 1, + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "common/mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1018,14 +1050,13 @@ "techmap_time(ms)": 0.8, "synthesis_time(ms)": 34.8, "Pi": 8, - "Po": 7, - "logic element": 20, - "Adder": 19, + "Po": 4, + "logic element": 107, "generic logic size": 4, - "Longest Path": 26, - "Average Path": 5, - "Estimated LUTs": 20, - "Total Node": 39 + "Longest Path": 44, + "Average Path": 9, + "Estimated LUTs": 107, + "Total Node": 107 }, "common/mod/no_arch": { "test_name": "common/mod/no_arch", @@ -1037,12 +1068,12 @@ "techmap_time(ms)": 2.1, "synthesis_time(ms)": 40.6, "Pi": 8, - "Po": 7, - "logic element": 131, - "Longest Path": 31, - "Average Path": 6, - "Estimated LUTs": 131, - "Total Node": 131 + "Po": 4, + "logic element": 107, + "Longest Path": 44, + "Average Path": 9, + "Estimated LUTs": 107, + "Total Node": 107 }, "common/mult_const/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/mult_const/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1160,15 +1191,13 @@ "optimization_time(ms)": 2.5, "techmap_time(ms)": 1.3, "synthesis_time(ms)": 80.2, - "Pi": 16, + "Latch Drivers": 1, "Po": 24, - "logic element": 40, - "Memory": 8, + "latch": 24, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 40, - "Total Node": 48 + "Longest Path": 3, + "Average Path": 2, + "Total Node": 25 }, "common/nr/no_arch": { "test_name": "common/nr/no_arch", @@ -1179,14 +1208,12 @@ "optimization_time(ms)": 0.6, "techmap_time(ms)": 15.4, "synthesis_time(ms)": 76.2, - "Pi": 16, + "Latch Drivers": 1, "Po": 24, - "logic element": 340, - "latch": 128, - "Longest Path": 15, - "Average Path": 5, - "Estimated LUTs": 340, - "Total Node": 468 + "latch": 24, + "Longest Path": 3, + "Average Path": 2, + "Total Node": 25 }, "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/nrnw/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1200,13 +1227,13 @@ "synthesis_time(ms)": 113.4, "Pi": 38, "Po": 24, - "logic element": 82, + "logic element": 83, "Memory": 8, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 82, - "Total Node": 90 + "Estimated LUTs": 83, + "Total Node": 91 }, "common/nrnw/no_arch": { "test_name": "common/nrnw/no_arch", @@ -1219,12 +1246,12 @@ "synthesis_time(ms)": 120, "Pi": 38, "Po": 24, - "logic element": 562, + "logic element": 563, "latch": 128, - "Longest Path": 16, + "Longest Path": 17, "Average Path": 5, - "Estimated LUTs": 562, - "Total Node": 690 + "Estimated LUTs": 563, + "Total Node": 691 }, "common/pmux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/pmux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1382,12 +1409,12 @@ "synthesis_time(ms)": 45.7, "Pi": 11, "Po": 2, - "logic element": 2, + "logic element": 11, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 5, - "Total Node": 2 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 11, + "Total Node": 11 }, "common/reduce_bool/no_arch": { "test_name": "common/reduce_bool/no_arch", @@ -1400,11 +1427,11 @@ "synthesis_time(ms)": 47.5, "Pi": 11, "Po": 2, - "logic element": 2, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 11, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 11, + "Total Node": 11 }, "common/register/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/register/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1416,16 +1443,14 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0, "synthesis_time(ms)": 41.8, - "Latch Drivers": 4, + "Latch Drivers": 1, "Pi": 3, "Po": 6, - "logic element": 3, "latch": 6, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 13 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 7 }, "common/register/no_arch": { "test_name": "common/register/no_arch", @@ -1436,15 +1461,13 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0, "synthesis_time(ms)": 42.6, - "Latch Drivers": 4, + "Latch Drivers": 1, "Pi": 3, "Po": 6, - "logic element": 3, "latch": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 13 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 7 }, "common/rom/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/rom/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1456,13 +1479,13 @@ "optimization_time(ms)": 0.5, "techmap_time(ms)": 0.2, "synthesis_time(ms)": 45.2, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "Memory": 8, + "latch": 8, "generic logic size": 4, "Longest Path": 3, - "Average Path": 3, - "Total Node": 8 + "Average Path": 2, + "Total Node": 9 }, "common/rom/no_arch": { "test_name": "common/rom/no_arch", @@ -1473,14 +1496,12 @@ "optimization_time(ms)": 0.1, "techmap_time(ms)": 5.1, "synthesis_time(ms)": 49.4, - "Pi": 5, + "Latch Drivers": 1, "Po": 8, - "logic element": 300, - "latch": 128, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 300, - "Total Node": 428 + "latch": 8, + "Longest Path": 3, + "Average Path": 2, + "Total Node": 9 }, "common/sdffce/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "common/sdffce/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/full/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/full/simulation_result.json index 25146b88c8f..6e7006c684e 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/full/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/full/simulation_result.json @@ -9,14 +9,14 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 60, - "logic element": 170, + "logic element": 88, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 170, - "Total Node": 181 + "Estimated LUTs": 88, + "Total Node": 99 }, "full/ansiportlist/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/ansiportlist/k6_frac_N10_frac_chain_mem32K_40nm", @@ -28,14 +28,14 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 60, - "logic element": 170, + "logic element": 88, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 170, - "Total Node": 181 + "Estimated LUTs": 88, + "Total Node": 99 }, "full/binops/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/binops/k6_frac_N10_frac_chain_mem32K_40nm", @@ -47,14 +47,14 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 60, - "logic element": 170, + "logic element": 88, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 170, - "Total Node": 181 + "Estimated LUTs": 88, + "Total Node": 99 }, "full/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm", @@ -67,14 +67,14 @@ "Latch Drivers": 1, "Pi": 35, "Po": 100, - "logic element": 17863, - "latch": 532, + "logic element": 19682, + "latch": 566, "Adder": 3351, "generic logic size": 4, - "Longest Path": 331, + "Longest Path": 785, "Average Path": 5, - "Estimated LUTs": 19213, - "Total Node": 21747 + "Estimated LUTs": 19682, + "Total Node": 23600 }, "full/bm_base_memory/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_base_memory/k6_frac_N10_frac_chain_mem32K_40nm", @@ -87,14 +87,14 @@ "Latch Drivers": 1, "Pi": 13, "Po": 12, - "logic element": 16, - "latch": 8, + "logic element": 11, + "latch": 9, "Memory": 4, "generic logic size": 4, - "Longest Path": 7, + "Longest Path": 6, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 29 + "Estimated LUTs": 11, + "Total Node": 25 }, "full/bm_DL_four_bit_adder_continuous_assign_using_vectors/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_DL_four_bit_adder_continuous_assign_using_vectors/k6_frac_N10_frac_chain_mem32K_40nm", @@ -106,12 +106,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 5, - "logic element": 49, + "logic element": 32, "generic logic size": 4, - "Longest Path": 15, - "Average Path": 7, - "Estimated LUTs": 49, - "Total Node": 49 + "Longest Path": 14, + "Average Path": 6, + "Estimated LUTs": 32, + "Total Node": 32 }, "full/bm_sfifo_rtl/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_sfifo_rtl/k6_frac_N10_frac_chain_mem32K_40nm", @@ -124,15 +124,15 @@ "Latch Drivers": 1, "Pi": 11, "Po": 11, - "logic element": 72, + "logic element": 82, "latch": 12, - "Adder": 15, + "Adder": 20, "Memory": 8, "generic logic size": 4, - "Longest Path": 19, + "Longest Path": 20, "Average Path": 5, - "Estimated LUTs": 72, - "Total Node": 108 + "Estimated LUTs": 82, + "Total Node": 123 }, "full/cf_cordic_v_18_18_18/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_cordic_v_18_18_18/k6_frac_N10_frac_chain_mem32K_40nm", @@ -145,14 +145,14 @@ "Latch Drivers": 1, "Pi": 56, "Po": 54, - "logic element": 7487, + "logic element": 7042, "latch": 2052, - "Adder": 1711, + "Adder": 2033, "generic logic size": 4, - "Longest Path": 858, - "Average Path": 5, - "Estimated LUTs": 7739, - "Total Node": 11251 + "Longest Path": 415, + "Average Path": 4, + "Estimated LUTs": 7042, + "Total Node": 11128 }, "full/cf_cordic_v_8_8_8/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_cordic_v_8_8_8/k6_frac_N10_frac_chain_mem32K_40nm", @@ -165,14 +165,14 @@ "Latch Drivers": 1, "Pi": 26, "Po": 24, - "logic element": 1566, + "logic element": 1443, "latch": 432, - "Adder": 360, + "Adder": 421, "generic logic size": 4, - "Longest Path": 228, - "Average Path": 5, - "Estimated LUTs": 1598, - "Total Node": 2359 + "Longest Path": 139, + "Average Path": 4, + "Estimated LUTs": 1443, + "Total Node": 2297 }, "full/cf_fft_256_8/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_fft_256_8/k6_frac_N10_frac_chain_mem32K_40nm", @@ -185,15 +185,15 @@ "Latch Drivers": 1, "Pi": 35, "Po": 33, - "logic element": 9275, - "latch": 2631, + "logic element": 7583, + "latch": 2643, "Adder": 549, "Multiplier": 30, "generic logic size": 4, - "Longest Path": 309, + "Longest Path": 328, "Average Path": 7, - "Estimated LUTs": 9895, - "Total Node": 12486 + "Estimated LUTs": 7583, + "Total Node": 10806 }, "full/cf_fir_24_16_16/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_fir_24_16_16/k6_frac_N10_frac_chain_mem32K_40nm", @@ -206,15 +206,15 @@ "Latch Drivers": 1, "Pi": 417, "Po": 37, - "logic element": 437, + "logic element": 400, "latch": 2110, "Adder": 838, "Multiplier": 25, "generic logic size": 4, - "Longest Path": 99, - "Average Path": 6, - "Estimated LUTs": 437, - "Total Node": 3411 + "Longest Path": 98, + "Average Path": 5, + "Estimated LUTs": 400, + "Total Node": 3374 }, "full/cf_fir_3_8_8/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_fir_3_8_8/k6_frac_N10_frac_chain_mem32K_40nm", @@ -227,15 +227,15 @@ "Latch Drivers": 1, "Pi": 41, "Po": 18, - "logic element": 50, + "logic element": 32, "latch": 148, "Adder": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 34, - "Average Path": 6, - "Estimated LUTs": 50, - "Total Node": 258 + "Longest Path": 33, + "Average Path": 5, + "Estimated LUTs": 32, + "Total Node": 240 }, "full/ch_intrinsics/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/ch_intrinsics/k6_frac_N10_frac_chain_mem32K_40nm", @@ -248,14 +248,14 @@ "Latch Drivers": 1, "Pi": 98, "Po": 130, - "logic element": 567, - "latch": 199, + "logic element": 460, + "latch": 210, "Memory": 8, "generic logic size": 4, - "Longest Path": 55, + "Longest Path": 53, "Average Path": 4, - "Estimated LUTs": 592, - "Total Node": 775 + "Estimated LUTs": 460, + "Total Node": 679 }, "full/CRC33_D264/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/CRC33_D264/k6_frac_N10_frac_chain_mem32K_40nm", @@ -267,12 +267,12 @@ "test_coverage(%)": 100, "Pi": 297, "Po": 33, - "logic element": 1689, + "logic element": 552, "generic logic size": 4, - "Longest Path": 37, - "Average Path": 7, - "Estimated LUTs": 1689, - "Total Node": 1689 + "Longest Path": 19, + "Average Path": 4, + "Estimated LUTs": 552, + "Total Node": 552 }, "full/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -285,15 +285,15 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 647, + "logic element": 641, "latch": 193, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 127, - "Average Path": 5, - "Estimated LUTs": 657, - "Total Node": 978 + "Longest Path": 93, + "Average Path": 4, + "Estimated LUTs": 641, + "Total Node": 972 }, "full/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -306,15 +306,15 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 447, + "logic element": 441, "latch": 96, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 120, - "Average Path": 5, - "Estimated LUTs": 457, - "Total Node": 681 + "Longest Path": 92, + "Average Path": 4, + "Estimated LUTs": 441, + "Total Node": 675 }, "full/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm", @@ -327,15 +327,15 @@ "Latch Drivers": 1, "Pi": 9, "Po": 10, - "logic element": 741, + "logic element": 1060, "latch": 202, "Adder": 20, - "Multiplier": 15, + "Multiplier": 1, "generic logic size": 4, - "Longest Path": 129, - "Average Path": 5, - "Estimated LUTs": 812, - "Total Node": 979 + "Longest Path": 149, + "Average Path": 4, + "Estimated LUTs": 1060, + "Total Node": 1284 }, "full/iir1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/iir1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -348,15 +348,15 @@ "Latch Drivers": 2, "Pi": 32, "Po": 25, - "logic element": 803, + "logic element": 792, "latch": 188, - "Adder": 173, + "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 107, - "Average Path": 6, - "Estimated LUTs": 807, - "Total Node": 1171 + "Longest Path": 91, + "Average Path": 5, + "Estimated LUTs": 792, + "Total Node": 1119 }, "full/iir_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/iir_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm", @@ -369,15 +369,15 @@ "Latch Drivers": 1, "Pi": 27, "Po": 10, - "logic element": 611, + "logic element": 576, "latch": 444, "Adder": 117, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 115, - "Average Path": 5, - "Estimated LUTs": 618, - "Total Node": 1178 + "Longest Path": 140, + "Average Path": 4, + "Estimated LUTs": 576, + "Total Node": 1143 }, "full/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -390,16 +390,16 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 52949, - "latch": 6468, - "Adder": 4682, + "logic element": 67336, + "latch": 6253, + "Adder": 4629, "Multiplier": 8, "Memory": 1409, "generic logic size": 4, - "Longest Path": 4541, - "Average Path": 5, - "Estimated LUTs": 56243, - "Total Node": 65517 + "Longest Path": 4733, + "Average Path": 4, + "Estimated LUTs": 67336, + "Total Node": 79636 }, "full/matmul/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/matmul/k6_frac_N10_frac_chain_mem32K_40nm", @@ -412,15 +412,15 @@ "Latch Drivers": 1, "Pi": 1, "Po": 7, - "logic element": 35, + "logic element": 22, "latch": 5, "Adder": 13, "Memory": 2, "generic logic size": 4, - "Longest Path": 24, - "Average Path": 5, - "Estimated LUTs": 35, - "Total Node": 56 + "Longest Path": 20, + "Average Path": 4, + "Estimated LUTs": 22, + "Total Node": 43 }, "full/mcml/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/mcml/k6_frac_N10_frac_chain_mem32K_40nm", @@ -433,16 +433,16 @@ "Latch Drivers": 1, "Pi": 35, "Po": 356, - "logic element": 184428, - "latch": 51617, - "Adder": 27390, + "logic element": 194233, + "latch": 51836, + "Adder": 25169, "Multiplier": 27, "Memory": 348, "generic logic size": 4, - "Longest Path": 19604, - "Average Path": 5, - "Estimated LUTs": 193230, - "Total Node": 263811 + "Longest Path": 11844, + "Average Path": 4, + "Estimated LUTs": 194233, + "Total Node": 271614 }, "full/memory_controller/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/memory_controller/k6_frac_N10_frac_chain_mem32K_40nm", @@ -455,14 +455,12 @@ "Latch Drivers": 1, "Pi": 18, "Po": 12, - "logic element": 12, "latch": 12, "Memory": 8, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 33 + "Total Node": 21 }, "full/mkPktMerge/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/mkPktMerge/k6_frac_N10_frac_chain_mem32K_40nm", @@ -475,20 +473,26 @@ "Latch Drivers": 1, "Pi": 310, "Po": 156, - "logic element": 671, + "logic element": 560, "latch": 36, "Adder": 42, "Memory": 459, "generic logic size": 4, - "Longest Path": 106, + "Longest Path": 85, "Average Path": 5, - "Estimated LUTs": 671, - "Total Node": 1209 + "Estimated LUTs": 560, + "Total Node": 1098 }, "full/oc54_cpu/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/oc54_cpu/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "generated_blif": "oc54_cpu_generated.blif", + "warnings": [ + "[SIMULATION] Vector 40 equivalent but output vector has bits set when expecting don't care :", + "[SIMULATION] Vector 41 equivalent but output vector has bits set when expecting don't care :", + "[SIMULATION] Vector 42 equivalent but output vector has bits set when expecting don't care :", + "[SIMULATION] Vector 43 equivalent but output vector has bits set when expecting don't care :" + ], "max_rss(MiB)": 17.9, "exec_time(ms)": 874.8, "simulation_time(ms)": 814.2, @@ -496,15 +500,15 @@ "Latch Drivers": 1, "Pi": 99, "Po": 40, - "logic element": 3977, + "logic element": 5464, "latch": 419, "Adder": 499, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 1041, - "Average Path": 5, - "Estimated LUTs": 4182, - "Total Node": 4897 + "Longest Path": 1665, + "Average Path": 4, + "Estimated LUTs": 5464, + "Total Node": 6384 }, "full/paj_framebuftop_hierarchy_no_mem_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/paj_framebuftop_hierarchy_no_mem_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm", @@ -517,14 +521,14 @@ "Latch Drivers": 1, "Pi": 67, "Po": 35, - "logic element": 1621, - "latch": 599, + "logic element": 1789, + "latch": 609, "Adder": 118, "generic logic size": 4, - "Longest Path": 91, - "Average Path": 5, - "Estimated LUTs": 1668, - "Total Node": 2339 + "Longest Path": 106, + "Average Path": 4, + "Estimated LUTs": 1789, + "Total Node": 2517 }, "full/sha/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/sha/k6_frac_N10_frac_chain_mem32K_40nm", @@ -537,14 +541,14 @@ "Latch Drivers": 1, "Pi": 37, "Po": 36, - "logic element": 4872, - "latch": 910, + "logic element": 5453, + "latch": 894, "Adder": 309, "generic logic size": 4, - "Longest Path": 2423, - "Average Path": 5, - "Estimated LUTs": 5095, - "Total Node": 6092 + "Longest Path": 2989, + "Average Path": 4, + "Estimated LUTs": 5453, + "Total Node": 6657 }, "full/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm", @@ -557,15 +561,15 @@ "Latch Drivers": 1, "Pi": 104, "Po": 104, - "logic element": 11131, - "latch": 11897, - "Adder": 2727, + "logic element": 12762, + "latch": 11813, + "Adder": 2731, "Memory": 1024, "generic logic size": 4, - "Longest Path": 184, - "Average Path": 5, - "Estimated LUTs": 11275, - "Total Node": 26780 + "Longest Path": 197, + "Average Path": 4, + "Estimated LUTs": 12762, + "Total Node": 28331 }, "full/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -578,15 +582,15 @@ "Latch Drivers": 1, "Pi": 132, "Po": 145, - "logic element": 11352, - "latch": 11449, + "logic element": 12108, + "latch": 11522, "Adder": 2332, "Multiplier": 152, "generic logic size": 4, - "Longest Path": 201, - "Average Path": 5, - "Estimated LUTs": 11379, - "Total Node": 25286 + "Longest Path": 193, + "Average Path": 4, + "Estimated LUTs": 12108, + "Total Node": 26115 }, "full/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -599,15 +603,15 @@ "Latch Drivers": 1, "Pi": 148, "Po": 182, - "logic element": 10525, - "latch": 15833, - "Adder": 12471, + "logic element": 10781, + "latch": 15657, + "Adder": 12153, "Multiplier": 468, "generic logic size": 4, "Longest Path": 139, - "Average Path": 5, - "Estimated LUTs": 10539, - "Total Node": 39298 + "Average Path": 4, + "Estimated LUTs": 10781, + "Total Node": 39060 }, "full/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm", @@ -620,14 +624,14 @@ "Latch Drivers": 2, "Pi": 9, "Po": 30, - "logic element": 1170, - "latch": 99, + "logic element": 594, + "latch": 120, "Adder": 28, "generic logic size": 4, - "Longest Path": 78, - "Average Path": 5, - "Estimated LUTs": 1483, - "Total Node": 1299 + "Longest Path": 128, + "Average Path": 4, + "Estimated LUTs": 594, + "Total Node": 744 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/full/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/full/synthesis_result.json index 59a2494ea0a..9fa0c6fb41e 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/full/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/full/synthesis_result.json @@ -11,14 +11,14 @@ "synthesis_time(ms)": 33.5, "Pi": 8, "Po": 60, - "logic element": 110, + "logic element": 58, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 110, - "Total Node": 121 + "Estimated LUTs": 58, + "Total Node": 69 }, "full/ansiportlist/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/ansiportlist/k6_frac_N10_frac_chain_mem32K_40nm", @@ -32,14 +32,14 @@ "synthesis_time(ms)": 33.2, "Pi": 8, "Po": 60, - "logic element": 110, + "logic element": 58, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 110, - "Total Node": 121 + "Estimated LUTs": 58, + "Total Node": 69 }, "full/binops/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/binops/k6_frac_N10_frac_chain_mem32K_40nm", @@ -53,14 +53,14 @@ "synthesis_time(ms)": 32.8, "Pi": 8, "Po": 60, - "logic element": 110, + "logic element": 58, "Adder": 10, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 110, - "Total Node": 121 + "Estimated LUTs": 58, + "Total Node": 69 }, "full/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm", @@ -75,14 +75,14 @@ "Latch Drivers": 1, "Pi": 35, "Po": 100, - "logic element": 17763, - "latch": 532, + "logic element": 19660, + "latch": 566, "Adder": 3351, "generic logic size": 4, - "Longest Path": 330, + "Longest Path": 785, "Average Path": 4, - "Estimated LUTs": 19113, - "Total Node": 21647 + "Estimated LUTs": 19660, + "Total Node": 23578 }, "full/bm_base_memory/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_base_memory/k6_frac_N10_frac_chain_mem32K_40nm", @@ -98,13 +98,13 @@ "Pi": 13, "Po": 12, "logic element": 4, - "latch": 8, + "latch": 9, "Memory": 4, "generic logic size": 4, "Longest Path": 6, "Average Path": 3, "Estimated LUTs": 4, - "Total Node": 17 + "Total Node": 18 }, "full/bm_DL_four_bit_adder_continuous_assign_using_vectors/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_DL_four_bit_adder_continuous_assign_using_vectors/k6_frac_N10_frac_chain_mem32K_40nm", @@ -118,12 +118,12 @@ "synthesis_time(ms)": 31.6, "Pi": 9, "Po": 5, - "logic element": 44, + "logic element": 28, "generic logic size": 4, "Longest Path": 14, - "Average Path": 6, - "Estimated LUTs": 44, - "Total Node": 44 + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "full/bm_sfifo_rtl/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/bm_sfifo_rtl/k6_frac_N10_frac_chain_mem32K_40nm", @@ -138,15 +138,15 @@ "Latch Drivers": 1, "Pi": 11, "Po": 11, - "logic element": 61, + "logic element": 74, "latch": 12, - "Adder": 15, + "Adder": 20, "Memory": 8, "generic logic size": 4, - "Longest Path": 18, - "Average Path": 4, - "Estimated LUTs": 61, - "Total Node": 97 + "Longest Path": 19, + "Average Path": 5, + "Estimated LUTs": 74, + "Total Node": 115 }, "full/cf_cordic_v_18_18_18/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_cordic_v_18_18_18/k6_frac_N10_frac_chain_mem32K_40nm", @@ -161,14 +161,14 @@ "Latch Drivers": 1, "Pi": 56, "Po": 54, - "logic element": 7433, + "logic element": 7042, "latch": 2052, - "Adder": 1711, + "Adder": 2033, "generic logic size": 4, - "Longest Path": 857, + "Longest Path": 415, "Average Path": 4, - "Estimated LUTs": 7685, - "Total Node": 11197 + "Estimated LUTs": 7042, + "Total Node": 11128 }, "full/cf_cordic_v_8_8_8/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_cordic_v_8_8_8/k6_frac_N10_frac_chain_mem32K_40nm", @@ -183,14 +183,14 @@ "Latch Drivers": 1, "Pi": 26, "Po": 24, - "logic element": 1542, + "logic element": 1443, "latch": 432, - "Adder": 360, + "Adder": 421, "generic logic size": 4, - "Longest Path": 227, + "Longest Path": 139, "Average Path": 4, - "Estimated LUTs": 1574, - "Total Node": 2335 + "Estimated LUTs": 1443, + "Total Node": 2297 }, "full/cf_fft_256_8/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_fft_256_8/k6_frac_N10_frac_chain_mem32K_40nm", @@ -205,15 +205,15 @@ "Latch Drivers": 1, "Pi": 35, "Po": 33, - "logic element": 9242, - "latch": 2631, + "logic element": 7583, + "latch": 2643, "Adder": 549, "Multiplier": 30, "generic logic size": 4, - "Longest Path": 308, - "Average Path": 6, - "Estimated LUTs": 9862, - "Total Node": 12453 + "Longest Path": 328, + "Average Path": 7, + "Estimated LUTs": 7583, + "Total Node": 10806 }, "full/cf_fir_24_16_16/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/cf_fir_24_16_16/k6_frac_N10_frac_chain_mem32K_40nm", @@ -274,14 +274,14 @@ "Latch Drivers": 1, "Pi": 98, "Po": 130, - "logic element": 437, - "latch": 199, + "logic element": 395, + "latch": 210, "Memory": 8, "generic logic size": 4, - "Longest Path": 54, + "Longest Path": 53, "Average Path": 3, - "Estimated LUTs": 462, - "Total Node": 645 + "Estimated LUTs": 395, + "Total Node": 614 }, "full/CRC33_D264/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/CRC33_D264/k6_frac_N10_frac_chain_mem32K_40nm", @@ -295,12 +295,12 @@ "synthesis_time(ms)": 214.9, "Pi": 297, "Po": 33, - "logic element": 1656, + "logic element": 552, "generic logic size": 4, - "Longest Path": 36, - "Average Path": 6, - "Estimated LUTs": 1656, - "Total Node": 1656 + "Longest Path": 19, + "Average Path": 4, + "Estimated LUTs": 552, + "Total Node": 552 }, "full/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -315,15 +315,15 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 551, + "logic element": 641, "latch": 193, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 126, + "Longest Path": 93, "Average Path": 4, - "Estimated LUTs": 561, - "Total Node": 882 + "Estimated LUTs": 641, + "Total Node": 972 }, "full/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -338,15 +338,15 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 351, + "logic element": 441, "latch": 96, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 119, + "Longest Path": 92, "Average Path": 4, - "Estimated LUTs": 361, - "Total Node": 585 + "Estimated LUTs": 441, + "Total Node": 675 }, "full/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm", @@ -361,15 +361,15 @@ "Latch Drivers": 1, "Pi": 9, "Po": 10, - "logic element": 731, + "logic element": 1060, "latch": 202, "Adder": 20, - "Multiplier": 15, + "Multiplier": 1, "generic logic size": 4, - "Longest Path": 128, + "Longest Path": 149, "Average Path": 4, - "Estimated LUTs": 802, - "Total Node": 969 + "Estimated LUTs": 1060, + "Total Node": 1284 }, "full/iir1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/iir1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -384,15 +384,15 @@ "Latch Drivers": 2, "Pi": 32, "Po": 25, - "logic element": 778, + "logic element": 791, "latch": 188, - "Adder": 173, + "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 106, + "Longest Path": 91, "Average Path": 5, - "Estimated LUTs": 782, - "Total Node": 1146 + "Estimated LUTs": 791, + "Total Node": 1118 }, "full/iir_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/iir_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm", @@ -407,15 +407,15 @@ "Latch Drivers": 1, "Pi": 27, "Po": 10, - "logic element": 601, + "logic element": 575, "latch": 444, "Adder": 117, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 114, + "Longest Path": 140, "Average Path": 4, - "Estimated LUTs": 608, - "Total Node": 1168 + "Estimated LUTs": 575, + "Total Node": 1142 }, "full/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -430,83 +430,21 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 52847, - "latch": 6468, - "Adder": 4682, + "logic element": 67327, + "latch": 6253, + "Adder": 4629, "Multiplier": 8, "Memory": 1409, "generic logic size": 4, - "Longest Path": 4878, + "Longest Path": 5292, "Average Path": 4, - "Estimated LUTs": 56141, - "Total Node": 65415 + "Estimated LUTs": 67327, + "Total Node": 79627 }, "full/matmul/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/matmul/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "matmul.v", - "warnings": [ - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~2) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~3) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~7) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~8) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~9) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~10) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~11) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~12) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~13) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~14) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~15) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~16) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~17) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~18) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~19) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~20) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~21) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~22) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~23) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~24) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~25) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~26) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~27) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~28) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~29) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~30) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^rst_$mux_S_Y_$add_A_Y~31) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~2) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~3) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~4) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~5) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~6) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~7) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~8) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~9) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~10) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~11) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~12) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~13) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~14) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~15) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~16) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~17) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~18) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~19) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~20) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~21) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~22) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~23) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~24) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~25) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~26) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~27) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~28) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~29) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~30) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (matrix_multiplication^addr_tmp_$add_A_1_Y~31) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 11.8, "exec_time(ms)": 69.9, "elaboration_time(ms)": 63.5, @@ -516,20 +454,23 @@ "Latch Drivers": 1, "Pi": 1, "Po": 7, - "logic element": 28, + "logic element": 20, "latch": 5, "Adder": 13, "Memory": 2, "generic logic size": 4, - "Longest Path": 23, + "Longest Path": 19, "Average Path": 4, - "Estimated LUTs": 28, - "Total Node": 49 + "Estimated LUTs": 20, + "Total Node": 41 }, "full/mcml/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/mcml/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "mcml.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin mcml^c_state_$pmux_Y_B_3_$mux_Y_A_$mux_Y_S_$_OR__Y_A_$_NOT__Y_A~2: not available." + ], "max_rss(MiB)": 646.4, "exec_time(ms)": 98168.6, "elaboration_time(ms)": 97139.2, @@ -539,16 +480,16 @@ "Latch Drivers": 1, "Pi": 35, "Po": 356, - "logic element": 184072, - "latch": 51617, - "Adder": 27390, + "logic element": 194233, + "latch": 51836, + "Adder": 25169, "Multiplier": 27, "Memory": 348, "generic logic size": 4, - "Longest Path": 19937, + "Longest Path": 11605, "Average Path": 4, - "Estimated LUTs": 192874, - "Total Node": 263455 + "Estimated LUTs": 194233, + "Total Node": 271614 }, "full/memory_controller/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/memory_controller/k6_frac_N10_frac_chain_mem32K_40nm", @@ -583,15 +524,15 @@ "Latch Drivers": 1, "Pi": 310, "Po": 156, - "logic element": 515, + "logic element": 407, "latch": 36, "Adder": 42, "Memory": 459, "generic logic size": 4, - "Longest Path": 105, + "Longest Path": 85, "Average Path": 4, - "Estimated LUTs": 515, - "Total Node": 1053 + "Estimated LUTs": 407, + "Total Node": 945 }, "full/oc54_cpu/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/oc54_cpu/k6_frac_N10_frac_chain_mem32K_40nm", @@ -606,20 +547,23 @@ "Latch Drivers": 1, "Pi": 99, "Po": 40, - "logic element": 3937, + "logic element": 5462, "latch": 419, "Adder": 499, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 1040, + "Longest Path": 1669, "Average Path": 4, - "Estimated LUTs": 4142, - "Total Node": 4857 + "Estimated LUTs": 5462, + "Total Node": 6382 }, "full/paj_framebuftop_hierarchy_no_mem_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/paj_framebuftop_hierarchy_no_mem_no_combinational/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "paj_framebuftop_hierarchy_no_mem_no_combinational.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin paj_framebuftop_hierarchy_no_mem^vidoutinst.tm3_vidout_hsync_$sdffe_Q_D_$mux_Y_S_$and_Y_A_$_OR__Y_B_$_AND__Y_A_$_AND__Y_B_$_AND__A_Y_$_OR__B_Y~4: not available." + ], "max_rss(MiB)": 14.3, "exec_time(ms)": 281.7, "elaboration_time(ms)": 272.2, @@ -629,14 +573,14 @@ "Latch Drivers": 1, "Pi": 67, "Po": 35, - "logic element": 1586, - "latch": 599, + "logic element": 1789, + "latch": 609, "Adder": 118, "generic logic size": 4, - "Longest Path": 90, + "Longest Path": 106, "Average Path": 4, - "Estimated LUTs": 1633, - "Total Node": 2304 + "Estimated LUTs": 1789, + "Total Node": 2517 }, "full/sha/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/sha/k6_frac_N10_frac_chain_mem32K_40nm", @@ -651,19 +595,22 @@ "Latch Drivers": 1, "Pi": 37, "Po": 36, - "logic element": 4836, - "latch": 910, + "logic element": 5453, + "latch": 894, "Adder": 309, "generic logic size": 4, - "Longest Path": 2422, + "Longest Path": 2989, "Average Path": 4, - "Estimated LUTs": 5059, - "Total Node": 6056 + "Estimated LUTs": 5453, + "Total Node": 6657 }, "full/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "stereovision0.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin sv_chip0_hierarchy_no_mem^tm3_vidout_hsync_$dffe_Q_D_$mux_Y_S_$and_Y_B_$_OR__Y_A_$_NOT__Y_A_$_OR__Y_A_$_OR__A_1_Y~4: not available." + ], "max_rss(MiB)": 71, "exec_time(ms)": 11953.7, "elaboration_time(ms)": 11848.5, @@ -673,15 +620,15 @@ "Latch Drivers": 1, "Pi": 104, "Po": 104, - "logic element": 11027, - "latch": 11897, - "Adder": 2727, + "logic element": 12741, + "latch": 11813, + "Adder": 2731, "Memory": 1024, "generic logic size": 4, - "Longest Path": 183, + "Longest Path": 196, "Average Path": 4, - "Estimated LUTs": 11171, - "Total Node": 26676 + "Estimated LUTs": 12741, + "Total Node": 28310 }, "full/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -696,15 +643,15 @@ "Latch Drivers": 1, "Pi": 132, "Po": 145, - "logic element": 11207, - "latch": 11449, + "logic element": 12102, + "latch": 11522, "Adder": 2332, "Multiplier": 152, "generic logic size": 4, - "Longest Path": 200, + "Longest Path": 193, "Average Path": 4, - "Estimated LUTs": 11234, - "Total Node": 25141 + "Estimated LUTs": 12102, + "Total Node": 26109 }, "full/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -719,15 +666,15 @@ "Latch Drivers": 1, "Pi": 148, "Po": 182, - "logic element": 10343, - "latch": 15833, - "Adder": 12471, + "logic element": 10771, + "latch": 15657, + "Adder": 12153, "Multiplier": 468, "generic logic size": 4, - "Longest Path": 138, + "Longest Path": 139, "Average Path": 4, - "Estimated LUTs": 10357, - "Total Node": 39116 + "Estimated LUTs": 10771, + "Total Node": 39050 }, "full/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "full/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm", @@ -742,14 +689,14 @@ "Latch Drivers": 2, "Pi": 9, "Po": 30, - "logic element": 1140, - "latch": 99, + "logic element": 592, + "latch": 120, "Adder": 28, "generic logic size": 4, - "Longest Path": 77, + "Longest Path": 128, "Average Path": 4, - "Estimated LUTs": 1453, - "Total Node": 1269 + "Estimated LUTs": 592, + "Total Node": 742 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/simulation_result.json index 51d7d1b2f41..02f38b65dd1 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/simulation_result.json @@ -24,12 +24,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "always/always_lone_asterisk/no_arch": { "test_name": "always/always_lone_asterisk/no_arch", @@ -70,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 3, - "logic element": 20, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 20, - "Total Node": 20 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "always/posedge/no_arch": { "test_name": "always/posedge/no_arch", @@ -86,12 +84,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/synthesis_result.json index fa4ec8e214c..20d0132789f 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/always/synthesis_result.json @@ -77,11 +77,11 @@ "synthesis_time(ms)": 36.3, "Pi": 11, "Po": 3, - "logic element": 17, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 17 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "always/posedge/no_arch": { "test_name": "always/posedge/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/and/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/and/simulation_result.json index 5ae378deced..24a765706d6 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/and/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/and/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "and/and_wire/no_arch": { "test_name": "and/and_wire/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "and/range_and_int_wide/no_arch": { "test_name": "and/range_and_int_wide/no_arch", @@ -49,11 +49,11 @@ "test_coverage(%)": 99.3, "Pi": 512, "Po": 256, - "logic element": 512, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 512, - "Total Node": 512 + "logic element": 256, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 256, + "Total Node": 256 }, "and/range_and_wide/no_arch": { "test_name": "and/range_and_wide/no_arch", @@ -64,11 +64,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/simulation_result.json index 4df8cb6f0a6..e97b399e484 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 3, - "logic element": 20, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 20, - "Total Node": 20 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "begin_end/negedge/no_arch": { "test_name": "begin_end/negedge/no_arch", @@ -22,14 +22,14 @@ "simulation_time(ms)": 1.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 2, + "Pi": 1, "Po": 2, - "logic element": 5, + "logic element": 3, "latch": 1, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "begin_end/posedge/no_arch": { "test_name": "begin_end/posedge/no_arch", @@ -41,12 +41,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/synthesis_result.json index a1fa815d33f..6c9a0e1037c 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/begin_end/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 33.2, "Pi": 11, "Po": 3, - "logic element": 17, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 17 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "begin_end/negedge/no_arch": { "test_name": "begin_end/negedge/no_arch", @@ -26,14 +26,14 @@ "techmap_time(ms)": 0, "synthesis_time(ms)": 25.3, "Latch Drivers": 1, - "Pi": 2, + "Pi": 1, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 4 }, "begin_end/posedge/no_arch": { "test_name": "begin_end/posedge/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/simulation_result.json index 69e7dfd8697..c0b6f3055fe 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 3, - "logic element": 22, - "Longest Path": 7, + "logic element": 23, + "Longest Path": 8, "Average Path": 6, - "Estimated LUTs": 22, - "Total Node": 22 + "Estimated LUTs": 23, + "Total Node": 23 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/synthesis_result.json index 1c524d321a0..5878a488780 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/case_endcase/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 31.7, "Pi": 11, "Po": 3, - "logic element": 19, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 19, - "Total Node": 19 + "logic element": 23, + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 23, + "Total Node": 23 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/simulation_result.json index dfd2e77f9fb..70c695c3478 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 3, - "logic element": 20, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 20, - "Total Node": 20 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/synthesis_result.json index f011ddce82d..945e351cb15 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/default/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 37.2, "Pi": 11, "Po": 3, - "logic element": 17, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 17 + "logic element": 28, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 28, + "Total Node": 28 }, "default/multiple_defaults_failure/no_arch": { "test_name": "default/multiple_defaults_failure/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/simulation_result.json index 8e993fa292c..c899e20b977 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 2, - "logic element": 9, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 10, + "Longest Path": 9, + "Average Path": 6, + "Estimated LUTs": 10, + "Total Node": 10 }, "else/if_else/no_arch": { "test_name": "else/if_else/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/synthesis_result.json index e0690c27be7..881b66b958c 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/else/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 30.3, "Pi": 2, "Po": 2, - "logic element": 7, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 7 + "logic element": 9, + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 9, + "Total Node": 9 }, "else/if_else/no_arch": { "test_name": "else/if_else/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/simulation_result.json index f16b8961941..40596480b32 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/simulation_result.json @@ -51,11 +51,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 5, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 2, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 2 }, "function_endfunction/outside_port/no_arch": { "test_name": "function_endfunction/outside_port/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/synthesis_result.json index b0c6a31cad1..1ec8a6d23b1 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/function_endfunction/synthesis_result.json @@ -60,11 +60,11 @@ "synthesis_time(ms)": 40.7, "Pi": 3, "Po": 1, - "logic element": 4, - "Longest Path": 5, + "logic element": 2, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Estimated LUTs": 2, + "Total Node": 2 }, "function_endfunction/outside_port/no_arch": { "test_name": "function_endfunction/outside_port/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/simulation_result.json index 7fdc67c9d44..d86e3b34159 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/simulation_result.json @@ -5,14 +5,14 @@ "max_rss(MiB)": 45.2, "exec_time(ms)": 7.1, "simulation_time(ms)": 0.3, - "test_coverage(%)": 88.9, - "Pi": 2, + "test_coverage(%)": 76.9, + "Pi": 3, "Po": 2, - "logic element": 2, - "Longest Path": 2, - "Average Path": 2, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 6, + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "inout/inout_failure/no_arch": { "test_name": "inout/inout_failure/no_arch", @@ -21,11 +21,11 @@ "exec_time(ms)": 8.5, "Pi": 3, "Po": 3, - "logic element": 5, + "logic element": 2, "Longest Path": 3, "Average Path": 2, - "Estimated LUTs": 5, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 2 }, "inout/simple_inout/no_arch": { "test_name": "inout/simple_inout/no_arch", @@ -36,11 +36,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 3, - "logic element": 5, + "logic element": 2, "Longest Path": 3, "Average Path": 2, - "Estimated LUTs": 5, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/synthesis_result.json index 9e67f2f3114..6b2f4171720 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/inout/synthesis_result.json @@ -8,10 +8,13 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0.1, "synthesis_time(ms)": 25.6, - "Pi": 2, + "Pi": 3, "Po": 2, - "Longest Path": 2, - "Average Path": 2 + "logic element": 2, + "Longest Path": 4, + "Average Path": 2, + "Estimated LUTs": 2, + "Total Node": 2 }, "inout/inout_failure/no_arch": { "test_name": "inout/inout_failure/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nand/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nand/simulation_result.json index e1f8be4b022..e76fb4ba7b4 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nand/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nand/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 6, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 4, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "nand/nand_wire/no_arch": { "test_name": "nand/nand_wire/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 2, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 2 }, "nand/range_nand_int_wide/no_arch": { "test_name": "nand/range_nand_int_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 98, "Pi": 64, "Po": 32, - "logic element": 96, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 96, - "Total Node": 96 + "logic element": 64, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 64, + "Total Node": 64 }, "nand/range_nand_ultra_wide/no_arch": { "test_name": "nand/range_nand_ultra_wide/no_arch", @@ -64,11 +64,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 9, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 6, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/simulation_result.json index 6ee51e35f30..c3d28127998 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/simulation_result.json @@ -7,14 +7,12 @@ "simulation_time(ms)": 0.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 2, "latch": 1, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 2, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/synthesis_result.json index fbfb36839df..431b699ea99 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/negedge/synthesis_result.json @@ -9,14 +9,12 @@ "techmap_time(ms)": 0, "synthesis_time(ms)": 24.1, "Latch Drivers": 1, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nor/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nor/simulation_result.json index 7819c30611a..b0df4661dfb 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nor/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/nor/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 6, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 4, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "nor/nor_wire/no_arch": { "test_name": "nor/nor_wire/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 2, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 2 }, "nor/range_nor_int_wide/no_arch": { "test_name": "nor/range_nor_int_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 96, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 96, - "Total Node": 96 + "logic element": 64, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 64, + "Total Node": 64 }, "nor/range_nor_ultra_wide/no_arch": { "test_name": "nor/range_nor_ultra_wide/no_arch", @@ -53,11 +53,11 @@ "test_coverage(%)": 99.5, "Pi": 512, "Po": 256, - "logic element": 768, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 768, - "Total Node": 768 + "logic element": 512, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 512, + "Total Node": 512 }, "nor/range_nor_wide/no_arch": { "test_name": "nor/range_nor_wide/no_arch", @@ -68,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 9, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 6, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/not/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/not/simulation_result.json index ee7e4310119..819f3f9086f 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/not/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/not/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "not/not_wire/no_arch": { "test_name": "not/not_wire/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 1, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "not/range_not_int_wide/no_arch": { "test_name": "not/range_not_int_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 100, "Pi": 32, "Po": 32, - "logic element": 64, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "not/range_not_ultra_wide/no_arch": { "test_name": "not/range_not_ultra_wide/no_arch", @@ -53,11 +53,11 @@ "test_coverage(%)": 100, "Pi": 256, "Po": 256, - "logic element": 512, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 512, - "Total Node": 512 + "logic element": 256, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 256, + "Total Node": 256 }, "not/range_not_wide/no_arch": { "test_name": "not/range_not_wide/no_arch", @@ -68,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 3, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/or/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/or/simulation_result.json index 0c81f5922cf..cc3d1b7e122 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/or/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/or/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "or/or_wire/no_arch": { "test_name": "or/or_wire/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "or/range_or_int_wide/no_arch": { "test_name": "or/range_or_int_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 64, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "or/range_or_ultra_wide/no_arch": { "test_name": "or/range_or_ultra_wide/no_arch", @@ -53,11 +53,11 @@ "test_coverage(%)": 99.5, "Pi": 512, "Po": 256, - "logic element": 512, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 512, - "Total Node": 512 + "logic element": 256, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 256, + "Total Node": 256 }, "or/range_or_wide/no_arch": { "test_name": "or/range_or_wide/no_arch", @@ -68,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/posedge/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/posedge/simulation_result.json index a2c412fcacf..bbd3d9d7e93 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/posedge/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/posedge/simulation_result.json @@ -9,12 +9,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/simulation_result.json index 2e9f448a5a3..31e26aaf3af 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "specify_endspecify/specify_edge_sensitive/no_arch": { "test_name": "specify_endspecify/specify_edge_sensitive/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/synthesis_result.json index eaf30b7d640..348a5d5be28 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specify_endspecify/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 23, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "specify_endspecify/specify_edge_sensitive/no_arch": { "test_name": "specify_endspecify/specify_edge_sensitive/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specparam/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specparam/simulation_result.json index 65e04db2038..38375791f70 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specparam/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/specparam/simulation_result.json @@ -5,14 +5,14 @@ "max_rss(MiB)": 44.9, "exec_time(ms)": 6.6, "simulation_time(ms)": 0.3, - "test_coverage(%)": 66.7, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "specparam/specparam_inside/no_arch": { "test_name": "specparam/specparam_inside/no_arch", @@ -20,14 +20,14 @@ "max_rss(MiB)": 44.9, "exec_time(ms)": 6.8, "simulation_time(ms)": 0.3, - "test_coverage(%)": 66.7, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "specparam/specparam_outside/no_arch": { "test_name": "specparam/specparam_outside/no_arch", @@ -35,14 +35,14 @@ "max_rss(MiB)": 45, "exec_time(ms)": 6.6, "simulation_time(ms)": 0.3, - "test_coverage(%)": 66.7, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/wire/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/wire/simulation_result.json index 6fd9f02f451..ae47ca2da95 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/wire/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/wire/simulation_result.json @@ -21,11 +21,11 @@ "exec_time(ms)": 6, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "wire/wire/no_arch": { "test_name": "wire/wire/no_arch", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/simulation_result.json index 7b4a1867ff5..8d7e1153836 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 160, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 160, - "Total Node": 160 + "logic element": 64, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 64, + "Total Node": 64 }, "xnor/range_xnor_ultra_wide/no_arch": { "test_name": "xnor/range_xnor_ultra_wide/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 100, "Pi": 512, "Po": 256, - "logic element": 1280, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 1280, - "Total Node": 1280 + "logic element": 512, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 512, + "Total Node": 512 }, "xnor/range_xnor_wide/no_arch": { "test_name": "xnor/range_xnor_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 15, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 15, - "Total Node": 15 + "logic element": 6, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "xnor/xnor_indexed_port/no_arch": { "test_name": "xnor/xnor_indexed_port/no_arch", @@ -53,11 +53,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 10, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 10, - "Total Node": 10 + "logic element": 4, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "xnor/xnor_wire/no_arch": { "test_name": "xnor/xnor_wire/no_arch", @@ -68,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 5, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 2, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/synthesis_result.json index 11e0a7f0a9b..d5e91dc5dd9 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xnor/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 66.2, "Pi": 64, "Po": 32, - "logic element": 128, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 128, - "Total Node": 128 + "logic element": 64, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 64, + "Total Node": 64 }, "xnor/range_xnor_ultra_wide/no_arch": { "test_name": "xnor/range_xnor_ultra_wide/no_arch", @@ -27,11 +27,11 @@ "synthesis_time(ms)": 262.6, "Pi": 512, "Po": 256, - "logic element": 1024, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "logic element": 512, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 512, + "Total Node": 512 }, "xnor/range_xnor_wide/no_arch": { "test_name": "xnor/range_xnor_wide/no_arch", @@ -44,11 +44,11 @@ "synthesis_time(ms)": 40, "Pi": 6, "Po": 3, - "logic element": 12, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "xnor/replicate_xnor_int_wide/no_arch": { "test_name": "xnor/replicate_xnor_int_wide/no_arch", @@ -85,11 +85,11 @@ "synthesis_time(ms)": 25.5, "Pi": 4, "Po": 2, - "logic element": 8, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 8, - "Total Node": 8 + "logic element": 4, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "xnor/xnor_wire/no_arch": { "test_name": "xnor/xnor_wire/no_arch", @@ -102,11 +102,11 @@ "synthesis_time(ms)": 38.2, "Pi": 2, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 2 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/simulation_result.json index b6e35d2a8cd..510454d1e07 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/simulation_result.json @@ -8,11 +8,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 128, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 128, - "Total Node": 128 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "xor/range_xor_ultra_wide/no_arch": { "test_name": "xor/range_xor_ultra_wide/no_arch", @@ -23,11 +23,11 @@ "test_coverage(%)": 99.9, "Pi": 512, "Po": 256, - "logic element": 1024, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "logic element": 256, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 256, + "Total Node": 256 }, "xor/range_xor_wide/no_arch": { "test_name": "xor/range_xor_wide/no_arch", @@ -38,11 +38,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 3, - "logic element": 12, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "xor/xor_indexed_port/no_arch": { "test_name": "xor/xor_indexed_port/no_arch", @@ -53,11 +53,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 8, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 8, - "Total Node": 8 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "xor/xor_wire/no_arch": { "test_name": "xor/xor_wire/no_arch", @@ -68,11 +68,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/synthesis_result.json index 7f87ce66684..960cd9f107c 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/keywords/xor/synthesis_result.json @@ -10,11 +10,11 @@ "synthesis_time(ms)": 39, "Pi": 64, "Po": 32, - "logic element": 96, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 96, - "Total Node": 96 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "xor/range_xor_ultra_wide/no_arch": { "test_name": "xor/range_xor_ultra_wide/no_arch", @@ -27,11 +27,11 @@ "synthesis_time(ms)": 174.6, "Pi": 512, "Po": 256, - "logic element": 768, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 768, - "Total Node": 768 + "logic element": 256, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 256, + "Total Node": 256 }, "xor/range_xor_wide/no_arch": { "test_name": "xor/range_xor_wide/no_arch", @@ -44,11 +44,11 @@ "synthesis_time(ms)": 38.2, "Pi": 6, "Po": 3, - "logic element": 9, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "xor/replicate_xor_int_wide/no_arch": { "test_name": "xor/replicate_xor_int_wide/no_arch", @@ -85,11 +85,11 @@ "synthesis_time(ms)": 37, "Pi": 4, "Po": 2, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "xor/xor_wire/no_arch": { "test_name": "xor/xor_wire/no_arch", @@ -102,11 +102,11 @@ "synthesis_time(ms)": 37.8, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/koios/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/koios/synthesis_result.json index 3b09f95c3b7..b83d76472d3 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/koios/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/koios/synthesis_result.json @@ -3,9 +3,6 @@ "test_name": "koios/attention_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", "verilog": "attention_layer.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]" - ], "max_rss(MiB)": 170, "exec_time(ms)": 11131, "elaboration_time(ms)": 10894.4, @@ -13,18 +10,17 @@ "techmap_time(ms)": 115.8, "synthesis_time(ms)": 11041.3, "Latch Drivers": 1, - "Pi": 8, + "Pi": 2, "Po": 16, - "logic element": 12282, - "latch": 711, - "Adder": 521, - "Multiplier": 5, - "Memory": 6, + "logic element": 1, + "latch": 1, + "Adder": 2, + "Memory": 1, "generic logic size": 4, - "Longest Path": 561, + "Longest Path": 7, "Average Path": 2, - "Estimated LUTs": 14115, - "Total Node": 13526 + "Estimated LUTs": 1, + "Total Node": 6 }, "koios/bnn/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/bnn/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -39,4654 +35,20 @@ "Latch Drivers": 1, "Pi": 259, "Po": 122, - "logic element": 90787, - "latch": 52344, - "Adder": 56909, + "logic element": 89054, + "latch": 52282, + "Adder": 56904, "Multiplier": 125, "generic logic size": 4, - "Longest Path": 464, + "Longest Path": 432, "Average Path": 4, - "Estimated LUTs": 91299, - "Total Node": 200166 + "Estimated LUTs": 89054, + "Total Node": 198366 }, "koios/conv_layer_hls/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/conv_layer_hls/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", "verilog": "conv_layer_hls.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]" - ], "max_rss(MiB)": 2372.7, "exec_time(ms)": 4802463.9, "elaboration_time(ms)": 12798.1, @@ -4696,21 +58,25 @@ "Latch Drivers": 1, "Pi": 790, "Po": 2283, - "logic element": 1611648, - "latch": 2703, - "Adder": 1248, + "logic element": 15948, + "latch": 2706, + "Adder": 1413, "Multiplier": 3, "Memory": 21, "generic logic size": 4, - "Longest Path": 732, + "Longest Path": 806, "Average Path": 4, - "Estimated LUTs": 1611951, - "Total Node": 1615624 + "Estimated LUTs": 15948, + "Total Node": 20092 }, "koios/conv_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/conv_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", "verilog": "conv_layer.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin conv^u_matmul_4x4_systolic_0.u_systolic_data_setup.a_mem_access_$sdffe_Q_SRST_$logic_or_Y_B_$_OR__Y_B_$_AND__Y_A_$_AND__Y_A~3: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin conv^u_matmul_4x4_systolic_3.u_systolic_data_setup.a_mem_access_$sdffe_Q_SRST_$logic_or_Y_B_$_OR__Y_B_$_AND__Y_A_$_AND__Y_A~3: not available." + ], "max_rss(MiB)": 172.7, "exec_time(ms)": 10629.1, "elaboration_time(ms)": 10485.2, @@ -4720,16 +86,16 @@ "Latch Drivers": 1, "Pi": 18, "Po": 65, - "logic element": 3195, - "latch": 991, - "Adder": 719, - "Multiplier": 7, + "logic element": 5472, + "latch": 2121, + "Adder": 1181, + "Multiplier": 21, "Memory": 14, "generic logic size": 4, - "Longest Path": 124, + "Longest Path": 165, "Average Path": 2, - "Estimated LUTs": 3548, - "Total Node": 4927 + "Estimated LUTs": 5472, + "Total Node": 8810 }, "koios/dla_like.small/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/dla_like.small/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4744,16 +110,16 @@ "Latch Drivers": 1, "Pi": 13, "Po": 13, - "logic element": 54123, - "latch": 74519, - "Adder": 28827, - "Multiplier": 224, + "logic element": 59878, + "latch": 70231, + "Adder": 23835, + "Multiplier": 210, "Memory": 96, "generic logic size": 4, - "Longest Path": 234, + "Longest Path": 224, "Average Path": 4, - "Estimated LUTs": 54333, - "Total Node": 157790 + "Estimated LUTs": 59878, + "Total Node": 154251 }, "koios/eltwise_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/eltwise_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4768,16 +134,16 @@ "Latch Drivers": 1, "Pi": 79, "Po": 97, - "logic element": 4128, - "latch": 1199, - "Adder": 747, + "logic element": 4059, + "latch": 1108, + "Adder": 801, "Multiplier": 6, "Memory": 18, "generic logic size": 4, - "Longest Path": 125, + "Longest Path": 120, "Average Path": 3, - "Estimated LUTs": 4454, - "Total Node": 6099 + "Estimated LUTs": 4059, + "Total Node": 5993 }, "koios/gemm_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/gemm_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4792,15 +158,15 @@ "Latch Drivers": 1, "Pi": 690, "Po": 1109, - "logic element": 636414, - "latch": 149241, - "Adder": 76514, + "logic element": 733837, + "latch": 124642, + "Adder": 78914, "Multiplier": 400, "generic logic size": 4, - "Longest Path": 752, + "Longest Path": 829, "Average Path": 3, - "Estimated LUTs": 658138, - "Total Node": 862570 + "Estimated LUTs": 733837, + "Total Node": 937794 }, "koios/reduction_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/reduction_layer/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4815,15 +181,15 @@ "Latch Drivers": 1, "Pi": 17, "Po": 17, - "logic element": 342, - "latch": 42, + "logic element": 362, + "latch": 48, "Adder": 53, "Memory": 1, "generic logic size": 4, - "Longest Path": 158, + "Longest Path": 164, "Average Path": 5, - "Estimated LUTs": 358, - "Total Node": 439 + "Estimated LUTs": 362, + "Total Node": 465 }, "koios/robot_rl/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/robot_rl/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4838,16 +204,16 @@ "Latch Drivers": 1, "Pi": 2, "Po": 384, - "logic element": 9718, - "latch": 2596, + "logic element": 11908, + "latch": 2513, "Adder": 1788, "Multiplier": 24, "Memory": 48, "generic logic size": 4, - "Longest Path": 139, + "Longest Path": 161, "Average Path": 4, - "Estimated LUTs": 9938, - "Total Node": 14175 + "Estimated LUTs": 11908, + "Total Node": 16282 }, "koios/softmax/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/softmax/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -4860,829 +226,22 @@ "techmap_time(ms)": 42.8, "synthesis_time(ms)": 9418.9, "Latch Drivers": 1, - "Pi": 17, + "Pi": 401, "Po": 150, - "logic element": 234, - "latch": 37, - "Adder": 24, + "logic element": 47273, + "latch": 9401, + "Adder": 4663, + "Multiplier": 16, "generic logic size": 4, - "Longest Path": 97, - "Average Path": 2, - "Estimated LUTs": 246, - "Total Node": 296 + "Longest Path": 1144, + "Average Path": 4, + "Estimated LUTs": 47273, + "Total Node": 61354 }, "koios/spmv/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/spmv/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", "verilog": "spmv.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 249 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 250 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 251 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 252 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 253 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 254 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 255 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 256 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 257 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 258 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 259 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 260 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 261 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 262 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 263 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 264 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 265 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 266 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 267 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 268 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 269 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 270 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 271 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 272 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 273 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 274 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 275 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 276 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 277 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 278 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 279 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 280 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 281 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 282 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 283 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 284 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 285 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 286 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 287 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 288 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 289 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 290 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 291 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 292 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 293 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 294 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 295 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 296 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 297 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 298 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 299 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 300 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 301 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 302 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 303 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 304 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 305 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 306 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 307 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 308 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 309 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 310 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 311 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 312 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 313 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 314 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 315 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 316 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 317 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 318 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 319 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 320 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 321 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 322 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 323 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 324 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 325 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 326 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 327 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 328 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 329 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 330 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 331 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 332 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 333 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 334 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 335 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 336 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 337 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 338 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 339 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 340 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 341 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 342 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 343 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 344 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 345 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 346 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 347 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 348 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 349 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 350 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 351 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 352 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 353 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 354 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 355 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 356 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 357 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 358 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 359 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 360 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 361 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 362 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 363 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 364 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 365 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 366 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 367 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 368 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 369 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 370 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 371 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 372 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 373 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 374 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 375 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 376 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 377 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 378 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 379 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 380 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 381 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 382 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 383 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 384 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 385 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 386 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 387 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 388 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 389 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 390 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 391 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 392 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 393 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 394 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 395 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 396 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 397 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 398 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 399 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 400 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 401 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 402 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 403 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 404 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 405 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 406 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 407 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 408 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 409 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 410 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 411 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 412 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 413 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 414 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 415 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 416 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 417 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 418 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 419 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 420 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 421 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 422 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 423 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 424 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 425 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 426 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 427 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 428 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 429 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 430 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 431 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 432 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 433 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 434 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 435 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 436 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 437 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 438 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 439 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 440 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 441 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 442 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 443 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 444 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 445 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 446 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 447 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 448 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 449 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 450 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 451 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 452 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 453 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 454 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 455 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 456 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 457 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 458 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 459 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 460 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 461 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 462 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 463 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 464 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 465 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 466 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 467 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 468 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 469 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 470 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 471 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 472 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 473 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 474 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 475 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 476 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 477 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 478 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 479 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 480 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 481 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 482 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 483 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 484 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 485 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 486 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 487 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 488 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 489 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 490 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 491 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 492 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 493 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 494 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 495 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 496 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 65 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 66 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 67 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 68 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 69 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 70 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 71 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 72 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 73 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 74 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 75 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 76 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 77 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 78 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 79 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 80 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 81 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 82 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 83 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 84 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 85 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 86 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 87 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 88 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 89 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 90 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 91 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 92 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 93 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 94 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 95 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 96 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 97 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 98 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 99 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 100 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 101 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 102 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 103 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 104 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 105 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 106 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 107 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 108 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 109 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 110 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 111 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 112 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 113 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 114 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 115 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 116 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 117 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 118 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 119 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 120 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 121 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 122 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 123 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 124 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 125 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 126 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 127 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 128 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 129 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 130 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 131 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 132 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 133 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 134 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 135 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 136 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 137 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 138 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 139 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 140 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 141 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 142 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 143 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 144 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 145 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 146 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 147 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 148 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 149 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 150 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 151 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 152 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 153 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 154 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 155 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 156 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 157 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 158 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 159 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 160 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 161 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 162 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 163 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 164 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 165 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 166 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 167 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 168 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 169 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 170 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 171 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 172 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 173 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 174 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 175 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 176 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 177 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 178 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 179 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 180 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 181 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 182 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 183 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 184 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 185 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 186 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 187 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 188 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 189 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 190 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 191 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 192 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 193 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 194 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 195 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 196 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 197 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 198 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 199 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 200 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 201 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 202 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 203 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 204 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 205 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 206 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 207 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 208 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 209 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 210 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 211 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 212 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 213 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 214 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 215 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 216 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 217 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 218 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 219 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 220 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 221 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 222 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 223 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 224 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 225 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 226 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 227 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 228 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 229 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 230 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 231 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 232 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 233 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 234 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 235 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 236 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 237 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 238 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 239 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 240 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 241 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 242 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 243 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 244 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 245 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 246 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 247 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 248 [63]" - ], "max_rss(MiB)": 622.3, "exec_time(ms)": 8816.9, "elaboration_time(ms)": 7419.6, @@ -5692,21 +251,24 @@ "Latch Drivers": 1, "Pi": 1, "Po": 17, - "logic element": 327043, + "logic element": 8707, "latch": 1955, "Adder": 1780, "Multiplier": 32, "Memory": 229, "generic logic size": 4, - "Longest Path": 1026, + "Longest Path": 251, "Average Path": 2, - "Estimated LUTs": 327095, - "Total Node": 331040 + "Estimated LUTs": 8707, + "Total Node": 12704 }, "koios/tpu_like.small/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios/tpu_like.small/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", "verilog": "tpu_like.small.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin top^u_activation.address_$mux_Y_A_$mux_Y_A_$mux_Y_A_$mux_Y_S_$logic_and_Y_A_$_OR__Y_B_$_OR__B_Y_$_AND__Y_A_$_AND__A_Y~3: not available." + ], "max_rss(MiB)": 173.4, "exec_time(ms)": 29434.1, "elaboration_time(ms)": 29279.9, @@ -5716,16 +278,16 @@ "Latch Drivers": 1, "Pi": 82, "Po": 289, - "logic element": 5268, - "latch": 1195, - "Adder": 253, - "Multiplier": 6, + "logic element": 7012, + "latch": 3447, + "Adder": 1324, + "Multiplier": 66, "Memory": 2, "generic logic size": 4, - "Longest Path": 225, + "Longest Path": 237, "Average Path": 2, - "Estimated LUTs": 5523, - "Total Node": 6725 + "Estimated LUTs": 7012, + "Total Node": 11852 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/large/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/large/synthesis_result.json index ddabf52cdb0..28dc33912eb 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/large/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/large/synthesis_result.json @@ -3,6 +3,28 @@ "test_name": "large/arm_core/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "arm_core.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~4: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~5: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~6: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~8: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~9: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~10: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~11: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~12: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~13: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~14: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~4: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~5: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~6: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~8: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~9: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~10: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~11: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~12: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~13: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~14: not available." + ], "max_rss(MiB)": 76.6, "exec_time(ms)": 8189, "elaboration_time(ms)": 8049.1, @@ -12,20 +34,51 @@ "Latch Drivers": 1, "Pi": 132, "Po": 179, - "logic element": 24491, - "latch": 3500, - "Adder": 380, + "logic element": 22351, + "latch": 3510, + "Adder": 451, "Memory": 1192, "generic logic size": 4, - "Longest Path": 5300, + "Longest Path": 3942, "Average Path": 5, - "Estimated LUTs": 25093, - "Total Node": 29564 + "Estimated LUTs": 22351, + "Total Node": 27505 }, "large/bgm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/bgm/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "bgm.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a2_add.u4.fract_in_shftl_1_$pmux_Y_S_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_B~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available." + ], "max_rss(MiB)": 417.7, "exec_time(ms)": 21673.4, "elaboration_time(ms)": 21114.2, @@ -35,15 +88,15 @@ "Latch Drivers": 1, "Pi": 256, "Po": 32, - "logic element": 81481, - "latch": 5140, + "logic element": 94683, + "latch": 5132, "Adder": 2511, "Multiplier": 11, "generic logic size": 4, - "Longest Path": 2149, + "Longest Path": 2005, "Average Path": 5, - "Estimated LUTs": 93220, - "Total Node": 89144 + "Estimated LUTs": 94683, + "Total Node": 102338 }, "large/boundtop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/boundtop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -58,15 +111,15 @@ "Latch Drivers": 1, "Pi": 273, "Po": 193, - "logic element": 4204, - "latch": 871, - "Adder": 151, + "logic element": 5776, + "latch": 1126, + "Adder": 233, "Memory": 32, "generic logic size": 4, - "Longest Path": 416, - "Average Path": 4, - "Estimated LUTs": 4510, - "Total Node": 5259 + "Longest Path": 639, + "Average Path": 5, + "Estimated LUTs": 5776, + "Total Node": 7168 }, "large/des_area/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/des_area/k6_frac_N10_frac_chain_mem32K_40nm", @@ -81,13 +134,13 @@ "Latch Drivers": 1, "Pi": 125, "Po": 64, - "logic element": 5567, + "logic element": 4167, "latch": 64, "generic logic size": 4, - "Longest Path": 424, - "Average Path": 6, - "Estimated LUTs": 6633, - "Total Node": 5632 + "Longest Path": 457, + "Average Path": 7, + "Estimated LUTs": 4167, + "Total Node": 4232 }, "large/des_perf/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/des_perf/k6_frac_N10_frac_chain_mem32K_40nm", @@ -102,13 +155,13 @@ "Latch Drivers": 1, "Pi": 121, "Po": 64, - "logic element": 64960, + "logic element": 30896, "latch": 1984, "generic logic size": 4, - "Longest Path": 196, - "Average Path": 6, - "Estimated LUTs": 81984, - "Total Node": 66945 + "Longest Path": 228, + "Average Path": 7, + "Estimated LUTs": 30896, + "Total Node": 32881 }, "large/iir/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/iir/k6_frac_N10_frac_chain_mem32K_40nm", @@ -123,13 +176,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 10, - "logic element": 25, - "latch": 8, + "logic element": 24, + "latch": 9, "Adder": 8, "generic logic size": 4, - "Longest Path": 18, + "Longest Path": 19, "Average Path": 3, - "Estimated LUTs": 27, + "Estimated LUTs": 24, "Total Node": 42 }, "large/LargeRam/k6_frac_N10_frac_chain_mem32K_40nm": { @@ -144,13 +197,13 @@ "synthesis_time(ms)": 9203921.3, "Pi": 37, "Po": 2, - "logic element": 2883573, + "logic element": 1835001, "Memory": 524288, "generic logic size": 4, - "Longest Path": 58, + "Longest Path": 40, "Average Path": 4, - "Estimated LUTs": 2883573, - "Total Node": 3407861 + "Estimated LUTs": 1835001, + "Total Node": 2359289 }, "large/LU32PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/LU32PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -165,16 +218,16 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 182551, - "latch": 20642, - "Adder": 13784, + "logic element": 240313, + "latch": 19711, + "Adder": 13473, "Multiplier": 32, "Memory": 5251, "generic logic size": 4, - "Longest Path": 4942, - "Average Path": 4, - "Estimated LUTs": 193255, - "Total Node": 222261 + "Longest Path": 5349, + "Average Path": 5, + "Estimated LUTs": 240313, + "Total Node": 278781 }, "large/LU64PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/LU64PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -189,16 +242,16 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 355345, - "latch": 39209, - "Adder": 25875, + "logic element": 470738, + "latch": 37320, + "Adder": 25215, "Multiplier": 64, "Memory": 10372, "generic logic size": 4, - "Longest Path": 4987, - "Average Path": 4, - "Estimated LUTs": 376132, - "Total Node": 430866 + "Longest Path": 5387, + "Average Path": 5, + "Estimated LUTs": 470738, + "Total Node": 543710 }, "large/mac1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/mac1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -213,14 +266,14 @@ "Latch Drivers": 1, "Pi": 139, "Po": 71, - "logic element": 9610, + "logic element": 8817, "latch": 262, "Adder": 146, "generic logic size": 4, - "Longest Path": 744, + "Longest Path": 742, "Average Path": 4, - "Estimated LUTs": 9670, - "Total Node": 10019 + "Estimated LUTs": 8817, + "Total Node": 9226 }, "large/mac2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/mac2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -235,14 +288,14 @@ "Latch Drivers": 1, "Pi": 273, "Po": 141, - "logic element": 34627, + "logic element": 31990, "latch": 524, "Adder": 286, "generic logic size": 4, - "Longest Path": 1478, + "Longest Path": 1477, "Average Path": 4, - "Estimated LUTs": 34751, - "Total Node": 35438 + "Estimated LUTs": 31990, + "Total Node": 32801 }, "large/mkDelayWorker32B/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/mkDelayWorker32B/k6_frac_N10_frac_chain_mem32K_40nm", @@ -257,15 +310,15 @@ "Latch Drivers": 1, "Pi": 510, "Po": 553, - "logic element": 13897, - "latch": 2309, - "Adder": 768, + "logic element": 17510, + "latch": 2357, + "Adder": 786, "Memory": 1336, "generic logic size": 4, - "Longest Path": 319, - "Average Path": 4, - "Estimated LUTs": 14663, - "Total Node": 18311 + "Longest Path": 357, + "Average Path": 5, + "Estimated LUTs": 17510, + "Total Node": 21990 }, "large/mkSMAdapter4B/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/mkSMAdapter4B/k6_frac_N10_frac_chain_mem32K_40nm", @@ -280,20 +333,23 @@ "Latch Drivers": 1, "Pi": 192, "Po": 205, - "logic element": 5749, - "latch": 901, - "Adder": 344, + "logic element": 6591, + "latch": 919, + "Adder": 365, "Memory": 153, "generic logic size": 4, - "Longest Path": 387, - "Average Path": 4, - "Estimated LUTs": 5880, - "Total Node": 7148 + "Longest Path": 327, + "Average Path": 5, + "Estimated LUTs": 6591, + "Total Node": 8029 }, "large/or1200/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/or1200/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "or1200.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin or1200_flat^or1200_sprs.spr_dat_cfgr_$mux_Y_1_S_$_NOT__Y_A_$_OR__Y_B_$_OR__B_1_A~1: not available." + ], "max_rss(MiB)": 31.2, "exec_time(ms)": 2049.5, "elaboration_time(ms)": 2017.3, @@ -303,16 +359,16 @@ "Latch Drivers": 1, "Pi": 384, "Po": 394, - "logic element": 7082, - "latch": 692, + "logic element": 7935, + "latch": 693, "Adder": 496, "Multiplier": 1, "Memory": 64, "generic logic size": 4, - "Longest Path": 1732, - "Average Path": 5, - "Estimated LUTs": 7444, - "Total Node": 8336 + "Longest Path": 1785, + "Average Path": 6, + "Estimated LUTs": 7935, + "Total Node": 9190 }, "large/paj_boundtop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/paj_boundtop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -327,19 +383,22 @@ "Latch Drivers": 1, "Pi": 263, "Po": 193, - "logic element": 4434, - "latch": 837, - "Adder": 125, + "logic element": 5938, + "latch": 957, + "Adder": 191, "generic logic size": 4, - "Longest Path": 424, - "Average Path": 4, - "Estimated LUTs": 4728, - "Total Node": 5397 + "Longest Path": 501, + "Average Path": 5, + "Estimated LUTs": 5938, + "Total Node": 7087 }, "large/paj_framebuftop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/paj_framebuftop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "paj_framebuftop_hierarchy_no_mem.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin paj_framebuftop_hierarchy_no_mem^vidoutinst.tm3_vidout_hsync_$adffe_Q_D_$mux_Y_S_$and_Y_A_$_OR__Y_B_$_AND__Y_A_$_AND__Y_B_$_AND__A_Y_$_OR__B_Y~4: not available." + ], "max_rss(MiB)": 14, "exec_time(ms)": 344.5, "elaboration_time(ms)": 335.1, @@ -349,14 +408,14 @@ "Latch Drivers": 1, "Pi": 67, "Po": 35, - "logic element": 1513, - "latch": 548, + "logic element": 1762, + "latch": 558, "Adder": 118, "generic logic size": 4, - "Longest Path": 83, + "Longest Path": 103, "Average Path": 4, - "Estimated LUTs": 1557, - "Total Node": 2180 + "Estimated LUTs": 1762, + "Total Node": 2439 }, "large/paj_raygentop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/paj_raygentop_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -371,15 +430,15 @@ "Latch Drivers": 1, "Pi": 235, "Po": 305, - "logic element": 2938, - "latch": 1024, - "Adder": 413, + "logic element": 3465, + "latch": 917, + "Adder": 419, "Multiplier": 15, "generic logic size": 4, - "Longest Path": 111, + "Longest Path": 150, "Average Path": 4, - "Estimated LUTs": 2995, - "Total Node": 4391 + "Estimated LUTs": 3465, + "Total Node": 4817 }, "large/paj_top_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/paj_top_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -409,16 +468,16 @@ "Latch Drivers": 1, "Pi": 235, "Po": 305, - "logic element": 2716, - "latch": 1032, - "Adder": 413, + "logic element": 3249, + "latch": 951, + "Adder": 419, "Multiplier": 15, "Memory": 21, "generic logic size": 4, - "Longest Path": 108, + "Longest Path": 205, "Average Path": 4, - "Estimated LUTs": 2775, - "Total Node": 4198 + "Estimated LUTs": 3249, + "Total Node": 4656 }, "large/spree/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/spree/k6_frac_N10_frac_chain_mem32K_40nm", @@ -433,21 +492,24 @@ "Latch Drivers": 1, "Pi": 44, "Po": 32, - "logic element": 2656, - "latch": 224, + "logic element": 2535, + "latch": 231, "Adder": 62, "Multiplier": 1, "Memory": 128, "generic logic size": 4, - "Longest Path": 744, - "Average Path": 3, - "Estimated LUTs": 2920, - "Total Node": 3072 + "Longest Path": 765, + "Average Path": 4, + "Estimated LUTs": 2535, + "Total Node": 2958 }, "large/sv_chip0_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/sv_chip0_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "sv_chip0_hierarchy_no_mem.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin sv_chip0_hierarchy_no_mem^tm3_vidout_hsync_$dffe_Q_D_$mux_Y_S_$and_Y_B_$_OR__Y_A_$_NOT__Y_A_$_OR__Y_A_$_OR__A_1_Y~4: not available." + ], "max_rss(MiB)": 62.8, "exec_time(ms)": 3114.5, "elaboration_time(ms)": 3039.9, @@ -457,14 +519,14 @@ "Latch Drivers": 1, "Pi": 168, "Po": 198, - "logic element": 8356, - "latch": 11239, - "Adder": 2729, + "logic element": 10122, + "latch": 11155, + "Adder": 2731, "generic logic size": 4, - "Longest Path": 168, + "Longest Path": 180, "Average Path": 4, - "Estimated LUTs": 8500, - "Total Node": 22325 + "Estimated LUTs": 10122, + "Total Node": 24009 }, "large/sv_chip1_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/sv_chip1_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -479,15 +541,15 @@ "Latch Drivers": 1, "Pi": 67, "Po": 145, - "logic element": 10328, - "latch": 11448, + "logic element": 11178, + "latch": 11443, "Adder": 2332, "Multiplier": 152, "generic logic size": 4, - "Longest Path": 197, - "Average Path": 4, - "Estimated LUTs": 10331, - "Total Node": 24261 + "Longest Path": 183, + "Average Path": 5, + "Estimated LUTs": 11178, + "Total Node": 25106 }, "large/sv_chip2_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/sv_chip2_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -502,15 +564,15 @@ "Latch Drivers": 1, "Pi": 148, "Po": 182, - "logic element": 10324, - "latch": 15833, - "Adder": 12447, + "logic element": 10753, + "latch": 15657, + "Adder": 12154, "Multiplier": 468, "generic logic size": 4, - "Longest Path": 138, + "Longest Path": 139, "Average Path": 4, - "Estimated LUTs": 10338, - "Total Node": 39073 + "Estimated LUTs": 10753, + "Total Node": 39033 }, "large/sv_chip3_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "large/sv_chip3_hierarchy_no_mem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -525,14 +587,14 @@ "Latch Drivers": 2, "Pi": 9, "Po": 30, - "logic element": 1140, - "latch": 99, + "logic element": 592, + "latch": 120, "Adder": 28, "generic logic size": 4, - "Longest Path": 77, + "Longest Path": 128, "Average Path": 4, - "Estimated LUTs": 1453, - "Total Node": 1269 + "Estimated LUTs": 592, + "Total Node": 742 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/simulation_result.json index efbb4bd5bc3..eda246071b6 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/simulation_result.json @@ -143,12 +143,12 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 64, + "logic element": 32, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "micro/bm_and_log/k6_N10_40nm": { "test_name": "micro/bm_and_log/k6_N10_40nm", @@ -160,12 +160,12 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 64, + "logic element": 32, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "micro/bm_and_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_and_log/k6_N10_mem32K_40nm", @@ -177,12 +177,12 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 64, + "logic element": 32, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "micro/bm_and_log/no_arch": { "test_name": "micro/bm_and_log/no_arch", @@ -193,11 +193,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 32, - "logic element": 64, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "micro/bm_arithmetic_unused_bits/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_arithmetic_unused_bits/k6_frac_N10_frac_chain_mem32K_40nm", @@ -210,15 +210,15 @@ "Latch Drivers": 1, "Pi": 608, "Po": 144, - "logic element": 232, + "logic element": 88, "latch": 144, "Adder": 184, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 37, - "Average Path": 5, - "Estimated LUTs": 232, - "Total Node": 565 + "Longest Path": 36, + "Average Path": 4, + "Estimated LUTs": 88, + "Total Node": 421 }, "micro/bm_arithmetic_unused_bits/k6_N10_40nm": { "test_name": "micro/bm_arithmetic_unused_bits/k6_N10_40nm", @@ -231,13 +231,13 @@ "Latch Drivers": 1, "Pi": 528, "Po": 144, - "logic element": 3880, + "logic element": 3736, "latch": 144, "generic logic size": 6, - "Longest Path": 66, - "Average Path": 5, - "Estimated LUTs": 3880, - "Total Node": 4025 + "Longest Path": 65, + "Average Path": 4, + "Estimated LUTs": 3736, + "Total Node": 3881 }, "micro/bm_arithmetic_unused_bits/k6_N10_mem32K_40nm": { "test_name": "micro/bm_arithmetic_unused_bits/k6_N10_mem32K_40nm", @@ -250,14 +250,14 @@ "Latch Drivers": 1, "Pi": 608, "Po": 144, - "logic element": 496, + "logic element": 352, "latch": 144, "Multiplier": 4, "generic logic size": 6, - "Longest Path": 37, - "Average Path": 5, - "Estimated LUTs": 496, - "Total Node": 645 + "Longest Path": 36, + "Average Path": 4, + "Estimated LUTs": 352, + "Total Node": 501 }, "micro/bm_arithmetic_unused_bits/no_arch": { "test_name": "micro/bm_arithmetic_unused_bits/no_arch", @@ -269,12 +269,12 @@ "Latch Drivers": 1, "Pi": 528, "Po": 144, - "logic element": 3880, + "logic element": 3736, "latch": 144, - "Longest Path": 66, - "Average Path": 5, - "Estimated LUTs": 3880, - "Total Node": 4025 + "Longest Path": 65, + "Average Path": 4, + "Estimated LUTs": 3736, + "Total Node": 3881 }, "micro/bm_base_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_base_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -287,14 +287,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "micro/bm_base_multiply/k6_N10_40nm": { "test_name": "micro/bm_base_multiply/k6_N10_40nm", @@ -307,13 +307,13 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, "generic logic size": 6, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "micro/bm_base_multiply/k6_N10_mem32K_40nm": { "test_name": "micro/bm_base_multiply/k6_N10_mem32K_40nm", @@ -326,14 +326,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "micro/bm_base_multiply/no_arch": { "test_name": "micro/bm_base_multiply/no_arch", @@ -345,12 +345,12 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "micro/bm_dag1_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag1_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -362,12 +362,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log/k6_N10_40nm": { "test_name": "micro/bm_dag1_log/k6_N10_40nm", @@ -379,12 +379,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_log/k6_N10_mem32K_40nm", @@ -396,12 +396,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -414,13 +414,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 8, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 33 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_N10_40nm", @@ -433,13 +433,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 8, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 33 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_N10_mem32K_40nm", @@ -452,13 +452,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 8, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 33 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/no_arch": { "test_name": "micro/bm_dag1_log_mod/no_arch", @@ -470,12 +470,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 8, - "Longest Path": 9, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 33 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log/no_arch": { "test_name": "micro/bm_dag1_log/no_arch", @@ -486,11 +486,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, - "Longest Path": 6, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag1_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -570,13 +570,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/k6_N10_40nm": { "test_name": "micro/bm_dag1_mod/k6_N10_40nm", @@ -589,13 +589,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_mod/k6_N10_mem32K_40nm", @@ -608,13 +608,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/no_arch": { "test_name": "micro/bm_dag1_mod/no_arch", @@ -626,12 +626,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag2_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -643,12 +643,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log/k6_N10_40nm": { "test_name": "micro/bm_dag2_log/k6_N10_40nm", @@ -660,12 +660,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_log/k6_N10_mem32K_40nm", @@ -677,12 +677,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -695,13 +695,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_N10_40nm", @@ -714,13 +714,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_N10_mem32K_40nm", @@ -733,13 +733,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/no_arch": { "test_name": "micro/bm_dag2_log_mod/no_arch", @@ -751,12 +751,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log/no_arch": { "test_name": "micro/bm_dag2_log/no_arch", @@ -767,11 +767,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 12, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -851,13 +851,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/k6_N10_40nm": { "test_name": "micro/bm_dag2_mod/k6_N10_40nm", @@ -870,13 +870,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_mod/k6_N10_mem32K_40nm", @@ -889,13 +889,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/no_arch": { "test_name": "micro/bm_dag2_mod/no_arch", @@ -907,12 +907,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 14, + "logic element": 7, "latch": 7, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 22 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag3_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -924,12 +924,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 20, + "logic element": 14, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 20, - "Total Node": 20 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log/k6_N10_40nm": { "test_name": "micro/bm_dag3_log/k6_N10_40nm", @@ -941,12 +941,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 20, + "logic element": 14, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 20, - "Total Node": 20 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_log/k6_N10_mem32K_40nm", @@ -958,12 +958,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 20, + "logic element": 14, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 20, - "Total Node": 20 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -976,13 +976,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 41, + "logic element": 22, "latch": 12, "generic logic size": 4, - "Longest Path": 19, - "Average Path": 6, - "Estimated LUTs": 41, - "Total Node": 54 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_N10_40nm", @@ -995,13 +995,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 41, + "logic element": 22, "latch": 12, "generic logic size": 6, - "Longest Path": 19, - "Average Path": 6, - "Estimated LUTs": 41, - "Total Node": 54 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_N10_mem32K_40nm", @@ -1014,13 +1014,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 41, + "logic element": 22, "latch": 12, "generic logic size": 6, - "Longest Path": 19, - "Average Path": 6, - "Estimated LUTs": 41, - "Total Node": 54 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/no_arch": { "test_name": "micro/bm_dag3_log_mod/no_arch", @@ -1032,12 +1032,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 41, + "logic element": 22, "latch": 12, - "Longest Path": 19, - "Average Path": 6, - "Estimated LUTs": 41, - "Total Node": 54 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log/no_arch": { "test_name": "micro/bm_dag3_log/no_arch", @@ -1048,11 +1048,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 20, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 20, - "Total Node": 20 + "logic element": 14, + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1116,13 +1116,13 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 18, + "logic element": 12, "Adder": 6, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 18, - "Total Node": 24 + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 12, + "Total Node": 18 }, "micro/bm_dag3_lpm_log/k6_N10_40nm": { "test_name": "micro/bm_dag3_lpm_log/k6_N10_40nm", @@ -1134,12 +1134,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 24, + "logic element": 18, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 24, - "Total Node": 24 + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log/k6_N10_mem32K_40nm", @@ -1151,12 +1151,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 24, + "logic element": 18, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 24, - "Total Node": 24 + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1169,14 +1169,14 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 40, + "logic element": 22, "latch": 12, "Adder": 6, "generic logic size": 4, - "Longest Path": 20, - "Average Path": 6, - "Estimated LUTs": 40, - "Total Node": 59 + "Longest Path": 15, + "Average Path": 5, + "Estimated LUTs": 22, + "Total Node": 41 }, "micro/bm_dag3_lpm_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_N10_40nm", @@ -1189,13 +1189,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 43, + "logic element": 25, "latch": 12, "generic logic size": 6, - "Longest Path": 20, - "Average Path": 6, - "Estimated LUTs": 43, - "Total Node": 56 + "Longest Path": 15, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 38 }, "micro/bm_dag3_lpm_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_N10_mem32K_40nm", @@ -1208,13 +1208,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 43, + "logic element": 25, "latch": 12, "generic logic size": 6, - "Longest Path": 20, - "Average Path": 6, - "Estimated LUTs": 43, - "Total Node": 56 + "Longest Path": 15, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 38 }, "micro/bm_dag3_lpm_log_mod/no_arch": { "test_name": "micro/bm_dag3_lpm_log_mod/no_arch", @@ -1226,12 +1226,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 43, + "logic element": 25, "latch": 12, - "Longest Path": 20, - "Average Path": 6, - "Estimated LUTs": 43, - "Total Node": 56 + "Longest Path": 15, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 38 }, "micro/bm_dag3_lpm_log/no_arch": { "test_name": "micro/bm_dag3_lpm_log/no_arch", @@ -1242,11 +1242,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 24, - "Longest Path": 9, - "Average Path": 7, - "Estimated LUTs": 24, - "Total Node": 24 + "logic element": 18, + "Longest Path": 8, + "Average Path": 6, + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1347,15 +1347,15 @@ "simulation_time(ms)": 99.7, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 29, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 4, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 44 + "Longest Path": 17, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_mod/k6_N10_40nm", @@ -1366,15 +1366,15 @@ "simulation_time(ms)": 95.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 29, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 6, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 44 + "Longest Path": 17, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_mod/k6_N10_mem32K_40nm", @@ -1385,15 +1385,15 @@ "simulation_time(ms)": 83.7, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 29, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 6, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 44 + "Longest Path": 17, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/no_arch": { "test_name": "micro/bm_dag3_mod/no_arch", @@ -1403,14 +1403,14 @@ "simulation_time(ms)": 101.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 29, - "latch": 14, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 44 + "logic element": 18, + "latch": 18, + "Longest Path": 17, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag4_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag4_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1423,13 +1423,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/k6_N10_40nm": { "test_name": "micro/bm_dag4_mod/k6_N10_40nm", @@ -1442,13 +1442,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag4_mod/k6_N10_mem32K_40nm", @@ -1461,13 +1461,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/no_arch": { "test_name": "micro/bm_dag4_mod/no_arch", @@ -1479,12 +1479,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 24, + "logic element": 13, "latch": 13, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 24, - "Total Node": 38 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_DL_16_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1496,12 +1496,12 @@ "test_coverage(%)": 100, "Pi": 20, "Po": 1, - "logic element": 30, + "logic element": 25, "generic logic size": 4, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 10, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/k6_N10_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_N10_40nm", @@ -1513,12 +1513,12 @@ "test_coverage(%)": 100, "Pi": 20, "Po": 1, - "logic element": 30, + "logic element": 25, "generic logic size": 6, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 10, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_N10_mem32K_40nm", @@ -1530,12 +1530,12 @@ "test_coverage(%)": 100, "Pi": 20, "Po": 1, - "logic element": 30, + "logic element": 25, "generic logic size": 6, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 10, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/no_arch": { "test_name": "micro/bm_DL_16_1_mux/no_arch", @@ -1546,11 +1546,11 @@ "test_coverage(%)": 100, "Pi": 20, "Po": 1, - "logic element": 30, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 30, - "Total Node": 30 + "logic element": 25, + "Longest Path": 10, + "Average Path": 5, + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_2_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_2_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1562,12 +1562,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_DL_2_1_mux/k6_N10_40nm": { "test_name": "micro/bm_DL_2_1_mux/k6_N10_40nm", @@ -1579,12 +1579,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_DL_2_1_mux/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_2_1_mux/k6_N10_mem32K_40nm", @@ -1596,12 +1596,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_DL_2_1_mux/no_arch": { "test_name": "micro/bm_DL_2_1_mux/no_arch", @@ -1612,11 +1612,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_DL_2_4_encoder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_2_4_encoder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1628,12 +1628,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 4, - "logic element": 29, + "logic element": 22, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 29, - "Total Node": 29 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/k6_N10_40nm": { "test_name": "micro/bm_DL_2_4_encoder/k6_N10_40nm", @@ -1645,12 +1645,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 4, - "logic element": 29, + "logic element": 22, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 29, - "Total Node": 29 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_2_4_encoder/k6_N10_mem32K_40nm", @@ -1662,12 +1662,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 4, - "logic element": 29, + "logic element": 22, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 29, - "Total Node": 29 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/no_arch": { "test_name": "micro/bm_DL_2_4_encoder/no_arch", @@ -1678,11 +1678,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 4, - "logic element": 29, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 29, - "Total Node": 29 + "logic element": 22, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_cascaded_flip_flops/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_2_cascaded_flip_flops/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1695,13 +1695,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 2, - "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Total Node": 3 }, "micro/bm_DL_2_cascaded_flip_flops/k6_N10_40nm": { "test_name": "micro/bm_DL_2_cascaded_flip_flops/k6_N10_40nm", @@ -1714,13 +1712,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 2, - "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Total Node": 3 }, "micro/bm_DL_2_cascaded_flip_flops/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_2_cascaded_flip_flops/k6_N10_mem32K_40nm", @@ -1733,13 +1729,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 2, - "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Total Node": 3 }, "micro/bm_DL_2_cascaded_flip_flops/no_arch": { "test_name": "micro/bm_DL_2_cascaded_flip_flops/no_arch", @@ -1751,12 +1745,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 2, - "logic element": 2, "latch": 2, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Total Node": 3 }, "micro/bm_DL_4_16_encoder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_16_encoder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1768,12 +1760,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 16, - "logic element": 141, + "logic element": 92, "generic logic size": 4, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 141, - "Total Node": 141 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/k6_N10_40nm": { "test_name": "micro/bm_DL_4_16_encoder/k6_N10_40nm", @@ -1785,12 +1777,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 16, - "logic element": 141, + "logic element": 92, "generic logic size": 6, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 141, - "Total Node": 141 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_4_16_encoder/k6_N10_mem32K_40nm", @@ -1802,12 +1794,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 16, - "logic element": 141, + "logic element": 92, "generic logic size": 6, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 141, - "Total Node": 141 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/no_arch": { "test_name": "micro/bm_DL_4_16_encoder/no_arch", @@ -1818,11 +1810,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 16, - "logic element": 141, - "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 141, - "Total Node": 141 + "logic element": 92, + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1834,12 +1826,12 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 1, - "logic element": 4, + "logic element": 3, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 3, + "Total Node": 3 }, "micro/bm_DL_4_1_mux/k6_N10_40nm": { "test_name": "micro/bm_DL_4_1_mux/k6_N10_40nm", @@ -1851,12 +1843,12 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 1, - "logic element": 4, + "logic element": 3, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 3, + "Total Node": 3 }, "micro/bm_DL_4_1_mux/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_4_1_mux/k6_N10_mem32K_40nm", @@ -1868,12 +1860,12 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 1, - "logic element": 4, + "logic element": 3, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 3, + "Total Node": 3 }, "micro/bm_DL_4_1_mux/no_arch": { "test_name": "micro/bm_DL_4_1_mux/no_arch", @@ -1884,11 +1876,11 @@ "test_coverage(%)": 100, "Pi": 6, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 3, + "Longest Path": 4, + "Average Path": 4, + "Estimated LUTs": 3, + "Total Node": 3 }, "micro/bm_DL_4_bit_comparator/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_bit_comparator/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1900,12 +1892,12 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 3, - "logic element": 30, + "logic element": 33, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/k6_N10_40nm": { "test_name": "micro/bm_DL_4_bit_comparator/k6_N10_40nm", @@ -1917,12 +1909,12 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 3, - "logic element": 30, + "logic element": 33, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_4_bit_comparator/k6_N10_mem32K_40nm", @@ -1934,12 +1926,12 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 3, - "logic element": 30, + "logic element": 33, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 30, - "Total Node": 30 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/no_arch": { "test_name": "micro/bm_DL_4_bit_comparator/no_arch", @@ -1950,11 +1942,11 @@ "test_coverage(%)": 100, "Pi": 8, "Po": 3, - "logic element": 30, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 30, - "Total Node": 30 + "logic element": 33, + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_shift_register/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_bit_shift_register/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2040,13 +2032,13 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 4, - "logic element": 91, + "logic element": 89, "Adder": 15, "generic logic size": 4, - "Longest Path": 12, - "Average Path": 7, - "Estimated LUTs": 91, - "Total Node": 106 + "Longest Path": 11, + "Average Path": 8, + "Estimated LUTs": 89, + "Total Node": 104 }, "micro/bm_DL_74381_ALU/k6_N10_40nm": { "test_name": "micro/bm_DL_74381_ALU/k6_N10_40nm", @@ -2058,12 +2050,12 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 4, - "logic element": 112, + "logic element": 110, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 7, - "Estimated LUTs": 112, - "Total Node": 112 + "Longest Path": 11, + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_74381_ALU/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_74381_ALU/k6_N10_mem32K_40nm", @@ -2075,12 +2067,12 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 4, - "logic element": 112, + "logic element": 110, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 7, - "Estimated LUTs": 112, - "Total Node": 112 + "Longest Path": 11, + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_74381_ALU/no_arch": { "test_name": "micro/bm_DL_74381_ALU/no_arch", @@ -2091,11 +2083,11 @@ "test_coverage(%)": 100, "Pi": 11, "Po": 4, - "logic element": 112, - "Longest Path": 12, - "Average Path": 7, - "Estimated LUTs": 112, - "Total Node": 112 + "logic element": 110, + "Longest Path": 11, + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_BCD_7_segment_without_x/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2107,12 +2099,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 7, - "logic element": 78, + "logic element": 61, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 7, - "Estimated LUTs": 78, - "Total Node": 78 + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/k6_N10_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_N10_40nm", @@ -2124,12 +2116,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 7, - "logic element": 78, + "logic element": 61, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 7, - "Estimated LUTs": 78, - "Total Node": 78 + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_N10_mem32K_40nm", @@ -2141,12 +2133,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 7, - "logic element": 78, + "logic element": 61, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 7, - "Estimated LUTs": 78, - "Total Node": 78 + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/no_arch": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/no_arch", @@ -2157,11 +2149,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 7, - "logic element": 78, - "Longest Path": 9, + "logic element": 61, + "Longest Path": 11, "Average Path": 7, - "Estimated LUTs": 78, - "Total Node": 78 + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2173,13 +2165,13 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 10, - "logic element": 25, + "logic element": 15, "Adder": 17, "generic logic size": 4, - "Longest Path": 16, - "Average Path": 6, - "Estimated LUTs": 25, - "Total Node": 42 + "Longest Path": 12, + "Average Path": 5, + "Estimated LUTs": 15, + "Total Node": 32 }, "micro/bm_DL_BCD_adder/k6_N10_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_N10_40nm", @@ -2191,12 +2183,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 10, - "logic element": 50, + "logic element": 40, "generic logic size": 6, - "Longest Path": 15, - "Average Path": 6, - "Estimated LUTs": 50, - "Total Node": 50 + "Longest Path": 11, + "Average Path": 5, + "Estimated LUTs": 40, + "Total Node": 40 }, "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm", @@ -2208,12 +2200,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 10, - "logic element": 50, + "logic element": 40, "generic logic size": 6, - "Longest Path": 15, - "Average Path": 6, - "Estimated LUTs": 50, - "Total Node": 50 + "Longest Path": 11, + "Average Path": 5, + "Estimated LUTs": 40, + "Total Node": 40 }, "micro/bm_DL_BCD_adder/no_arch": { "test_name": "micro/bm_DL_BCD_adder/no_arch", @@ -2224,11 +2216,11 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 10, - "logic element": 50, - "Longest Path": 15, - "Average Path": 6, - "Estimated LUTs": 50, - "Total Node": 50 + "logic element": 40, + "Longest Path": 11, + "Average Path": 5, + "Estimated LUTs": 40, + "Total Node": 40 }, "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2308,13 +2300,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/bm_DL_Dff_w_synch_reset/k6_N10_40nm": { "test_name": "micro/bm_DL_Dff_w_synch_reset/k6_N10_40nm", @@ -2327,13 +2319,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/bm_DL_Dff_w_synch_reset/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_Dff_w_synch_reset/k6_N10_mem32K_40nm", @@ -2346,13 +2338,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/bm_DL_Dff_w_synch_reset/no_arch": { "test_name": "micro/bm_DL_Dff_w_synch_reset/no_arch", @@ -2364,12 +2356,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/bm_DL_D_flipflop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_D_flipflop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2382,13 +2374,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "micro/bm_DL_D_flipflop/k6_N10_40nm": { "test_name": "micro/bm_DL_D_flipflop/k6_N10_40nm", @@ -2401,13 +2391,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "micro/bm_DL_D_flipflop/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_D_flipflop/k6_N10_mem32K_40nm", @@ -2420,13 +2408,11 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "micro/bm_DL_D_flipflop/no_arch": { "test_name": "micro/bm_DL_D_flipflop/no_arch", @@ -2438,12 +2424,10 @@ "Latch Drivers": 1, "Pi": 1, "Po": 1, - "logic element": 1, "latch": 1, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 1, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 2 }, "micro/bm_DL_four_bit_adder_continuous_assign/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2455,12 +2439,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 5, - "logic element": 49, + "logic element": 28, "generic logic size": 4, - "Longest Path": 15, - "Average Path": 7, - "Estimated LUTs": 49, - "Total Node": 49 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_40nm": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_40nm", @@ -2472,12 +2456,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 5, - "logic element": 49, + "logic element": 28, "generic logic size": 6, - "Longest Path": 15, - "Average Path": 7, - "Estimated LUTs": 49, - "Total Node": 49 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_mem32K_40nm", @@ -2489,12 +2473,12 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 5, - "logic element": 49, + "logic element": 28, "generic logic size": 6, - "Longest Path": 15, - "Average Path": 7, - "Estimated LUTs": 49, - "Total Node": 49 + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/no_arch": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/no_arch", @@ -2505,11 +2489,11 @@ "test_coverage(%)": 100, "Pi": 9, "Po": 5, - "logic element": 49, - "Longest Path": 15, - "Average Path": 7, - "Estimated LUTs": 49, - "Total Node": 49 + "logic element": 28, + "Longest Path": 14, + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_logic_w_Dff2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_logic_w_Dff2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2522,13 +2506,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff2/k6_N10_40nm": { "test_name": "micro/bm_DL_logic_w_Dff2/k6_N10_40nm", @@ -2541,13 +2525,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff2/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_logic_w_Dff2/k6_N10_mem32K_40nm", @@ -2560,13 +2544,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff2/no_arch": { "test_name": "micro/bm_DL_logic_w_Dff2/no_arch", @@ -2578,12 +2562,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_logic_w_Dff/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2596,13 +2580,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff/k6_N10_40nm": { "test_name": "micro/bm_DL_logic_w_Dff/k6_N10_40nm", @@ -2615,13 +2599,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_logic_w_Dff/k6_N10_mem32K_40nm", @@ -2634,13 +2618,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_logic_w_Dff/no_arch": { "test_name": "micro/bm_DL_logic_w_Dff/no_arch", @@ -2652,12 +2636,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 2, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 4, + "Estimated LUTs": 2, + "Total Node": 5 }, "micro/bm_DL_structural_logic2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_structural_logic2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2669,12 +2653,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 3, - "logic element": 12, + "logic element": 9, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 9, + "Total Node": 9 }, "micro/bm_DL_structural_logic2/k6_N10_40nm": { "test_name": "micro/bm_DL_structural_logic2/k6_N10_40nm", @@ -2686,12 +2670,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 3, - "logic element": 12, + "logic element": 9, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 9, + "Total Node": 9 }, "micro/bm_DL_structural_logic2/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_structural_logic2/k6_N10_mem32K_40nm", @@ -2703,12 +2687,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 3, - "logic element": 12, + "logic element": 9, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 9, + "Total Node": 9 }, "micro/bm_DL_structural_logic2/no_arch": { "test_name": "micro/bm_DL_structural_logic2/no_arch", @@ -2719,11 +2703,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 3, - "logic element": 12, - "Longest Path": 7, - "Average Path": 6, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 9, + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 9, + "Total Node": 9 }, "micro/bm_DL_structural_logic/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_structural_logic/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2735,12 +2719,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 5, + "logic element": 4, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "micro/bm_DL_structural_logic/k6_N10_40nm": { "test_name": "micro/bm_DL_structural_logic/k6_N10_40nm", @@ -2752,12 +2736,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 5, + "logic element": 4, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "micro/bm_DL_structural_logic/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_structural_logic/k6_N10_mem32K_40nm", @@ -2769,12 +2753,12 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 5, + "logic element": 4, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 5, - "Total Node": 5 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "micro/bm_DL_structural_logic/no_arch": { "test_name": "micro/bm_DL_structural_logic/no_arch", @@ -2785,11 +2769,11 @@ "test_coverage(%)": 100, "Pi": 3, "Po": 1, - "logic element": 5, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 5, - "Total Node": 5 + "logic element": 4, + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 4, + "Total Node": 4 }, "micro/bm_expr_all_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_expr_all_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2802,14 +2786,14 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 1948, - "latch": 427, - "Adder": 131, + "logic element": 1236, + "latch": 336, + "Adder": 98, "generic logic size": 4, - "Longest Path": 42, + "Longest Path": 38, "Average Path": 4, - "Estimated LUTs": 2108, - "Total Node": 2507 + "Estimated LUTs": 1236, + "Total Node": 1671 }, "micro/bm_expr_all_mod/k6_N10_40nm": { "test_name": "micro/bm_expr_all_mod/k6_N10_40nm", @@ -2822,13 +2806,13 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 2198, - "latch": 427, + "logic element": 1423, + "latch": 336, "generic logic size": 6, - "Longest Path": 42, + "Longest Path": 37, "Average Path": 4, - "Estimated LUTs": 2294, - "Total Node": 2626 + "Estimated LUTs": 1423, + "Total Node": 1760 }, "micro/bm_expr_all_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_expr_all_mod/k6_N10_mem32K_40nm", @@ -2841,13 +2825,13 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 2198, - "latch": 427, + "logic element": 1423, + "latch": 336, "generic logic size": 6, - "Longest Path": 42, + "Longest Path": 37, "Average Path": 4, - "Estimated LUTs": 2294, - "Total Node": 2626 + "Estimated LUTs": 1423, + "Total Node": 1760 }, "micro/bm_expr_all_mod/no_arch": { "test_name": "micro/bm_expr_all_mod/no_arch", @@ -2859,12 +2843,12 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 2198, - "latch": 427, - "Longest Path": 42, + "logic element": 1423, + "latch": 336, + "Longest Path": 37, "Average Path": 4, - "Estimated LUTs": 2198, - "Total Node": 2626 + "Estimated LUTs": 1423, + "Total Node": 1760 }, "micro/bm_functional_test/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_functional_test/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2877,15 +2861,15 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 433, + "logic element": 430, "latch": 25, "Adder": 47, - "Multiplier": 2, + "Multiplier": 1, "generic logic size": 4, - "Longest Path": 27, + "Longest Path": 34, "Average Path": 4, - "Estimated LUTs": 467, - "Total Node": 508 + "Estimated LUTs": 430, + "Total Node": 504 }, "micro/bm_functional_test/k6_N10_40nm": { "test_name": "micro/bm_functional_test/k6_N10_40nm", @@ -2898,13 +2882,13 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 878, + "logic element": 692, "latch": 25, "generic logic size": 6, - "Longest Path": 44, + "Longest Path": 76, "Average Path": 4, - "Estimated LUTs": 909, - "Total Node": 904 + "Estimated LUTs": 692, + "Total Node": 718 }, "micro/bm_functional_test/k6_N10_mem32K_40nm": { "test_name": "micro/bm_functional_test/k6_N10_mem32K_40nm", @@ -2917,14 +2901,14 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 512, + "logic element": 509, "latch": 25, - "Multiplier": 2, + "Multiplier": 1, "generic logic size": 6, - "Longest Path": 44, + "Longest Path": 57, "Average Path": 4, - "Estimated LUTs": 543, - "Total Node": 540 + "Estimated LUTs": 509, + "Total Node": 536 }, "micro/bm_functional_test/no_arch": { "test_name": "micro/bm_functional_test/no_arch", @@ -2936,12 +2920,12 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 878, + "logic element": 692, "latch": 25, - "Longest Path": 44, + "Longest Path": 76, "Average Path": 4, - "Estimated LUTs": 878, - "Total Node": 904 + "Estimated LUTs": 692, + "Total Node": 718 }, "micro/bm_if_collapse/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_collapse/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2954,13 +2938,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 32, + "logic element": 21, "latch": 9, "generic logic size": 4, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 32, - "Total Node": 42 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/k6_N10_40nm": { "test_name": "micro/bm_if_collapse/k6_N10_40nm", @@ -2973,13 +2957,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 32, + "logic element": 21, "latch": 9, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 32, - "Total Node": 42 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/k6_N10_mem32K_40nm": { "test_name": "micro/bm_if_collapse/k6_N10_mem32K_40nm", @@ -2992,13 +2976,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 32, + "logic element": 21, "latch": 9, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 32, - "Total Node": 42 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/no_arch": { "test_name": "micro/bm_if_collapse/no_arch", @@ -3010,12 +2994,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 32, + "logic element": 21, "latch": 9, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 32, - "Total Node": 42 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_common/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_common/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3028,13 +3012,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 29, + "logic element": 18, "latch": 9, "generic logic size": 4, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 39 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/k6_N10_40nm": { "test_name": "micro/bm_if_common/k6_N10_40nm", @@ -3047,13 +3031,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 29, + "logic element": 18, "latch": 9, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 39 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/k6_N10_mem32K_40nm": { "test_name": "micro/bm_if_common/k6_N10_mem32K_40nm", @@ -3066,13 +3050,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 29, + "logic element": 18, "latch": 9, "generic logic size": 6, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 39 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/no_arch": { "test_name": "micro/bm_if_common/no_arch", @@ -3084,12 +3068,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 29, + "logic element": 18, "latch": 9, - "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 39 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_reset/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_reset/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3102,13 +3086,13 @@ "Latch Drivers": 1, "Pi": 7, "Po": 3, - "logic element": 9, + "logic element": 6, "latch": 3, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 13 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 10 }, "micro/bm_if_reset/k6_N10_40nm": { "test_name": "micro/bm_if_reset/k6_N10_40nm", @@ -3121,13 +3105,13 @@ "Latch Drivers": 1, "Pi": 7, "Po": 3, - "logic element": 9, + "logic element": 6, "latch": 3, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 13 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 10 }, "micro/bm_if_reset/k6_N10_mem32K_40nm": { "test_name": "micro/bm_if_reset/k6_N10_mem32K_40nm", @@ -3140,13 +3124,13 @@ "Latch Drivers": 1, "Pi": 7, "Po": 3, - "logic element": 9, + "logic element": 6, "latch": 3, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 13 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 10 }, "micro/bm_if_reset/no_arch": { "test_name": "micro/bm_if_reset/no_arch", @@ -3158,12 +3142,12 @@ "Latch Drivers": 1, "Pi": 7, "Po": 3, - "logic element": 9, + "logic element": 6, "latch": 3, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 9, - "Total Node": 13 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 10 }, "micro/bm_lpm_all/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_lpm_all/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3175,13 +3159,13 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 256, - "logic element": 993, + "logic element": 577, "Adder": 99, "generic logic size": 4, - "Longest Path": 39, - "Average Path": 5, - "Estimated LUTs": 1063, - "Total Node": 1092 + "Longest Path": 36, + "Average Path": 6, + "Estimated LUTs": 577, + "Total Node": 676 }, "micro/bm_lpm_all/k6_N10_40nm": { "test_name": "micro/bm_lpm_all/k6_N10_40nm", @@ -3193,12 +3177,12 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 256, - "logic element": 1182, + "logic element": 766, "generic logic size": 6, - "Longest Path": 39, - "Average Path": 5, - "Estimated LUTs": 1224, - "Total Node": 1182 + "Longest Path": 36, + "Average Path": 6, + "Estimated LUTs": 766, + "Total Node": 766 }, "micro/bm_lpm_all/k6_N10_mem32K_40nm": { "test_name": "micro/bm_lpm_all/k6_N10_mem32K_40nm", @@ -3210,12 +3194,12 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 256, - "logic element": 1182, + "logic element": 766, "generic logic size": 6, - "Longest Path": 39, - "Average Path": 5, - "Estimated LUTs": 1224, - "Total Node": 1182 + "Longest Path": 36, + "Average Path": 6, + "Estimated LUTs": 766, + "Total Node": 766 }, "micro/bm_lpm_all/no_arch": { "test_name": "micro/bm_lpm_all/no_arch", @@ -3226,11 +3210,11 @@ "test_coverage(%)": 100, "Pi": 64, "Po": 256, - "logic element": 1182, - "Longest Path": 39, - "Average Path": 5, - "Estimated LUTs": 1182, - "Total Node": 1182 + "logic element": 766, + "Longest Path": 36, + "Average Path": 6, + "Estimated LUTs": 766, + "Total Node": 766 }, "micro/bm_lpm_concat/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_lpm_concat/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3309,14 +3293,14 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "logic element": 144, - "latch": 72, + "logic element": 74, + "latch": 70, "Multiplier": 3, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 144, - "Total Node": 220 + "Estimated LUTs": 74, + "Total Node": 148 }, "micro/bm_match1_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match1_str_arch/k6_N10_40nm", @@ -3329,13 +3313,13 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "logic element": 2008, - "latch": 72, + "logic element": 1938, + "latch": 70, "generic logic size": 6, - "Longest Path": 74, - "Average Path": 6, - "Estimated LUTs": 2008, - "Total Node": 2081 + "Longest Path": 73, + "Average Path": 5, + "Estimated LUTs": 1938, + "Total Node": 2009 }, "micro/bm_match1_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match1_str_arch/k6_N10_mem32K_40nm", @@ -3348,14 +3332,14 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "logic element": 144, - "latch": 72, + "logic element": 74, + "latch": 70, "Multiplier": 3, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 144, - "Total Node": 220 + "Estimated LUTs": 74, + "Total Node": 148 }, "micro/bm_match1_str_arch/no_arch": { "test_name": "micro/bm_match1_str_arch/no_arch", @@ -3367,12 +3351,12 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "logic element": 2008, - "latch": 72, - "Longest Path": 74, - "Average Path": 6, - "Estimated LUTs": 2008, - "Total Node": 2081 + "logic element": 1938, + "latch": 70, + "Longest Path": 73, + "Average Path": 5, + "Estimated LUTs": 1938, + "Total Node": 2009 }, "micro/bm_match2_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match2_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3385,15 +3369,15 @@ "Latch Drivers": 1, "Pi": 54, "Po": 99, - "logic element": 99, + "logic element": 53, "latch": 46, "Adder": 78, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 25, + "Longest Path": 24, "Average Path": 5, - "Estimated LUTs": 99, - "Total Node": 228 + "Estimated LUTs": 53, + "Total Node": 182 }, "micro/bm_match2_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match2_str_arch/k6_N10_40nm", @@ -3406,13 +3390,13 @@ "Latch Drivers": 1, "Pi": 54, "Po": 99, - "logic element": 1172, + "logic element": 1126, "latch": 46, "generic logic size": 6, - "Longest Path": 32, + "Longest Path": 31, "Average Path": 6, - "Estimated LUTs": 1172, - "Total Node": 1219 + "Estimated LUTs": 1126, + "Total Node": 1173 }, "micro/bm_match2_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match2_str_arch/k6_N10_mem32K_40nm", @@ -3425,14 +3409,14 @@ "Latch Drivers": 1, "Pi": 54, "Po": 99, - "logic element": 240, + "logic element": 194, "latch": 46, "Multiplier": 4, "generic logic size": 6, - "Longest Path": 25, + "Longest Path": 24, "Average Path": 5, - "Estimated LUTs": 240, - "Total Node": 291 + "Estimated LUTs": 194, + "Total Node": 245 }, "micro/bm_match2_str_arch/no_arch": { "test_name": "micro/bm_match2_str_arch/no_arch", @@ -3444,12 +3428,12 @@ "Latch Drivers": 1, "Pi": 54, "Po": 99, - "logic element": 1172, + "logic element": 1126, "latch": 46, - "Longest Path": 32, + "Longest Path": 31, "Average Path": 6, - "Estimated LUTs": 1172, - "Total Node": 1219 + "Estimated LUTs": 1126, + "Total Node": 1173 }, "micro/bm_match3_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match3_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3462,15 +3446,15 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 54, + "logic element": 26, "latch": 46, "Adder": 50, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 24, + "Longest Path": 23, "Average Path": 4, - "Estimated LUTs": 54, - "Total Node": 152 + "Estimated LUTs": 26, + "Total Node": 124 }, "micro/bm_match3_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match3_str_arch/k6_N10_40nm", @@ -3483,13 +3467,13 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 375, + "logic element": 347, "latch": 46, "generic logic size": 6, - "Longest Path": 58, - "Average Path": 5, - "Estimated LUTs": 375, - "Total Node": 422 + "Longest Path": 57, + "Average Path": 4, + "Estimated LUTs": 347, + "Total Node": 394 }, "micro/bm_match3_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match3_str_arch/k6_N10_mem32K_40nm", @@ -3502,14 +3486,14 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 142, + "logic element": 114, "latch": 46, "Multiplier": 1, "generic logic size": 6, - "Longest Path": 58, + "Longest Path": 57, "Average Path": 4, - "Estimated LUTs": 142, - "Total Node": 190 + "Estimated LUTs": 114, + "Total Node": 162 }, "micro/bm_match3_str_arch/no_arch": { "test_name": "micro/bm_match3_str_arch/no_arch", @@ -3521,12 +3505,12 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 375, + "logic element": 347, "latch": 46, - "Longest Path": 58, - "Average Path": 5, - "Estimated LUTs": 375, - "Total Node": 422 + "Longest Path": 57, + "Average Path": 4, + "Estimated LUTs": 347, + "Total Node": 394 }, "micro/bm_match4_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match4_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3539,15 +3523,15 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 216, - "latch": 108, - "Adder": 74, + "logic element": 163, + "latch": 53, + "Adder": 41, "Multiplier": 3, "generic logic size": 4, - "Longest Path": 42, - "Average Path": 4, - "Estimated LUTs": 216, - "Total Node": 402 + "Longest Path": 25, + "Average Path": 3, + "Estimated LUTs": 163, + "Total Node": 261 }, "micro/bm_match4_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match4_str_arch/k6_N10_40nm", @@ -3560,13 +3544,13 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 979, - "latch": 108, + "logic element": 860, + "latch": 53, "generic logic size": 6, - "Longest Path": 49, - "Average Path": 5, - "Estimated LUTs": 979, - "Total Node": 1088 + "Longest Path": 32, + "Average Path": 4, + "Estimated LUTs": 860, + "Total Node": 914 }, "micro/bm_match4_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match4_str_arch/k6_N10_mem32K_40nm", @@ -3579,14 +3563,14 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 358, - "latch": 108, + "logic element": 239, + "latch": 53, "Multiplier": 3, "generic logic size": 6, - "Longest Path": 42, - "Average Path": 4, - "Estimated LUTs": 358, - "Total Node": 470 + "Longest Path": 25, + "Average Path": 3, + "Estimated LUTs": 239, + "Total Node": 296 }, "micro/bm_match4_str_arch/no_arch": { "test_name": "micro/bm_match4_str_arch/no_arch", @@ -3598,12 +3582,12 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 979, - "latch": 108, - "Longest Path": 49, - "Average Path": 5, - "Estimated LUTs": 979, - "Total Node": 1088 + "logic element": 860, + "latch": 53, + "Longest Path": 32, + "Average Path": 4, + "Estimated LUTs": 860, + "Total Node": 914 }, "micro/bm_match5_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match5_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3616,15 +3600,15 @@ "Latch Drivers": 1, "Pi": 90, "Po": 54, - "logic element": 54, + "logic element": 8, "latch": 46, "Adder": 106, "Multiplier": 6, "generic logic size": 4, - "Longest Path": 27, - "Average Path": 5, - "Estimated LUTs": 54, - "Total Node": 213 + "Longest Path": 26, + "Average Path": 4, + "Estimated LUTs": 8, + "Total Node": 167 }, "micro/bm_match5_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match5_str_arch/k6_N10_40nm", @@ -3637,13 +3621,13 @@ "Latch Drivers": 1, "Pi": 90, "Po": 54, - "logic element": 1646, + "logic element": 1600, "latch": 46, "generic logic size": 6, - "Longest Path": 34, - "Average Path": 6, - "Estimated LUTs": 1646, - "Total Node": 1693 + "Longest Path": 33, + "Average Path": 5, + "Estimated LUTs": 1600, + "Total Node": 1647 }, "micro/bm_match5_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match5_str_arch/k6_N10_mem32K_40nm", @@ -3656,14 +3640,14 @@ "Latch Drivers": 1, "Pi": 90, "Po": 54, - "logic element": 248, + "logic element": 202, "latch": 46, "Multiplier": 6, "generic logic size": 6, - "Longest Path": 27, - "Average Path": 5, - "Estimated LUTs": 248, - "Total Node": 301 + "Longest Path": 26, + "Average Path": 4, + "Estimated LUTs": 202, + "Total Node": 255 }, "micro/bm_match5_str_arch/no_arch": { "test_name": "micro/bm_match5_str_arch/no_arch", @@ -3675,12 +3659,12 @@ "Latch Drivers": 1, "Pi": 90, "Po": 54, - "logic element": 1646, + "logic element": 1600, "latch": 46, - "Longest Path": 34, - "Average Path": 6, - "Estimated LUTs": 1646, - "Total Node": 1693 + "Longest Path": 33, + "Average Path": 5, + "Estimated LUTs": 1600, + "Total Node": 1647 }, "micro/bm_match6_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match6_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3693,15 +3677,15 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 54, + "logic element": 26, "latch": 28, "Adder": 49, "Multiplier": 2, "generic logic size": 4, - "Longest Path": 23, - "Average Path": 5, - "Estimated LUTs": 54, - "Total Node": 134 + "Longest Path": 22, + "Average Path": 4, + "Estimated LUTs": 26, + "Total Node": 106 }, "micro/bm_match6_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match6_str_arch/k6_N10_40nm", @@ -3714,13 +3698,13 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 609, + "logic element": 581, "latch": 28, "generic logic size": 6, - "Longest Path": 30, + "Longest Path": 29, "Average Path": 5, - "Estimated LUTs": 609, - "Total Node": 638 + "Estimated LUTs": 581, + "Total Node": 610 }, "micro/bm_match6_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match6_str_arch/k6_N10_mem32K_40nm", @@ -3733,14 +3717,14 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 143, + "logic element": 115, "latch": 28, "Multiplier": 2, "generic logic size": 6, - "Longest Path": 23, - "Average Path": 5, - "Estimated LUTs": 143, - "Total Node": 174 + "Longest Path": 22, + "Average Path": 4, + "Estimated LUTs": 115, + "Total Node": 146 }, "micro/bm_match6_str_arch/no_arch": { "test_name": "micro/bm_match6_str_arch/no_arch", @@ -3752,12 +3736,12 @@ "Latch Drivers": 1, "Pi": 54, "Po": 54, - "logic element": 609, + "logic element": 581, "latch": 28, - "Longest Path": 30, + "Longest Path": 29, "Average Path": 5, - "Estimated LUTs": 609, - "Total Node": 638 + "Estimated LUTs": 581, + "Total Node": 610 }, "micro/bm_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3770,13 +3754,13 @@ "Latch Drivers": 1, "Pi": 66, "Po": 33, - "logic element": 66, + "logic element": 33, "latch": 33, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 66, - "Total Node": 100 + "Estimated LUTs": 33, + "Total Node": 67 }, "micro/bm_mod/k6_N10_40nm": { "test_name": "micro/bm_mod/k6_N10_40nm", @@ -3789,13 +3773,13 @@ "Latch Drivers": 1, "Pi": 66, "Po": 33, - "logic element": 66, + "logic element": 33, "latch": 33, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 66, - "Total Node": 100 + "Estimated LUTs": 33, + "Total Node": 67 }, "micro/bm_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_mod/k6_N10_mem32K_40nm", @@ -3808,13 +3792,13 @@ "Latch Drivers": 1, "Pi": 66, "Po": 33, - "logic element": 66, + "logic element": 33, "latch": 33, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 66, - "Total Node": 100 + "Estimated LUTs": 33, + "Total Node": 67 }, "micro/bm_mod/no_arch": { "test_name": "micro/bm_mod/no_arch", @@ -3826,12 +3810,12 @@ "Latch Drivers": 1, "Pi": 66, "Po": 33, - "logic element": 66, + "logic element": 33, "latch": 33, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 66, - "Total Node": 100 + "Estimated LUTs": 33, + "Total Node": 67 }, "micro/bm_my_D_latch1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_my_D_latch1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3843,12 +3827,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_my_D_latch1/k6_N10_40nm": { "test_name": "micro/bm_my_D_latch1/k6_N10_40nm", @@ -3860,12 +3844,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_my_D_latch1/k6_N10_mem32K_40nm": { "test_name": "micro/bm_my_D_latch1/k6_N10_mem32K_40nm", @@ -3877,12 +3861,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_my_D_latch1/no_arch": { "test_name": "micro/bm_my_D_latch1/no_arch", @@ -3893,11 +3877,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "micro/bm_my_D_latch2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_my_D_latch2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3976,13 +3960,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 139, - "latch": 9, + "logic element": 84, + "latch": 8, "generic logic size": 4, "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 141, - "Total Node": 149 + "Estimated LUTs": 84, + "Total Node": 93 }, "micro/bm_stmt_all_mod/k6_N10_40nm": { "test_name": "micro/bm_stmt_all_mod/k6_N10_40nm", @@ -3995,13 +3979,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 139, - "latch": 9, + "logic element": 84, + "latch": 8, "generic logic size": 6, "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 139, - "Total Node": 149 + "Estimated LUTs": 84, + "Total Node": 93 }, "micro/bm_stmt_all_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_stmt_all_mod/k6_N10_mem32K_40nm", @@ -4014,13 +3998,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 139, - "latch": 9, + "logic element": 84, + "latch": 8, "generic logic size": 6, "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 139, - "Total Node": 149 + "Estimated LUTs": 84, + "Total Node": 93 }, "micro/bm_stmt_all_mod/no_arch": { "test_name": "micro/bm_stmt_all_mod/no_arch", @@ -4032,12 +4016,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 139, - "latch": 9, + "logic element": 84, + "latch": 8, "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 139, - "Total Node": 149 + "Estimated LUTs": 84, + "Total Node": 93 }, "micro/bm_stmt_compare_padding/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4050,13 +4034,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 70, - "latch": 7, + "logic element": 49, + "latch": 6, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 70, - "Total Node": 78 + "Estimated LUTs": 49, + "Total Node": 56 }, "micro/bm_stmt_compare_padding/k6_N10_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_N10_40nm", @@ -4069,13 +4053,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 70, - "latch": 7, + "logic element": 49, + "latch": 6, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 70, - "Total Node": 78 + "Estimated LUTs": 49, + "Total Node": 56 }, "micro/bm_stmt_compare_padding/k6_N10_mem32K_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_N10_mem32K_40nm", @@ -4088,13 +4072,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 70, - "latch": 7, + "logic element": 49, + "latch": 6, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 70, - "Total Node": 78 + "Estimated LUTs": 49, + "Total Node": 56 }, "micro/bm_stmt_compare_padding/no_arch": { "test_name": "micro/bm_stmt_compare_padding/no_arch", @@ -4106,12 +4090,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 70, - "latch": 7, - "Longest Path": 9, + "logic element": 49, + "latch": 6, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 70, - "Total Node": 78 + "Estimated LUTs": 49, + "Total Node": 56 }, "micro/bm_tester/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_tester/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4124,13 +4108,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 112, + "logic element": 64, "latch": 4, "generic logic size": 4, "Longest Path": 10, "Average Path": 6, - "Estimated LUTs": 114, - "Total Node": 117 + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/k6_N10_40nm": { "test_name": "micro/bm_tester/k6_N10_40nm", @@ -4143,13 +4127,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 112, + "logic element": 64, "latch": 4, "generic logic size": 6, "Longest Path": 10, "Average Path": 6, - "Estimated LUTs": 112, - "Total Node": 117 + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/k6_N10_mem32K_40nm": { "test_name": "micro/bm_tester/k6_N10_mem32K_40nm", @@ -4162,13 +4146,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 112, + "logic element": 64, "latch": 4, "generic logic size": 6, "Longest Path": 10, "Average Path": 6, - "Estimated LUTs": 112, - "Total Node": 117 + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/no_arch": { "test_name": "micro/bm_tester/no_arch", @@ -4180,12 +4164,12 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 112, + "logic element": 64, "latch": 4, "Longest Path": 10, "Average Path": 6, - "Estimated LUTs": 112, - "Total Node": 117 + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/case_generate/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/case_generate/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4258,13 +4242,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/ff/k6_N10_40nm": { "test_name": "micro/ff/k6_N10_40nm", @@ -4275,13 +4259,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/ff/k6_N10_mem32K_40nm": { "test_name": "micro/ff/k6_N10_mem32K_40nm", @@ -4292,13 +4276,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/ff/no_arch": { "test_name": "micro/ff/no_arch", @@ -4308,12 +4292,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "latch": 1, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 4 + "Estimated LUTs": 1, + "Total Node": 3 }, "micro/generate/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/generate/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4326,14 +4310,14 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 50, + "logic element": 17, "latch": 16, "Adder": 17, "generic logic size": 4, - "Longest Path": 22, - "Average Path": 5, - "Estimated LUTs": 50, - "Total Node": 84 + "Longest Path": 21, + "Average Path": 4, + "Estimated LUTs": 17, + "Total Node": 51 }, "micro/generate/k6_N10_40nm": { "test_name": "micro/generate/k6_N10_40nm", @@ -4346,13 +4330,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 81, + "logic element": 48, "latch": 16, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 81, - "Total Node": 98 + "Longest Path": 65, + "Average Path": 4, + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/generate/k6_N10_mem32K_40nm": { "test_name": "micro/generate/k6_N10_mem32K_40nm", @@ -4365,13 +4349,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 81, + "logic element": 48, "latch": 16, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 81, - "Total Node": 98 + "Longest Path": 65, + "Average Path": 4, + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/generate/no_arch": { "test_name": "micro/generate/no_arch", @@ -4383,12 +4367,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 81, + "logic element": 48, "latch": 16, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 81, - "Total Node": 98 + "Longest Path": 65, + "Average Path": 4, + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/hard_adder_cin_propagation/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/hard_adder_cin_propagation/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/synthesis_result.json index 9477ac28ede..25ff7efa0e2 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/micro/synthesis_result.json @@ -400,12 +400,12 @@ "synthesis_time(ms)": 75.8, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log/k6_N10_40nm": { "test_name": "micro/bm_dag1_log/k6_N10_40nm", @@ -419,12 +419,12 @@ "synthesis_time(ms)": 53.5, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_log/k6_N10_mem32K_40nm", @@ -438,12 +438,12 @@ "synthesis_time(ms)": 48.8, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -458,13 +458,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 8, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 30 + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_N10_40nm", @@ -479,13 +479,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 8, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 30 + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_log_mod/k6_N10_mem32K_40nm", @@ -500,13 +500,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 8, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 30 + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log_mod/no_arch": { "test_name": "micro/bm_dag1_log_mod/no_arch", @@ -520,12 +520,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 8, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 30 + "Estimated LUTs": 13, + "Total Node": 22 }, "micro/bm_dag1_log/no_arch": { "test_name": "micro/bm_dag1_log/no_arch", @@ -538,11 +538,11 @@ "synthesis_time(ms)": 49.4, "Pi": 4, "Po": 2, - "logic element": 10, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 4, - "Estimated LUTs": 10, - "Total Node": 10 + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag1_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag1_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -632,13 +632,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/k6_N10_40nm": { "test_name": "micro/bm_dag1_mod/k6_N10_40nm", @@ -653,13 +653,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag1_mod/k6_N10_mem32K_40nm", @@ -674,13 +674,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag1_mod/no_arch": { "test_name": "micro/bm_dag1_mod/no_arch", @@ -694,12 +694,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag2_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -713,12 +713,12 @@ "synthesis_time(ms)": 55.7, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 10, - "Total Node": 10 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log/k6_N10_40nm": { "test_name": "micro/bm_dag2_log/k6_N10_40nm", @@ -732,12 +732,12 @@ "synthesis_time(ms)": 57.8, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 10, - "Total Node": 10 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_log/k6_N10_mem32K_40nm", @@ -751,12 +751,12 @@ "synthesis_time(ms)": 45.5, "Pi": 4, "Po": 2, - "logic element": 10, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 10, - "Total Node": 10 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -771,13 +771,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_N10_40nm", @@ -792,13 +792,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_log_mod/k6_N10_mem32K_40nm", @@ -813,13 +813,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log_mod/no_arch": { "test_name": "micro/bm_dag2_log_mod/no_arch", @@ -833,12 +833,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_log/no_arch": { "test_name": "micro/bm_dag2_log/no_arch", @@ -851,11 +851,11 @@ "synthesis_time(ms)": 46.7, "Pi": 4, "Po": 2, - "logic element": 10, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 10, - "Total Node": 10 + "logic element": 6, + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 6 }, "micro/bm_dag2_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag2_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -945,13 +945,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/k6_N10_40nm": { "test_name": "micro/bm_dag2_mod/k6_N10_40nm", @@ -966,13 +966,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag2_mod/k6_N10_mem32K_40nm", @@ -987,13 +987,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag2_mod/no_arch": { "test_name": "micro/bm_dag2_mod/no_arch", @@ -1007,12 +1007,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 11, + "logic element": 7, "latch": 7, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 11, - "Total Node": 19 + "Estimated LUTs": 7, + "Total Node": 15 }, "micro/bm_dag3_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1026,12 +1026,12 @@ "synthesis_time(ms)": 50.8, "Pi": 4, "Po": 2, - "logic element": 18, + "logic element": 14, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 18, - "Total Node": 18 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log/k6_N10_40nm": { "test_name": "micro/bm_dag3_log/k6_N10_40nm", @@ -1045,12 +1045,12 @@ "synthesis_time(ms)": 52.5, "Pi": 4, "Po": 2, - "logic element": 18, + "logic element": 14, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 18, - "Total Node": 18 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_log/k6_N10_mem32K_40nm", @@ -1064,12 +1064,12 @@ "synthesis_time(ms)": 48.7, "Pi": 4, "Po": 2, - "logic element": 18, + "logic element": 14, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 18, - "Total Node": 18 + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1084,13 +1084,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 38, + "logic element": 22, "latch": 12, "generic logic size": 4, - "Longest Path": 18, + "Longest Path": 14, "Average Path": 5, - "Estimated LUTs": 38, - "Total Node": 51 + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_N10_40nm", @@ -1105,13 +1105,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 38, + "logic element": 22, "latch": 12, "generic logic size": 6, - "Longest Path": 18, + "Longest Path": 14, "Average Path": 5, - "Estimated LUTs": 38, - "Total Node": 51 + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_log_mod/k6_N10_mem32K_40nm", @@ -1126,13 +1126,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 38, + "logic element": 22, "latch": 12, "generic logic size": 6, - "Longest Path": 18, + "Longest Path": 14, "Average Path": 5, - "Estimated LUTs": 38, - "Total Node": 51 + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log_mod/no_arch": { "test_name": "micro/bm_dag3_log_mod/no_arch", @@ -1146,12 +1146,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 38, + "logic element": 22, "latch": 12, - "Longest Path": 18, + "Longest Path": 14, "Average Path": 5, - "Estimated LUTs": 38, - "Total Node": 51 + "Estimated LUTs": 22, + "Total Node": 35 }, "micro/bm_dag3_log/no_arch": { "test_name": "micro/bm_dag3_log/no_arch", @@ -1164,11 +1164,11 @@ "synthesis_time(ms)": 48.1, "Pi": 4, "Po": 2, - "logic element": 18, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 18, - "Total Node": 18 + "logic element": 14, + "Longest Path": 7, + "Average Path": 5, + "Estimated LUTs": 14, + "Total Node": 14 }, "micro/bm_dag3_lpm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1240,13 +1240,13 @@ "synthesis_time(ms)": 53.8, "Pi": 4, "Po": 2, - "logic element": 16, + "logic element": 12, "Adder": 6, "generic logic size": 4, "Longest Path": 8, "Average Path": 6, - "Estimated LUTs": 16, - "Total Node": 22 + "Estimated LUTs": 12, + "Total Node": 18 }, "micro/bm_dag3_lpm_log/k6_N10_40nm": { "test_name": "micro/bm_dag3_lpm_log/k6_N10_40nm", @@ -1260,12 +1260,12 @@ "synthesis_time(ms)": 67.2, "Pi": 4, "Po": 2, - "logic element": 22, + "logic element": 18, "generic logic size": 6, "Longest Path": 8, "Average Path": 6, - "Estimated LUTs": 22, - "Total Node": 22 + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_log/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log/k6_N10_mem32K_40nm", @@ -1279,12 +1279,12 @@ "synthesis_time(ms)": 50.3, "Pi": 4, "Po": 2, - "logic element": 22, + "logic element": 18, "generic logic size": 6, "Longest Path": 8, "Average Path": 6, - "Estimated LUTs": 22, - "Total Node": 22 + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_log_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1299,14 +1299,14 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 37, + "logic element": 21, "latch": 12, "Adder": 6, "generic logic size": 4, - "Longest Path": 19, + "Longest Path": 15, "Average Path": 5, - "Estimated LUTs": 37, - "Total Node": 56 + "Estimated LUTs": 21, + "Total Node": 40 }, "micro/bm_dag3_lpm_log_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_N10_40nm", @@ -1321,13 +1321,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 40, + "logic element": 24, "latch": 12, "generic logic size": 6, - "Longest Path": 19, + "Longest Path": 15, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 53 + "Estimated LUTs": 24, + "Total Node": 37 }, "micro/bm_dag3_lpm_log_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_log_mod/k6_N10_mem32K_40nm", @@ -1342,13 +1342,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 40, + "logic element": 24, "latch": 12, "generic logic size": 6, - "Longest Path": 19, + "Longest Path": 15, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 53 + "Estimated LUTs": 24, + "Total Node": 37 }, "micro/bm_dag3_lpm_log_mod/no_arch": { "test_name": "micro/bm_dag3_lpm_log_mod/no_arch", @@ -1362,12 +1362,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 40, + "logic element": 24, "latch": 12, - "Longest Path": 19, + "Longest Path": 15, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 53 + "Estimated LUTs": 24, + "Total Node": 37 }, "micro/bm_dag3_lpm_log/no_arch": { "test_name": "micro/bm_dag3_lpm_log/no_arch", @@ -1380,11 +1380,11 @@ "synthesis_time(ms)": 50.9, "Pi": 4, "Po": 2, - "logic element": 22, + "logic element": 18, "Longest Path": 8, "Average Path": 6, - "Estimated LUTs": 22, - "Total Node": 22 + "Estimated LUTs": 18, + "Total Node": 18 }, "micro/bm_dag3_lpm_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag3_lpm_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1497,15 +1497,15 @@ "techmap_time(ms)": 0.9, "synthesis_time(ms)": 150.8, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 26, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 4, - "Longest Path": 21, + "Longest Path": 17, "Average Path": 4, - "Estimated LUTs": 26, - "Total Node": 41 + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/k6_N10_40nm": { "test_name": "micro/bm_dag3_mod/k6_N10_40nm", @@ -1518,15 +1518,15 @@ "techmap_time(ms)": 1, "synthesis_time(ms)": 137.1, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 26, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 6, - "Longest Path": 21, + "Longest Path": 17, "Average Path": 4, - "Estimated LUTs": 26, - "Total Node": 41 + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag3_mod/k6_N10_mem32K_40nm", @@ -1539,15 +1539,15 @@ "techmap_time(ms)": 1.1, "synthesis_time(ms)": 145.3, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 26, - "latch": 14, + "logic element": 18, + "latch": 18, "generic logic size": 6, - "Longest Path": 21, + "Longest Path": 17, "Average Path": 4, - "Estimated LUTs": 26, - "Total Node": 41 + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag3_mod/no_arch": { "test_name": "micro/bm_dag3_mod/no_arch", @@ -1559,14 +1559,14 @@ "techmap_time(ms)": 1.2, "synthesis_time(ms)": 135.7, "Latch Drivers": 1, - "Pi": 4, + "Pi": 6, "Po": 3, - "logic element": 26, - "latch": 14, - "Longest Path": 21, + "logic element": 18, + "latch": 18, + "Longest Path": 17, "Average Path": 4, - "Estimated LUTs": 26, - "Total Node": 41 + "Estimated LUTs": 18, + "Total Node": 37 }, "micro/bm_dag4_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_dag4_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1581,13 +1581,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/k6_N10_40nm": { "test_name": "micro/bm_dag4_mod/k6_N10_40nm", @@ -1602,13 +1602,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_dag4_mod/k6_N10_mem32K_40nm", @@ -1623,13 +1623,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_dag4_mod/no_arch": { "test_name": "micro/bm_dag4_mod/no_arch", @@ -1643,12 +1643,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 3, - "logic element": 21, + "logic element": 13, "latch": 13, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 21, - "Total Node": 35 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 13, + "Total Node": 27 }, "micro/bm_DL_16_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1662,12 +1662,12 @@ "synthesis_time(ms)": 82.4, "Pi": 20, "Po": 1, - "logic element": 29, + "logic element": 25, "generic logic size": 4, "Longest Path": 10, "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 29 + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/k6_N10_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_N10_40nm", @@ -1681,12 +1681,12 @@ "synthesis_time(ms)": 96.6, "Pi": 20, "Po": 1, - "logic element": 29, + "logic element": 25, "generic logic size": 6, "Longest Path": 10, "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 29 + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_16_1_mux/k6_N10_mem32K_40nm", @@ -1700,12 +1700,12 @@ "synthesis_time(ms)": 76.7, "Pi": 20, "Po": 1, - "logic element": 29, + "logic element": 25, "generic logic size": 6, "Longest Path": 10, "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 29 + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_16_1_mux/no_arch": { "test_name": "micro/bm_DL_16_1_mux/no_arch", @@ -1718,11 +1718,11 @@ "synthesis_time(ms)": 79.4, "Pi": 20, "Po": 1, - "logic element": 29, + "logic element": 25, "Longest Path": 10, "Average Path": 5, - "Estimated LUTs": 29, - "Total Node": 29 + "Estimated LUTs": 25, + "Total Node": 25 }, "micro/bm_DL_2_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_2_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1810,12 +1810,12 @@ "synthesis_time(ms)": 57, "Pi": 3, "Po": 4, - "logic element": 25, + "logic element": 22, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 25, - "Total Node": 25 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/k6_N10_40nm": { "test_name": "micro/bm_DL_2_4_encoder/k6_N10_40nm", @@ -1829,12 +1829,12 @@ "synthesis_time(ms)": 72.2, "Pi": 3, "Po": 4, - "logic element": 25, + "logic element": 22, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 25, - "Total Node": 25 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_2_4_encoder/k6_N10_mem32K_40nm", @@ -1848,12 +1848,12 @@ "synthesis_time(ms)": 53.8, "Pi": 3, "Po": 4, - "logic element": 25, + "logic element": 22, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 25, - "Total Node": 25 + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_4_encoder/no_arch": { "test_name": "micro/bm_DL_2_4_encoder/no_arch", @@ -1866,11 +1866,11 @@ "synthesis_time(ms)": 61.7, "Pi": 3, "Po": 4, - "logic element": 25, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 25, - "Total Node": 25 + "logic element": 22, + "Longest Path": 9, + "Average Path": 7, + "Estimated LUTs": 22, + "Total Node": 22 }, "micro/bm_DL_2_cascaded_flip_flops/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_2_cascaded_flip_flops/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1958,12 +1958,12 @@ "synthesis_time(ms)": 100.8, "Pi": 5, "Po": 16, - "logic element": 125, + "logic element": 92, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 125, - "Total Node": 125 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/k6_N10_40nm": { "test_name": "micro/bm_DL_4_16_encoder/k6_N10_40nm", @@ -1977,12 +1977,12 @@ "synthesis_time(ms)": 99.1, "Pi": 5, "Po": 16, - "logic element": 125, + "logic element": 92, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 125, - "Total Node": 125 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_4_16_encoder/k6_N10_mem32K_40nm", @@ -1996,12 +1996,12 @@ "synthesis_time(ms)": 104.6, "Pi": 5, "Po": 16, - "logic element": 125, + "logic element": 92, "generic logic size": 6, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 125, - "Total Node": 125 + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_16_encoder/no_arch": { "test_name": "micro/bm_DL_4_16_encoder/no_arch", @@ -2014,11 +2014,11 @@ "synthesis_time(ms)": 108.5, "Pi": 5, "Po": 16, - "logic element": 125, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 125, - "Total Node": 125 + "logic element": 92, + "Longest Path": 15, + "Average Path": 10, + "Estimated LUTs": 92, + "Total Node": 92 }, "micro/bm_DL_4_1_mux/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_1_mux/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2106,12 +2106,12 @@ "synthesis_time(ms)": 52.7, "Pi": 8, "Po": 3, - "logic element": 27, + "logic element": 33, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 27 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/k6_N10_40nm": { "test_name": "micro/bm_DL_4_bit_comparator/k6_N10_40nm", @@ -2125,12 +2125,12 @@ "synthesis_time(ms)": 55.9, "Pi": 8, "Po": 3, - "logic element": 27, + "logic element": 33, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 27 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_4_bit_comparator/k6_N10_mem32K_40nm", @@ -2144,12 +2144,12 @@ "synthesis_time(ms)": 47, "Pi": 8, "Po": 3, - "logic element": 27, + "logic element": 33, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 27 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_comparator/no_arch": { "test_name": "micro/bm_DL_4_bit_comparator/no_arch", @@ -2162,11 +2162,11 @@ "synthesis_time(ms)": 53.1, "Pi": 8, "Po": 3, - "logic element": 27, - "Longest Path": 8, - "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 27 + "logic element": 33, + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 33, + "Total Node": 33 }, "micro/bm_DL_4_bit_shift_register/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_4_bit_shift_register/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2262,13 +2262,13 @@ "synthesis_time(ms)": 95.5, "Pi": 11, "Po": 4, - "logic element": 87, + "logic element": 89, "Adder": 15, "generic logic size": 4, "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 87, - "Total Node": 102 + "Average Path": 8, + "Estimated LUTs": 89, + "Total Node": 104 }, "micro/bm_DL_74381_ALU/k6_N10_40nm": { "test_name": "micro/bm_DL_74381_ALU/k6_N10_40nm", @@ -2282,12 +2282,12 @@ "synthesis_time(ms)": 94.9, "Pi": 11, "Po": 4, - "logic element": 108, + "logic element": 110, "generic logic size": 6, "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 108, - "Total Node": 108 + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_74381_ALU/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_74381_ALU/k6_N10_mem32K_40nm", @@ -2301,12 +2301,12 @@ "synthesis_time(ms)": 78.3, "Pi": 11, "Po": 4, - "logic element": 108, + "logic element": 110, "generic logic size": 6, "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 108, - "Total Node": 108 + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_74381_ALU/no_arch": { "test_name": "micro/bm_DL_74381_ALU/no_arch", @@ -2319,11 +2319,11 @@ "synthesis_time(ms)": 95.5, "Pi": 11, "Po": 4, - "logic element": 108, + "logic element": 110, "Longest Path": 11, - "Average Path": 6, - "Estimated LUTs": 108, - "Total Node": 108 + "Average Path": 8, + "Estimated LUTs": 110, + "Total Node": 110 }, "micro/bm_DL_BCD_7_segment_without_x/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2337,12 +2337,12 @@ "synthesis_time(ms)": 75.6, "Pi": 4, "Po": 7, - "logic element": 71, + "logic element": 61, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 71, - "Total Node": 71 + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/k6_N10_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_N10_40nm", @@ -2356,12 +2356,12 @@ "synthesis_time(ms)": 103.4, "Pi": 4, "Po": 7, - "logic element": 71, + "logic element": 61, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 71, - "Total Node": 71 + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/k6_N10_mem32K_40nm", @@ -2375,12 +2375,12 @@ "synthesis_time(ms)": 83.9, "Pi": 4, "Po": 7, - "logic element": 71, + "logic element": 61, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 71, - "Total Node": 71 + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_7_segment_without_x/no_arch": { "test_name": "micro/bm_DL_BCD_7_segment_without_x/no_arch", @@ -2393,11 +2393,11 @@ "synthesis_time(ms)": 93.1, "Pi": 4, "Po": 7, - "logic element": 71, - "Longest Path": 8, - "Average Path": 6, - "Estimated LUTs": 71, - "Total Node": 71 + "logic element": 61, + "Longest Path": 11, + "Average Path": 7, + "Estimated LUTs": 61, + "Total Node": 61 }, "micro/bm_DL_BCD_adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2411,13 +2411,13 @@ "synthesis_time(ms)": 124.4, "Pi": 9, "Po": 10, - "logic element": 15, + "logic element": 9, "Adder": 17, "generic logic size": 4, - "Longest Path": 15, + "Longest Path": 12, "Average Path": 5, - "Estimated LUTs": 15, - "Total Node": 32 + "Estimated LUTs": 9, + "Total Node": 26 }, "micro/bm_DL_BCD_adder/k6_N10_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_N10_40nm", @@ -2431,12 +2431,12 @@ "synthesis_time(ms)": 79.5, "Pi": 9, "Po": 10, - "logic element": 40, + "logic element": 34, "generic logic size": 6, - "Longest Path": 14, + "Longest Path": 11, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 40 + "Estimated LUTs": 34, + "Total Node": 34 }, "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm", @@ -2450,12 +2450,12 @@ "synthesis_time(ms)": 81, "Pi": 9, "Po": 10, - "logic element": 40, + "logic element": 34, "generic logic size": 6, - "Longest Path": 14, + "Longest Path": 11, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 40 + "Estimated LUTs": 34, + "Total Node": 34 }, "micro/bm_DL_BCD_adder/no_arch": { "test_name": "micro/bm_DL_BCD_adder/no_arch", @@ -2468,11 +2468,11 @@ "synthesis_time(ms)": 79.7, "Pi": 9, "Po": 10, - "logic element": 40, - "Longest Path": 14, + "logic element": 34, + "Longest Path": 11, "Average Path": 5, - "Estimated LUTs": 40, - "Total Node": 40 + "Estimated LUTs": 34, + "Total Node": 34 }, "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2715,12 +2715,12 @@ "synthesis_time(ms)": 77.6, "Pi": 9, "Po": 5, - "logic element": 44, + "logic element": 28, "generic logic size": 4, "Longest Path": 14, - "Average Path": 6, - "Estimated LUTs": 44, - "Total Node": 44 + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_40nm": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_40nm", @@ -2734,12 +2734,12 @@ "synthesis_time(ms)": 68.5, "Pi": 9, "Po": 5, - "logic element": 44, + "logic element": 28, "generic logic size": 6, "Longest Path": 14, - "Average Path": 6, - "Estimated LUTs": 44, - "Total Node": 44 + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/k6_N10_mem32K_40nm", @@ -2753,12 +2753,12 @@ "synthesis_time(ms)": 98.9, "Pi": 9, "Po": 5, - "logic element": 44, + "logic element": 28, "generic logic size": 6, "Longest Path": 14, - "Average Path": 6, - "Estimated LUTs": 44, - "Total Node": 44 + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_four_bit_adder_continuous_assign/no_arch": { "test_name": "micro/bm_DL_four_bit_adder_continuous_assign/no_arch", @@ -2771,11 +2771,11 @@ "synthesis_time(ms)": 82.3, "Pi": 9, "Po": 5, - "logic element": 44, + "logic element": 28, "Longest Path": 14, - "Average Path": 6, - "Estimated LUTs": 44, - "Total Node": 44 + "Average Path": 5, + "Estimated LUTs": 28, + "Total Node": 28 }, "micro/bm_DL_logic_w_Dff2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_logic_w_Dff2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3102,14 +3102,14 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 1393, - "latch": 427, - "Adder": 131, + "logic element": 1017, + "latch": 336, + "Adder": 98, "generic logic size": 4, - "Longest Path": 41, + "Longest Path": 38, "Average Path": 3, - "Estimated LUTs": 1553, - "Total Node": 1952 + "Estimated LUTs": 1017, + "Total Node": 1452 }, "micro/bm_expr_all_mod/k6_N10_40nm": { "test_name": "micro/bm_expr_all_mod/k6_N10_40nm", @@ -3124,13 +3124,13 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 1643, - "latch": 427, + "logic element": 1204, + "latch": 336, "generic logic size": 6, - "Longest Path": 41, + "Longest Path": 37, "Average Path": 3, - "Estimated LUTs": 1739, - "Total Node": 2071 + "Estimated LUTs": 1204, + "Total Node": 1541 }, "micro/bm_expr_all_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_expr_all_mod/k6_N10_mem32K_40nm", @@ -3145,13 +3145,13 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 1643, - "latch": 427, + "logic element": 1204, + "latch": 336, "generic logic size": 6, - "Longest Path": 41, + "Longest Path": 37, "Average Path": 3, - "Estimated LUTs": 1739, - "Total Node": 2071 + "Estimated LUTs": 1204, + "Total Node": 1541 }, "micro/bm_expr_all_mod/no_arch": { "test_name": "micro/bm_expr_all_mod/no_arch", @@ -3165,12 +3165,12 @@ "Latch Drivers": 1, "Pi": 161, "Po": 555, - "logic element": 1643, - "latch": 427, - "Longest Path": 41, + "logic element": 1204, + "latch": 336, + "Longest Path": 37, "Average Path": 3, - "Estimated LUTs": 1643, - "Total Node": 2071 + "Estimated LUTs": 1204, + "Total Node": 1541 }, "micro/bm_functional_test/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_functional_test/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3185,15 +3185,15 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 393, + "logic element": 414, "latch": 25, "Adder": 47, - "Multiplier": 2, + "Multiplier": 1, "generic logic size": 4, - "Longest Path": 26, - "Average Path": 3, - "Estimated LUTs": 427, - "Total Node": 468 + "Longest Path": 34, + "Average Path": 4, + "Estimated LUTs": 414, + "Total Node": 488 }, "micro/bm_functional_test/k6_N10_40nm": { "test_name": "micro/bm_functional_test/k6_N10_40nm", @@ -3208,13 +3208,13 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 838, + "logic element": 676, "latch": 25, "generic logic size": 6, - "Longest Path": 43, - "Average Path": 3, - "Estimated LUTs": 869, - "Total Node": 864 + "Longest Path": 76, + "Average Path": 4, + "Estimated LUTs": 676, + "Total Node": 702 }, "micro/bm_functional_test/k6_N10_mem32K_40nm": { "test_name": "micro/bm_functional_test/k6_N10_mem32K_40nm", @@ -3229,14 +3229,14 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 472, + "logic element": 493, "latch": 25, - "Multiplier": 2, + "Multiplier": 1, "generic logic size": 6, - "Longest Path": 43, - "Average Path": 3, - "Estimated LUTs": 503, - "Total Node": 500 + "Longest Path": 57, + "Average Path": 4, + "Estimated LUTs": 493, + "Total Node": 520 }, "micro/bm_functional_test/no_arch": { "test_name": "micro/bm_functional_test/no_arch", @@ -3250,12 +3250,12 @@ "Latch Drivers": 1, "Pi": 33, "Po": 40, - "logic element": 838, + "logic element": 676, "latch": 25, - "Longest Path": 43, - "Average Path": 3, - "Estimated LUTs": 838, - "Total Node": 864 + "Longest Path": 76, + "Average Path": 4, + "Estimated LUTs": 676, + "Total Node": 702 }, "micro/bm_if_collapse/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_collapse/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3270,13 +3270,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 27, + "logic element": 21, "latch": 9, "generic logic size": 4, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 37 + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/k6_N10_40nm": { "test_name": "micro/bm_if_collapse/k6_N10_40nm", @@ -3291,13 +3291,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 27, + "logic element": 21, "latch": 9, "generic logic size": 6, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 37 + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/k6_N10_mem32K_40nm": { "test_name": "micro/bm_if_collapse/k6_N10_mem32K_40nm", @@ -3312,13 +3312,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 27, + "logic element": 21, "latch": 9, "generic logic size": 6, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 37 + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_collapse/no_arch": { "test_name": "micro/bm_if_collapse/no_arch", @@ -3332,12 +3332,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 27, + "logic element": 21, "latch": 9, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 27, - "Total Node": 37 + "Estimated LUTs": 21, + "Total Node": 31 }, "micro/bm_if_common/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_common/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3352,13 +3352,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 24, + "logic element": 18, "latch": 9, "generic logic size": 4, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 24, - "Total Node": 34 + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/k6_N10_40nm": { "test_name": "micro/bm_if_common/k6_N10_40nm", @@ -3373,13 +3373,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 24, + "logic element": 18, "latch": 9, "generic logic size": 6, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 24, - "Total Node": 34 + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/k6_N10_mem32K_40nm": { "test_name": "micro/bm_if_common/k6_N10_mem32K_40nm", @@ -3394,13 +3394,13 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 24, + "logic element": 18, "latch": 9, "generic logic size": 6, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 24, - "Total Node": 34 + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_common/no_arch": { "test_name": "micro/bm_if_common/no_arch", @@ -3414,12 +3414,12 @@ "Latch Drivers": 1, "Pi": 6, "Po": 5, - "logic element": 24, + "logic element": 18, "latch": 9, "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 24, - "Total Node": 34 + "Estimated LUTs": 18, + "Total Node": 28 }, "micro/bm_if_reset/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_if_reset/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3515,13 +3515,13 @@ "synthesis_time(ms)": 258.5, "Pi": 64, "Po": 256, - "logic element": 737, + "logic element": 513, "Adder": 99, "generic logic size": 4, - "Longest Path": 38, - "Average Path": 4, - "Estimated LUTs": 807, - "Total Node": 836 + "Longest Path": 36, + "Average Path": 5, + "Estimated LUTs": 513, + "Total Node": 612 }, "micro/bm_lpm_all/k6_N10_40nm": { "test_name": "micro/bm_lpm_all/k6_N10_40nm", @@ -3535,12 +3535,12 @@ "synthesis_time(ms)": 234.6, "Pi": 64, "Po": 256, - "logic element": 926, + "logic element": 702, "generic logic size": 6, - "Longest Path": 38, - "Average Path": 4, - "Estimated LUTs": 968, - "Total Node": 926 + "Longest Path": 36, + "Average Path": 5, + "Estimated LUTs": 702, + "Total Node": 702 }, "micro/bm_lpm_all/k6_N10_mem32K_40nm": { "test_name": "micro/bm_lpm_all/k6_N10_mem32K_40nm", @@ -3554,12 +3554,12 @@ "synthesis_time(ms)": 260.5, "Pi": 64, "Po": 256, - "logic element": 926, + "logic element": 702, "generic logic size": 6, - "Longest Path": 38, - "Average Path": 4, - "Estimated LUTs": 968, - "Total Node": 926 + "Longest Path": 36, + "Average Path": 5, + "Estimated LUTs": 702, + "Total Node": 702 }, "micro/bm_lpm_all/no_arch": { "test_name": "micro/bm_lpm_all/no_arch", @@ -3572,11 +3572,11 @@ "synthesis_time(ms)": 249.4, "Pi": 64, "Po": 256, - "logic element": 926, - "Longest Path": 38, - "Average Path": 4, - "Estimated LUTs": 926, - "Total Node": 926 + "logic element": 702, + "Longest Path": 36, + "Average Path": 5, + "Estimated LUTs": 702, + "Total Node": 702 }, "micro/bm_lpm_concat/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_lpm_concat/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3653,12 +3653,12 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "latch": 72, + "latch": 70, "Multiplier": 3, "generic logic size": 4, "Longest Path": 4, "Average Path": 3, - "Total Node": 76 + "Total Node": 74 }, "micro/bm_match1_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match1_str_arch/k6_N10_40nm", @@ -3674,12 +3674,12 @@ "Pi": 88, "Po": 144, "logic element": 1864, - "latch": 72, + "latch": 70, "generic logic size": 6, "Longest Path": 73, "Average Path": 5, "Estimated LUTs": 1864, - "Total Node": 1937 + "Total Node": 1935 }, "micro/bm_match1_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match1_str_arch/k6_N10_mem32K_40nm", @@ -3694,12 +3694,12 @@ "Latch Drivers": 1, "Pi": 88, "Po": 144, - "latch": 72, + "latch": 70, "Multiplier": 3, "generic logic size": 6, "Longest Path": 4, "Average Path": 3, - "Total Node": 76 + "Total Node": 74 }, "micro/bm_match1_str_arch/no_arch": { "test_name": "micro/bm_match1_str_arch/no_arch", @@ -3714,11 +3714,11 @@ "Pi": 88, "Po": 144, "logic element": 1864, - "latch": 72, + "latch": 70, "Longest Path": 73, "Average Path": 5, "Estimated LUTs": 1864, - "Total Node": 1937 + "Total Node": 1935 }, "micro/bm_match2_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match2_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3899,13 +3899,13 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "latch": 108, - "Adder": 74, + "latch": 53, + "Adder": 41, "Multiplier": 3, "generic logic size": 4, - "Longest Path": 41, + "Longest Path": 25, "Average Path": 3, - "Total Node": 186 + "Total Node": 98 }, "micro/bm_match4_str_arch/k6_N10_40nm": { "test_name": "micro/bm_match4_str_arch/k6_N10_40nm", @@ -3920,13 +3920,13 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 763, - "latch": 108, + "logic element": 697, + "latch": 53, "generic logic size": 6, - "Longest Path": 48, - "Average Path": 4, - "Estimated LUTs": 763, - "Total Node": 872 + "Longest Path": 32, + "Average Path": 3, + "Estimated LUTs": 697, + "Total Node": 751 }, "micro/bm_match4_str_arch/k6_N10_mem32K_40nm": { "test_name": "micro/bm_match4_str_arch/k6_N10_mem32K_40nm", @@ -3941,14 +3941,14 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 142, - "latch": 108, + "logic element": 76, + "latch": 53, "Multiplier": 3, "generic logic size": 6, - "Longest Path": 41, + "Longest Path": 25, "Average Path": 3, - "Estimated LUTs": 142, - "Total Node": 254 + "Estimated LUTs": 76, + "Total Node": 133 }, "micro/bm_match4_str_arch/no_arch": { "test_name": "micro/bm_match4_str_arch/no_arch", @@ -3962,12 +3962,12 @@ "Latch Drivers": 1, "Pi": 51, "Po": 216, - "logic element": 763, - "latch": 108, - "Longest Path": 48, - "Average Path": 4, - "Estimated LUTs": 763, - "Total Node": 872 + "logic element": 697, + "latch": 53, + "Longest Path": 32, + "Average Path": 3, + "Estimated LUTs": 697, + "Total Node": 751 }, "micro/bm_match5_str_arch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_match5_str_arch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4366,13 +4366,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 114, - "latch": 9, + "logic element": 67, + "latch": 8, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 116, - "Total Node": 124 + "Estimated LUTs": 67, + "Total Node": 76 }, "micro/bm_stmt_all_mod/k6_N10_40nm": { "test_name": "micro/bm_stmt_all_mod/k6_N10_40nm", @@ -4387,13 +4387,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 114, - "latch": 9, + "logic element": 67, + "latch": 8, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 114, - "Total Node": 124 + "Estimated LUTs": 67, + "Total Node": 76 }, "micro/bm_stmt_all_mod/k6_N10_mem32K_40nm": { "test_name": "micro/bm_stmt_all_mod/k6_N10_mem32K_40nm", @@ -4408,13 +4408,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 114, - "latch": 9, + "logic element": 67, + "latch": 8, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 114, - "Total Node": 124 + "Estimated LUTs": 67, + "Total Node": 76 }, "micro/bm_stmt_all_mod/no_arch": { "test_name": "micro/bm_stmt_all_mod/no_arch", @@ -4428,12 +4428,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 25, - "logic element": 114, - "latch": 9, - "Longest Path": 9, + "logic element": 67, + "latch": 8, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 114, - "Total Node": 124 + "Estimated LUTs": 67, + "Total Node": 76 }, "micro/bm_stmt_compare_padding/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4448,13 +4448,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 55, - "latch": 7, + "logic element": 40, + "latch": 6, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 63 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 40, + "Total Node": 47 }, "micro/bm_stmt_compare_padding/k6_N10_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_N10_40nm", @@ -4469,13 +4469,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 55, - "latch": 7, + "logic element": 40, + "latch": 6, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 63 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 40, + "Total Node": 47 }, "micro/bm_stmt_compare_padding/k6_N10_mem32K_40nm": { "test_name": "micro/bm_stmt_compare_padding/k6_N10_mem32K_40nm", @@ -4490,13 +4490,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 55, - "latch": 7, + "logic element": 40, + "latch": 6, "generic logic size": 6, - "Longest Path": 8, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 63 + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 40, + "Total Node": 47 }, "micro/bm_stmt_compare_padding/no_arch": { "test_name": "micro/bm_stmt_compare_padding/no_arch", @@ -4510,12 +4510,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 15, - "logic element": 55, - "latch": 7, - "Longest Path": 8, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 63 + "logic element": 40, + "latch": 6, + "Longest Path": 11, + "Average Path": 4, + "Estimated LUTs": 40, + "Total Node": 47 }, "micro/bm_tester/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_tester/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4530,13 +4530,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 108, + "logic element": 64, "latch": 4, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 110, - "Total Node": 113 + "Longest Path": 10, + "Average Path": 6, + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/k6_N10_40nm": { "test_name": "micro/bm_tester/k6_N10_40nm", @@ -4551,13 +4551,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 108, + "logic element": 64, "latch": 4, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 108, - "Total Node": 113 + "Longest Path": 10, + "Average Path": 6, + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/k6_N10_mem32K_40nm": { "test_name": "micro/bm_tester/k6_N10_mem32K_40nm", @@ -4572,13 +4572,13 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 108, + "logic element": 64, "latch": 4, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 108, - "Total Node": 113 + "Longest Path": 10, + "Average Path": 6, + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/bm_tester/no_arch": { "test_name": "micro/bm_tester/no_arch", @@ -4592,12 +4592,12 @@ "Latch Drivers": 1, "Pi": 4, "Po": 4, - "logic element": 108, + "logic element": 64, "latch": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 108, - "Total Node": 113 + "Longest Path": 10, + "Average Path": 6, + "Estimated LUTs": 64, + "Total Node": 69 }, "micro/case_generate/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/case_generate/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4752,14 +4752,14 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 34, + "logic element": 17, "latch": 16, "Adder": 17, "generic logic size": 4, "Longest Path": 21, "Average Path": 4, - "Estimated LUTs": 34, - "Total Node": 68 + "Estimated LUTs": 17, + "Total Node": 51 }, "micro/generate/k6_N10_40nm": { "test_name": "micro/generate/k6_N10_40nm", @@ -4774,13 +4774,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 65, + "logic element": 48, "latch": 16, "generic logic size": 6, - "Longest Path": 66, + "Longest Path": 65, "Average Path": 4, - "Estimated LUTs": 65, - "Total Node": 82 + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/generate/k6_N10_mem32K_40nm": { "test_name": "micro/generate/k6_N10_mem32K_40nm", @@ -4795,13 +4795,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 65, + "logic element": 48, "latch": 16, "generic logic size": 6, - "Longest Path": 66, + "Longest Path": 65, "Average Path": 4, - "Estimated LUTs": 65, - "Total Node": 82 + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/generate/no_arch": { "test_name": "micro/generate/no_arch", @@ -4815,12 +4815,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 16, - "logic element": 65, + "logic element": 48, "latch": 16, - "Longest Path": 66, + "Longest Path": 65, "Average Path": 4, - "Estimated LUTs": 65, - "Total Node": 82 + "Estimated LUTs": 48, + "Total Node": 65 }, "micro/hard_adder_cin_propagation/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/hard_adder_cin_propagation/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/simulation_result.json index 3eda7d1c431..c70026b3192 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/simulation_result.json @@ -10,13 +10,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_and/k6_N10_40nm": { "test_name": "operators/binary_and/k6_N10_40nm", @@ -29,13 +29,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_and/k6_N10_mem32K_40nm": { "test_name": "operators/binary_and/k6_N10_mem32K_40nm", @@ -48,13 +48,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_and/no_arch": { "test_name": "operators/binary_and/no_arch", @@ -66,12 +66,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -84,13 +84,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 4, "latch": 1, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_equal/k6_N10_40nm": { "test_name": "operators/binary_equal/k6_N10_40nm", @@ -103,13 +103,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_equal/k6_N10_mem32K_40nm", @@ -122,13 +122,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_equal/no_arch": { "test_name": "operators/binary_equal/no_arch", @@ -140,12 +140,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 4, "latch": 1, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_logical_and/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_and/k6_frac_N10_frac_chain_mem32K_40nm", @@ -158,13 +158,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_and/k6_N10_40nm": { "test_name": "operators/binary_logical_and/k6_N10_40nm", @@ -177,13 +177,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_and/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_and/k6_N10_mem32K_40nm", @@ -196,13 +196,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_and/no_arch": { "test_name": "operators/binary_logical_and/no_arch", @@ -214,12 +214,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -232,13 +232,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_logical_equal/k6_N10_40nm": { "test_name": "operators/binary_logical_equal/k6_N10_40nm", @@ -251,13 +251,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_logical_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_equal/k6_N10_mem32K_40nm", @@ -270,13 +270,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_logical_equal/no_arch": { "test_name": "operators/binary_logical_equal/no_arch", @@ -288,12 +288,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_logical_greater_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_greater_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -306,13 +306,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 8, + "logic element": 10, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 10, + "Total Node": 12 }, "operators/binary_logical_greater_equal_than/k6_N10_40nm": { "test_name": "operators/binary_logical_greater_equal_than/k6_N10_40nm", @@ -325,13 +325,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 8, + "logic element": 10, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 10, + "Total Node": 12 }, "operators/binary_logical_greater_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_greater_equal_than/k6_N10_mem32K_40nm", @@ -344,13 +344,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 8, + "logic element": 10, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 10, + "Total Node": 12 }, "operators/binary_logical_greater_equal_than/no_arch": { "test_name": "operators/binary_logical_greater_equal_than/no_arch", @@ -362,12 +362,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 8, + "logic element": 10, "latch": 1, - "Longest Path": 8, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 10, + "Total Node": 12 }, "operators/binary_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -380,13 +380,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 9, "latch": 1, "generic logic size": 4, - "Longest Path": 7, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_than/k6_N10_40nm": { "test_name": "operators/binary_logical_greater_than/k6_N10_40nm", @@ -399,13 +399,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 9, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_greater_than/k6_N10_mem32K_40nm", @@ -418,13 +418,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 9, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_than/no_arch": { "test_name": "operators/binary_logical_greater_than/no_arch", @@ -436,12 +436,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 9, "latch": 1, - "Longest Path": 7, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -457,7 +457,7 @@ "logic element": 8, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 9, "Average Path": 4, "Estimated LUTs": 8, "Total Node": 10 @@ -476,7 +476,7 @@ "logic element": 8, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 9, "Average Path": 4, "Estimated LUTs": 8, "Total Node": 10 @@ -495,7 +495,7 @@ "logic element": 8, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 9, "Average Path": 4, "Estimated LUTs": 8, "Total Node": 10 @@ -512,7 +512,7 @@ "Po": 2, "logic element": 8, "latch": 1, - "Longest Path": 8, + "Longest Path": 9, "Average Path": 4, "Estimated LUTs": 8, "Total Node": 10 @@ -528,13 +528,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 7, "latch": 1, "generic logic size": 4, - "Longest Path": 7, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_than/k6_N10_40nm": { "test_name": "operators/binary_logical_less_than/k6_N10_40nm", @@ -547,13 +547,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 7, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_less_than/k6_N10_mem32K_40nm", @@ -566,13 +566,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 7, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_than/no_arch": { "test_name": "operators/binary_logical_less_than/no_arch", @@ -584,12 +584,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 7, "latch": 1, - "Longest Path": 7, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_not_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_not_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -602,13 +602,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_not_equal/k6_N10_40nm": { "test_name": "operators/binary_logical_not_equal/k6_N10_40nm", @@ -621,13 +621,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_not_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_not_equal/k6_N10_mem32K_40nm", @@ -640,13 +640,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_not_equal/no_arch": { "test_name": "operators/binary_logical_not_equal/no_arch", @@ -658,12 +658,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 3, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_or/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_or/k6_frac_N10_frac_chain_mem32K_40nm", @@ -676,13 +676,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_or/k6_N10_40nm": { "test_name": "operators/binary_logical_or/k6_N10_40nm", @@ -695,13 +695,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_or/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_or/k6_N10_mem32K_40nm", @@ -714,13 +714,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_or/no_arch": { "test_name": "operators/binary_logical_or/no_arch", @@ -732,12 +732,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_nand/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_nand/k6_frac_N10_frac_chain_mem32K_40nm", @@ -750,13 +750,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nand/k6_N10_40nm": { "test_name": "operators/binary_nand/k6_N10_40nm", @@ -769,13 +769,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nand/k6_N10_mem32K_40nm": { "test_name": "operators/binary_nand/k6_N10_mem32K_40nm", @@ -788,13 +788,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nand/no_arch": { "test_name": "operators/binary_nand/no_arch", @@ -806,12 +806,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nor/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_nor/k6_frac_N10_frac_chain_mem32K_40nm", @@ -824,13 +824,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nor/k6_N10_40nm": { "test_name": "operators/binary_nor/k6_N10_40nm", @@ -843,13 +843,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nor/k6_N10_mem32K_40nm": { "test_name": "operators/binary_nor/k6_N10_mem32K_40nm", @@ -862,13 +862,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_nor/no_arch": { "test_name": "operators/binary_nor/no_arch", @@ -880,12 +880,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 5, + "logic element": 4, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 5, - "Total Node": 7 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_not_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_not_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -898,13 +898,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_not_equal/k6_N10_40nm": { "test_name": "operators/binary_not_equal/k6_N10_40nm", @@ -917,13 +917,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_not_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_not_equal/k6_N10_mem32K_40nm", @@ -936,13 +936,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_not_equal/no_arch": { "test_name": "operators/binary_not_equal/no_arch", @@ -954,12 +954,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 9, + "logic element": 3, "latch": 1, - "Longest Path": 9, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 11 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_or/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_or/k6_frac_N10_frac_chain_mem32K_40nm", @@ -972,13 +972,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_or/k6_N10_40nm": { "test_name": "operators/binary_or/k6_N10_40nm", @@ -991,13 +991,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_or/k6_N10_mem32K_40nm": { "test_name": "operators/binary_or/k6_N10_mem32K_40nm", @@ -1010,13 +1010,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_or/no_arch": { "test_name": "operators/binary_or/no_arch", @@ -1028,12 +1028,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xnor/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_xnor/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1046,13 +1046,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_xnor/k6_N10_40nm": { "test_name": "operators/binary_xnor/k6_N10_40nm", @@ -1065,13 +1065,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_xnor/k6_N10_mem32K_40nm": { "test_name": "operators/binary_xnor/k6_N10_mem32K_40nm", @@ -1084,13 +1084,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_xnor/no_arch": { "test_name": "operators/binary_xnor/no_arch", @@ -1102,12 +1102,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 4, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 6, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 6 }, "operators/binary_xor/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_xor/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1120,13 +1120,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xor/k6_N10_40nm": { "test_name": "operators/binary_xor/k6_N10_40nm", @@ -1139,13 +1139,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xor/k6_N10_mem32K_40nm": { "test_name": "operators/binary_xor/k6_N10_mem32K_40nm", @@ -1158,13 +1158,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xor/no_arch": { "test_name": "operators/binary_xor/no_arch", @@ -1176,12 +1176,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 3, "latch": 1, - "Longest Path": 7, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 8 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/clog2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/clog2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1194,13 +1194,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/clog2/k6_N10_40nm": { "test_name": "operators/clog2/k6_N10_40nm", @@ -1213,13 +1213,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/clog2/k6_N10_mem32K_40nm": { "test_name": "operators/clog2/k6_N10_mem32K_40nm", @@ -1232,13 +1232,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/clog2/no_arch": { "test_name": "operators/clog2/no_arch", @@ -1250,12 +1250,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 5 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/concat/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/concat/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1267,12 +1267,12 @@ "test_coverage(%)": 100, "Pi": 24, "Po": 72, - "logic element": 122, + "logic element": 106, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 9, "Average Path": 4, - "Estimated LUTs": 128, - "Total Node": 122 + "Estimated LUTs": 106, + "Total Node": 106 }, "operators/concat/k6_N10_40nm": { "test_name": "operators/concat/k6_N10_40nm", @@ -1284,12 +1284,12 @@ "test_coverage(%)": 100, "Pi": 24, "Po": 72, - "logic element": 122, + "logic element": 106, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 9, "Average Path": 4, - "Estimated LUTs": 127, - "Total Node": 122 + "Estimated LUTs": 106, + "Total Node": 106 }, "operators/concat/k6_N10_mem32K_40nm": { "test_name": "operators/concat/k6_N10_mem32K_40nm", @@ -1301,12 +1301,12 @@ "test_coverage(%)": 100, "Pi": 24, "Po": 72, - "logic element": 122, + "logic element": 106, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 9, "Average Path": 4, - "Estimated LUTs": 127, - "Total Node": 122 + "Estimated LUTs": 106, + "Total Node": 106 }, "operators/concat/no_arch": { "test_name": "operators/concat/no_arch", @@ -1317,11 +1317,11 @@ "test_coverage(%)": 100, "Pi": 24, "Po": 72, - "logic element": 122, - "Longest Path": 6, + "logic element": 106, + "Longest Path": 9, "Average Path": 4, - "Estimated LUTs": 122, - "Total Node": 122 + "Estimated LUTs": 106, + "Total Node": 106 }, "operators/eightbit_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/eightbit_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1334,14 +1334,14 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 8, "latch": 8, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 16, - "Total Node": 26 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 8, + "Total Node": 18 }, "operators/eightbit_arithmetic_power/k6_N10_40nm": { "test_name": "operators/eightbit_arithmetic_power/k6_N10_40nm", @@ -1354,13 +1354,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 101, + "logic element": 93, "latch": 8, "generic logic size": 6, - "Longest Path": 19, - "Average Path": 5, - "Estimated LUTs": 101, - "Total Node": 110 + "Longest Path": 18, + "Average Path": 4, + "Estimated LUTs": 93, + "Total Node": 102 }, "operators/eightbit_arithmetic_power/k6_N10_mem32K_40nm": { "test_name": "operators/eightbit_arithmetic_power/k6_N10_mem32K_40nm", @@ -1373,14 +1373,14 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 8, "latch": 8, "Multiplier": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 16, - "Total Node": 26 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 8, + "Total Node": 18 }, "operators/eightbit_arithmetic_power/no_arch": { "test_name": "operators/eightbit_arithmetic_power/no_arch", @@ -1392,12 +1392,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 101, + "logic element": 93, "latch": 8, - "Longest Path": 19, - "Average Path": 5, - "Estimated LUTs": 101, - "Total Node": 110 + "Longest Path": 18, + "Average Path": 4, + "Estimated LUTs": 93, + "Total Node": 102 }, "operators/minuscolon_6_bit/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/minuscolon_6_bit/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1409,12 +1409,12 @@ "test_coverage(%)": 100, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/minuscolon_6_bit/k6_N10_40nm": { "test_name": "operators/minuscolon_6_bit/k6_N10_40nm", @@ -1426,12 +1426,12 @@ "test_coverage(%)": 100, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/minuscolon_6_bit/k6_N10_mem32K_40nm": { "test_name": "operators/minuscolon_6_bit/k6_N10_mem32K_40nm", @@ -1443,12 +1443,12 @@ "test_coverage(%)": 100, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/minuscolon_6_bit/no_arch": { "test_name": "operators/minuscolon_6_bit/no_arch", @@ -1459,11 +1459,11 @@ "test_coverage(%)": 100, "Pi": 12, "Po": 6, - "logic element": 12, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/pluscolon_6_bit/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/pluscolon_6_bit/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1475,12 +1475,12 @@ "test_coverage(%)": 73.5, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/pluscolon_6_bit/k6_N10_40nm": { "test_name": "operators/pluscolon_6_bit/k6_N10_40nm", @@ -1492,12 +1492,12 @@ "test_coverage(%)": 73.5, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/pluscolon_6_bit/k6_N10_mem32K_40nm": { "test_name": "operators/pluscolon_6_bit/k6_N10_mem32K_40nm", @@ -1509,12 +1509,12 @@ "test_coverage(%)": 73.5, "Pi": 12, "Po": 6, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/pluscolon_6_bit/no_arch": { "test_name": "operators/pluscolon_6_bit/no_arch", @@ -1525,11 +1525,11 @@ "test_coverage(%)": 73.5, "Pi": 12, "Po": 6, - "logic element": 12, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/pluscolon_8_bit/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/pluscolon_8_bit/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1541,12 +1541,12 @@ "test_coverage(%)": 100, "Pi": 14, "Po": 8, - "logic element": 16, + "logic element": 8, "generic logic size": 4, "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Average Path": 3, + "Estimated LUTs": 8, + "Total Node": 8 }, "operators/pluscolon_8_bit/k6_N10_40nm": { "test_name": "operators/pluscolon_8_bit/k6_N10_40nm", @@ -1558,12 +1558,12 @@ "test_coverage(%)": 100, "Pi": 14, "Po": 8, - "logic element": 16, + "logic element": 8, "generic logic size": 6, "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Average Path": 3, + "Estimated LUTs": 8, + "Total Node": 8 }, "operators/pluscolon_8_bit/k6_N10_mem32K_40nm": { "test_name": "operators/pluscolon_8_bit/k6_N10_mem32K_40nm", @@ -1575,12 +1575,12 @@ "test_coverage(%)": 100, "Pi": 14, "Po": 8, - "logic element": 16, + "logic element": 8, "generic logic size": 6, "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Average Path": 3, + "Estimated LUTs": 8, + "Total Node": 8 }, "operators/pluscolon_8_bit/no_arch": { "test_name": "operators/pluscolon_8_bit/no_arch", @@ -1591,11 +1591,11 @@ "test_coverage(%)": 100, "Pi": 14, "Po": 8, - "logic element": 16, + "logic element": 8, "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Average Path": 3, + "Estimated LUTs": 8, + "Total Node": 8 }, "operators/signed_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3027,12 +3027,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_int_wide/k6_N10_40nm", @@ -3044,12 +3044,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_int_wide/k6_N10_mem32K_40nm", @@ -3061,12 +3061,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/no_arch": { "test_name": "operators/signed_variable_asl_int_wide/no_arch", @@ -3077,11 +3077,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3093,12 +3093,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_N10_40nm", @@ -3110,12 +3110,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_N10_mem32K_40nm", @@ -3127,12 +3127,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/no_arch": { "test_name": "operators/signed_variable_asl_ultra_wide/no_arch", @@ -3143,11 +3143,11 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3159,12 +3159,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_N10_40nm", @@ -3176,12 +3176,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_N10_mem32K_40nm", @@ -3193,12 +3193,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/no_arch": { "test_name": "operators/signed_variable_asl_wide/no_arch", @@ -3209,11 +3209,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3225,12 +3225,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asl_wire/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_wire/k6_N10_40nm", @@ -3242,12 +3242,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asl_wire/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wire/k6_N10_mem32K_40nm", @@ -3259,12 +3259,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asl_wire/no_arch": { "test_name": "operators/signed_variable_asl_wire/no_arch", @@ -3275,11 +3275,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asr_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3357,12 +3357,12 @@ "test_coverage(%)": 85, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 156, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 6, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 156, + "Total Node": 156 }, "operators/signed_variable_asr_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_int_wide/k6_N10_40nm", @@ -3374,12 +3374,12 @@ "test_coverage(%)": 85, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 156, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 6, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 156, + "Total Node": 156 }, "operators/signed_variable_asr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_int_wide/k6_N10_mem32K_40nm", @@ -3391,12 +3391,12 @@ "test_coverage(%)": 85, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 156, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 6, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 156, + "Total Node": 156 }, "operators/signed_variable_asr_int_wide/no_arch": { "test_name": "operators/signed_variable_asr_int_wide/no_arch", @@ -3407,11 +3407,11 @@ "test_coverage(%)": 85, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 6, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 156, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 156, + "Total Node": 156 }, "operators/signed_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3423,12 +3423,12 @@ "test_coverage(%)": 99.9, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 449, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 449, + "Total Node": 449 }, "operators/signed_variable_asr_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_N10_40nm", @@ -3440,12 +3440,12 @@ "test_coverage(%)": 99.9, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 449, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 449, + "Total Node": 449 }, "operators/signed_variable_asr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_N10_mem32K_40nm", @@ -3457,12 +3457,12 @@ "test_coverage(%)": 99.9, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 449, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 449, + "Total Node": 449 }, "operators/signed_variable_asr_ultra_wide/no_arch": { "test_name": "operators/signed_variable_asr_ultra_wide/no_arch", @@ -3473,11 +3473,11 @@ "test_coverage(%)": 99.9, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 449, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 449, + "Total Node": 449 }, "operators/signed_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3489,12 +3489,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "generic logic size": 4, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 5, + "generic logic size": 4, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 5, + "Total Node": 5 }, "operators/signed_variable_asr_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_N10_40nm", @@ -3506,12 +3506,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 5, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 5, + "Total Node": 5 }, "operators/signed_variable_asr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_N10_mem32K_40nm", @@ -3523,12 +3523,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 5, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 5, + "Total Node": 5 }, "operators/signed_variable_asr_wide/no_arch": { "test_name": "operators/signed_variable_asr_wide/no_arch", @@ -3539,11 +3539,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 5, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 5, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 5, + "Total Node": 5 }, "operators/signed_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3552,15 +3552,15 @@ "max_rss(MiB)": 65.5, "exec_time(ms)": 111.5, "simulation_time(ms)": 0.4, - "test_coverage(%)": 66.7, - "Pi": 2, + "test_coverage(%)": 75, + "Pi": 1, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asr_wire/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_N10_40nm", @@ -3569,15 +3569,15 @@ "max_rss(MiB)": 48.6, "exec_time(ms)": 19.6, "simulation_time(ms)": 0.5, - "test_coverage(%)": 66.7, - "Pi": 2, + "test_coverage(%)": 75, + "Pi": 1, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asr_wire/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_N10_mem32K_40nm", @@ -3586,15 +3586,15 @@ "max_rss(MiB)": 64.8, "exec_time(ms)": 104.2, "simulation_time(ms)": 0.4, - "test_coverage(%)": 66.7, - "Pi": 2, + "test_coverage(%)": 75, + "Pi": 1, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_asr_wire/no_arch": { "test_name": "operators/signed_variable_asr_wire/no_arch", @@ -3602,14 +3602,14 @@ "max_rss(MiB)": 45.5, "exec_time(ms)": 17.1, "simulation_time(ms)": 0.5, - "test_coverage(%)": 66.7, - "Pi": 2, + "test_coverage(%)": 75, + "Pi": 1, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3687,12 +3687,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_int_wide/k6_N10_40nm", @@ -3704,12 +3704,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_int_wide/k6_N10_mem32K_40nm", @@ -3721,12 +3721,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/no_arch": { "test_name": "operators/signed_variable_sl_int_wide/no_arch", @@ -3737,11 +3737,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3753,12 +3753,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_N10_40nm", @@ -3770,12 +3770,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_N10_mem32K_40nm", @@ -3787,12 +3787,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/no_arch": { "test_name": "operators/signed_variable_sl_ultra_wide/no_arch", @@ -3803,11 +3803,11 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3819,12 +3819,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_N10_40nm", @@ -3836,12 +3836,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_N10_mem32K_40nm", @@ -3853,12 +3853,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/no_arch": { "test_name": "operators/signed_variable_sl_wide/no_arch", @@ -3869,11 +3869,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3885,12 +3885,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sl_wire/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_wire/k6_N10_40nm", @@ -3902,12 +3902,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sl_wire/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wire/k6_N10_mem32K_40nm", @@ -3919,12 +3919,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sl_wire/no_arch": { "test_name": "operators/signed_variable_sl_wire/no_arch", @@ -3935,11 +3935,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sr_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4017,12 +4017,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_int_wide/k6_N10_40nm", @@ -4034,12 +4034,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_int_wide/k6_N10_mem32K_40nm", @@ -4051,12 +4051,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/no_arch": { "test_name": "operators/signed_variable_sr_int_wide/no_arch", @@ -4067,11 +4067,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4083,12 +4083,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_N10_40nm", @@ -4100,12 +4100,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_N10_mem32K_40nm", @@ -4117,12 +4117,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/no_arch": { "test_name": "operators/signed_variable_sr_ultra_wide/no_arch", @@ -4133,11 +4133,11 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4149,12 +4149,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_N10_40nm", @@ -4166,12 +4166,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_N10_mem32K_40nm", @@ -4183,12 +4183,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/no_arch": { "test_name": "operators/signed_variable_sr_wide/no_arch", @@ -4199,11 +4199,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4215,12 +4215,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sr_wire/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_wire/k6_N10_40nm", @@ -4232,12 +4232,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sr_wire/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wire/k6_N10_mem32K_40nm", @@ -4249,12 +4249,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/signed_variable_sr_wire/no_arch": { "test_name": "operators/signed_variable_sr_wire/no_arch", @@ -4265,11 +4265,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/specifyBlock/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/specifyBlock/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4281,12 +4281,12 @@ "test_coverage(%)": 75, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 2, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "operators/specifyBlock/k6_N10_40nm": { "test_name": "operators/specifyBlock/k6_N10_40nm", @@ -4298,12 +4298,12 @@ "test_coverage(%)": 75, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 2, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "operators/specifyBlock/k6_N10_mem32K_40nm": { "test_name": "operators/specifyBlock/k6_N10_mem32K_40nm", @@ -4315,12 +4315,12 @@ "test_coverage(%)": 75, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 2, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "operators/specifyBlock/no_arch": { "test_name": "operators/specifyBlock/no_arch", @@ -4331,11 +4331,11 @@ "test_coverage(%)": 75, "Pi": 2, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "operators/specparam/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/specparam/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4345,12 +4345,12 @@ "exec_time(ms)": 53.1, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/specparam/k6_N10_40nm": { "test_name": "operators/specparam/k6_N10_40nm", @@ -4360,12 +4360,12 @@ "exec_time(ms)": 9.8, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/specparam/k6_N10_mem32K_40nm": { "test_name": "operators/specparam/k6_N10_mem32K_40nm", @@ -4375,12 +4375,12 @@ "exec_time(ms)": 55.2, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/specparam/no_arch": { "test_name": "operators/specparam/no_arch", @@ -4389,11 +4389,11 @@ "exec_time(ms)": 5.9, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/string_test_concat/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/string_test_concat/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4592,14 +4592,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 9, - "logic element": 33, + "logic element": 338, "latch": 8, - "Adder": 19, "generic logic size": 4, - "Longest Path": 28, + "Longest Path": 93, "Average Path": 5, - "Estimated LUTs": 33, - "Total Node": 61 + "Estimated LUTs": 338, + "Total Node": 347 }, "operators/twobits_arithmetic_div/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_div/k6_N10_40nm", @@ -4610,15 +4609,15 @@ "simulation_time(ms)": 19.6, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 116, + "logic element": 338, "latch": 8, "generic logic size": 6, - "Longest Path": 33, + "Longest Path": 93, "Average Path": 5, - "Estimated LUTs": 116, - "Total Node": 125 + "Estimated LUTs": 338, + "Total Node": 347 }, "operators/twobits_arithmetic_div/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_div/k6_N10_mem32K_40nm", @@ -4629,15 +4628,15 @@ "simulation_time(ms)": 16.4, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 116, + "logic element": 338, "latch": 8, "generic logic size": 6, - "Longest Path": 33, + "Longest Path": 93, "Average Path": 5, - "Estimated LUTs": 116, - "Total Node": 125 + "Estimated LUTs": 338, + "Total Node": 347 }, "operators/twobits_arithmetic_div/no_arch": { "test_name": "operators/twobits_arithmetic_div/no_arch", @@ -4647,14 +4646,14 @@ "simulation_time(ms)": 20.7, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 116, + "logic element": 338, "latch": 8, - "Longest Path": 33, + "Longest Path": 93, "Average Path": 5, - "Estimated LUTs": 116, - "Total Node": 125 + "Estimated LUTs": 338, + "Total Node": 347 }, "operators/twobits_arithmetic_minus/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_minus/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4667,14 +4666,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 9, + "logic element": 6, "latch": 3, "Adder": 3, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 16 + "Estimated LUTs": 6, + "Total Node": 13 }, "operators/twobits_arithmetic_minus/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_minus/k6_N10_40nm", @@ -4687,13 +4686,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_minus/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_minus/k6_N10_mem32K_40nm", @@ -4706,13 +4705,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_minus/no_arch": { "test_name": "operators/twobits_arithmetic_minus/no_arch", @@ -4724,12 +4723,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4742,14 +4741,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 13, + "logic element": 55, "latch": 3, - "Adder": 5, "generic logic size": 4, - "Longest Path": 13, + "Longest Path": 29, "Average Path": 4, - "Estimated LUTs": 13, - "Total Node": 22 + "Estimated LUTs": 55, + "Total Node": 59 }, "operators/twobits_arithmetic_mod/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_mod/k6_N10_40nm", @@ -4762,13 +4760,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 42, + "logic element": 55, "latch": 3, "generic logic size": 6, - "Longest Path": 18, - "Average Path": 5, - "Estimated LUTs": 42, - "Total Node": 46 + "Longest Path": 29, + "Average Path": 4, + "Estimated LUTs": 55, + "Total Node": 59 }, "operators/twobits_arithmetic_mod/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_mod/k6_N10_mem32K_40nm", @@ -4781,13 +4779,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 42, + "logic element": 55, "latch": 3, "generic logic size": 6, - "Longest Path": 18, - "Average Path": 5, - "Estimated LUTs": 42, - "Total Node": 46 + "Longest Path": 29, + "Average Path": 4, + "Estimated LUTs": 55, + "Total Node": 59 }, "operators/twobits_arithmetic_mod/no_arch": { "test_name": "operators/twobits_arithmetic_mod/no_arch", @@ -4799,12 +4797,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 42, + "logic element": 55, "latch": 3, - "Longest Path": 18, - "Average Path": 5, - "Estimated LUTs": 42, - "Total Node": 46 + "Longest Path": 29, + "Average Path": 4, + "Estimated LUTs": 55, + "Total Node": 59 }, "operators/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4817,14 +4815,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 9, + "logic element": 5, "latch": 4, "Multiplier": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 15 + "Estimated LUTs": 5, + "Total Node": 11 }, "operators/twobits_arithmetic_multiply/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_multiply/k6_N10_40nm", @@ -4837,13 +4835,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 18, + "logic element": 14, "latch": 4, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 18, - "Total Node": 23 + "Estimated LUTs": 14, + "Total Node": 19 }, "operators/twobits_arithmetic_multiply/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_multiply/k6_N10_mem32K_40nm", @@ -4856,14 +4854,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 9, + "logic element": 5, "latch": 4, "Multiplier": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 15 + "Estimated LUTs": 5, + "Total Node": 11 }, "operators/twobits_arithmetic_multiply/no_arch": { "test_name": "operators/twobits_arithmetic_multiply/no_arch", @@ -4875,12 +4873,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 18, + "logic element": 14, "latch": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 18, - "Total Node": 23 + "Estimated LUTs": 14, + "Total Node": 19 }, "operators/twobits_arithmetic_plus/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_plus/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4893,14 +4891,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 7, + "logic element": 4, "latch": 3, "Adder": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 12 }, "operators/twobits_arithmetic_plus/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_plus/k6_N10_40nm", @@ -4913,13 +4911,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_plus/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_plus/k6_N10_mem32K_40nm", @@ -4932,13 +4930,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_plus/no_arch": { "test_name": "operators/twobits_arithmetic_plus/no_arch", @@ -4950,12 +4948,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4968,14 +4966,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 21, + "logic element": 17, "latch": 4, "Multiplier": 2, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 21, - "Total Node": 28 + "Estimated LUTs": 17, + "Total Node": 24 }, "operators/twobits_arithmetic_power/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_power/k6_N10_40nm", @@ -4988,13 +4986,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 59, + "logic element": 55, "latch": 4, "generic logic size": 6, - "Longest Path": 17, + "Longest Path": 16, "Average Path": 4, - "Estimated LUTs": 59, - "Total Node": 64 + "Estimated LUTs": 55, + "Total Node": 60 }, "operators/twobits_arithmetic_power/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_power/k6_N10_mem32K_40nm", @@ -5007,14 +5005,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 21, + "logic element": 17, "latch": 4, "Multiplier": 2, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 21, - "Total Node": 28 + "Estimated LUTs": 17, + "Total Node": 24 }, "operators/twobits_arithmetic_power/no_arch": { "test_name": "operators/twobits_arithmetic_power/no_arch", @@ -5026,12 +5024,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 5, - "logic element": 59, + "logic element": 55, "latch": 4, - "Longest Path": 17, + "Longest Path": 16, "Average Path": 4, - "Estimated LUTs": 59, - "Total Node": 64 + "Estimated LUTs": 55, + "Total Node": 60 }, "operators/twobits_arithmetic_uminus/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_uminus/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5046,12 +5044,11 @@ "Po": 4, "logic element": 9, "latch": 3, - "Adder": 3, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, "Estimated LUTs": 9, - "Total Node": 16 + "Total Node": 13 }, "operators/twobits_arithmetic_uminus/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_uminus/k6_N10_40nm", @@ -5064,13 +5061,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_uminus/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_uminus/k6_N10_mem32K_40nm", @@ -5083,13 +5080,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_arithmetic_uminus/no_arch": { "test_name": "operators/twobits_arithmetic_uminus/no_arch", @@ -5101,12 +5098,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "operators/twobits_logical_greater_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5119,13 +5116,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 16, "latch": 1, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 16, + "Total Node": 18 }, "operators/twobits_logical_greater_equal_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_greater_equal_than/k6_N10_40nm", @@ -5138,13 +5135,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 16, "latch": 1, "generic logic size": 6, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 16, + "Total Node": 18 }, "operators/twobits_logical_greater_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_equal_than/k6_N10_mem32K_40nm", @@ -5157,13 +5154,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 16, "latch": 1, "generic logic size": 6, - "Longest Path": 10, + "Longest Path": 13, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 16, + "Total Node": 18 }, "operators/twobits_logical_greater_equal_than/no_arch": { "test_name": "operators/twobits_logical_greater_equal_than/no_arch", @@ -5175,12 +5172,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 16, "latch": 1, - "Longest Path": 10, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Longest Path": 13, + "Average Path": 4, + "Estimated LUTs": 16, + "Total Node": 18 }, "operators/twobits_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5193,13 +5190,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 15, "latch": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_N10_40nm", @@ -5212,13 +5209,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 15, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_N10_mem32K_40nm", @@ -5231,13 +5228,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 15, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_than/no_arch": { "test_name": "operators/twobits_logical_greater_than/no_arch", @@ -5249,12 +5246,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 15, "latch": 1, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5267,13 +5264,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 14, "latch": 1, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_less_equal_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_N10_40nm", @@ -5286,13 +5283,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 14, "latch": 1, "generic logic size": 6, - "Longest Path": 10, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_less_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_N10_mem32K_40nm", @@ -5305,13 +5302,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 14, "latch": 1, "generic logic size": 6, - "Longest Path": 10, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_less_equal_than/no_arch": { "test_name": "operators/twobits_logical_less_equal_than/no_arch", @@ -5323,12 +5320,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 12, + "logic element": 14, "latch": 1, - "Longest Path": 10, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 14 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5341,13 +5338,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 12, "latch": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 14 }, "operators/twobits_logical_less_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_less_than/k6_N10_40nm", @@ -5360,13 +5357,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 12, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 14 }, "operators/twobits_logical_less_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_less_than/k6_N10_mem32K_40nm", @@ -5379,13 +5376,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 12, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 14 }, "operators/twobits_logical_less_than/no_arch": { "test_name": "operators/twobits_logical_less_than/no_arch", @@ -5397,12 +5394,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, + "logic element": 12, "latch": 1, - "Longest Path": 9, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 10 + "Estimated LUTs": 12, + "Total Node": 14 }, "operators/unary_bitwise_bufnode/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unary_bitwise_bufnode/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5481,13 +5478,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/unary_bitwise_not/k6_N10_40nm": { "test_name": "operators/unary_bitwise_not/k6_N10_40nm", @@ -5500,13 +5497,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/unary_bitwise_not/k6_N10_mem32K_40nm": { "test_name": "operators/unary_bitwise_not/k6_N10_mem32K_40nm", @@ -5519,13 +5516,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/unary_bitwise_not/no_arch": { "test_name": "operators/unary_bitwise_not/no_arch", @@ -5537,12 +5534,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 6 + "Longest Path": 5, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/unsigned_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -6908,12 +6905,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_int_wide/k6_N10_40nm", @@ -6925,12 +6922,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_int_wide/k6_N10_mem32K_40nm", @@ -6942,12 +6939,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_int_wide/no_arch", @@ -6958,11 +6955,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -6974,12 +6971,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_N10_40nm", @@ -6991,12 +6988,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_N10_mem32K_40nm", @@ -7008,12 +7005,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_ultra_wide/no_arch", @@ -7024,11 +7021,11 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7040,12 +7037,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_N10_40nm", @@ -7057,12 +7054,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_N10_mem32K_40nm", @@ -7074,12 +7071,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_wide/no_arch", @@ -7090,11 +7087,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7106,12 +7103,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asl_wire/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_wire/k6_N10_40nm", @@ -7123,12 +7120,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asl_wire/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wire/k6_N10_mem32K_40nm", @@ -7140,12 +7137,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asl_wire/no_arch": { "test_name": "operators/unsigned_variable_asl_wire/no_arch", @@ -7156,11 +7153,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asr_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7238,12 +7235,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_int_wide/k6_N10_40nm", @@ -7255,12 +7252,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_int_wide/k6_N10_mem32K_40nm", @@ -7272,12 +7269,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_int_wide/no_arch", @@ -7288,11 +7285,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7304,12 +7301,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_N10_40nm", @@ -7321,12 +7318,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_N10_mem32K_40nm", @@ -7338,12 +7335,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_ultra_wide/no_arch", @@ -7354,11 +7351,11 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7370,12 +7367,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_N10_40nm", @@ -7387,12 +7384,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_N10_mem32K_40nm", @@ -7404,12 +7401,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "generic logic size": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_wide/no_arch", @@ -7420,11 +7417,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7436,12 +7433,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asr_wire/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_wire/k6_N10_40nm", @@ -7453,12 +7450,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asr_wire/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wire/k6_N10_mem32K_40nm", @@ -7470,12 +7467,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_asr_wire/no_arch": { "test_name": "operators/unsigned_variable_asr_wire/no_arch", @@ -7486,11 +7483,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7568,12 +7565,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_int_wide/k6_N10_40nm", @@ -7585,12 +7582,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_int_wide/k6_N10_mem32K_40nm", @@ -7602,12 +7599,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_int_wide/no_arch", @@ -7618,11 +7615,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7634,12 +7631,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_N10_40nm", @@ -7651,12 +7648,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_N10_mem32K_40nm", @@ -7668,12 +7665,12 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_ultra_wide/no_arch", @@ -7684,11 +7681,11 @@ "test_coverage(%)": 100, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7700,12 +7697,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_N10_40nm", @@ -7717,12 +7714,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_N10_mem32K_40nm", @@ -7734,12 +7731,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_wide/no_arch", @@ -7750,11 +7747,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7766,12 +7763,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sl_wire/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_wire/k6_N10_40nm", @@ -7783,12 +7780,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sl_wire/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wire/k6_N10_mem32K_40nm", @@ -7800,12 +7797,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sl_wire/no_arch": { "test_name": "operators/unsigned_variable_sl_wire/no_arch", @@ -7816,11 +7813,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sr_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7898,12 +7895,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 4, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_int_wide/k6_N10_40nm", @@ -7915,12 +7912,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_int_wide/k6_N10_mem32K_40nm", @@ -7932,12 +7929,12 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, + "logic element": 160, "generic logic size": 6, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_int_wide/no_arch", @@ -7948,11 +7945,11 @@ "test_coverage(%)": 96.6, "Pi": 37, "Po": 32, - "logic element": 1056, - "Longest Path": 35, - "Average Path": 5, - "Estimated LUTs": 1056, - "Total Node": 1056 + "logic element": 160, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7964,12 +7961,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 4, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_N10_40nm", @@ -7981,12 +7978,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_N10_mem32K_40nm", @@ -7998,12 +7995,12 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, + "logic element": 455, "generic logic size": 6, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_ultra_wide/no_arch", @@ -8014,11 +8011,11 @@ "test_coverage(%)": 98.4, "Pi": 72, "Po": 65, - "logic element": 4290, - "Longest Path": 68, - "Average Path": 6, - "Estimated LUTs": 4290, - "Total Node": 4290 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8030,12 +8027,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 4, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_N10_40nm", @@ -8047,12 +8044,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_N10_mem32K_40nm", @@ -8064,12 +8061,12 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, + "logic element": 6, "generic logic size": 6, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_wide/no_arch", @@ -8080,11 +8077,11 @@ "test_coverage(%)": 100, "Pi": 5, "Po": 3, - "logic element": 12, - "Longest Path": 6, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 12 + "logic element": 6, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8096,12 +8093,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sr_wire/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_wire/k6_N10_40nm", @@ -8113,12 +8110,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sr_wire/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wire/k6_N10_mem32K_40nm", @@ -8130,12 +8127,12 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "operators/unsigned_variable_sr_wire/no_arch": { "test_name": "operators/unsigned_variable_sr_wire/no_arch", @@ -8146,11 +8143,11 @@ "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/synthesis_result.json index 48c843335b5..d82f9412c83 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/operators/synthesis_result.json @@ -94,13 +94,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 3, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_equal/k6_N10_40nm": { "test_name": "operators/binary_equal/k6_N10_40nm", @@ -115,13 +115,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_equal/k6_N10_mem32K_40nm", @@ -136,13 +136,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 3, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_equal/no_arch": { "test_name": "operators/binary_equal/no_arch", @@ -156,12 +156,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 3, "latch": 1, - "Longest Path": 8, + "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_logical_and/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_and/k6_frac_N10_frac_chain_mem32K_40nm", @@ -176,13 +176,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_and/k6_N10_40nm": { "test_name": "operators/binary_logical_and/k6_N10_40nm", @@ -197,13 +197,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_and/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_and/k6_N10_mem32K_40nm", @@ -218,13 +218,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_and/no_arch": { "test_name": "operators/binary_logical_and/no_arch", @@ -238,12 +238,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -340,13 +340,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 9, "latch": 1, "generic logic size": 4, - "Longest Path": 7, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_equal_than/k6_N10_40nm": { "test_name": "operators/binary_logical_greater_equal_than/k6_N10_40nm", @@ -361,13 +361,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 9, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_greater_equal_than/k6_N10_mem32K_40nm", @@ -382,13 +382,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 9, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_equal_than/no_arch": { "test_name": "operators/binary_logical_greater_equal_than/no_arch", @@ -402,12 +402,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 9, "latch": 1, - "Longest Path": 7, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 9, + "Total Node": 11 }, "operators/binary_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -422,13 +422,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 8, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 8, + "Total Node": 10 }, "operators/binary_logical_greater_than/k6_N10_40nm": { "test_name": "operators/binary_logical_greater_than/k6_N10_40nm", @@ -443,13 +443,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 8, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 8, + "Total Node": 10 }, "operators/binary_logical_greater_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_greater_than/k6_N10_mem32K_40nm", @@ -464,13 +464,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 8, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 8, + "Total Node": 10 }, "operators/binary_logical_greater_than/no_arch": { "test_name": "operators/binary_logical_greater_than/no_arch", @@ -484,12 +484,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 8, "latch": 1, - "Longest Path": 6, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 8, + "Total Node": 10 }, "operators/binary_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -504,13 +504,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 7, "latch": 1, "generic logic size": 4, - "Longest Path": 7, + "Longest Path": 9, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_equal_than/k6_N10_40nm": { "test_name": "operators/binary_logical_less_equal_than/k6_N10_40nm", @@ -525,13 +525,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 7, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 9, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_less_equal_than/k6_N10_mem32K_40nm", @@ -546,13 +546,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 7, "latch": 1, "generic logic size": 6, - "Longest Path": 7, + "Longest Path": 9, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_equal_than/no_arch": { "test_name": "operators/binary_logical_less_equal_than/no_arch", @@ -566,12 +566,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 6, + "logic element": 7, "latch": 1, - "Longest Path": 7, + "Longest Path": 9, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 9 }, "operators/binary_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -586,13 +586,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 6, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 8, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 6, + "Total Node": 8 }, "operators/binary_logical_less_than/k6_N10_40nm": { "test_name": "operators/binary_logical_less_than/k6_N10_40nm", @@ -607,13 +607,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 6, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 8, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 6, + "Total Node": 8 }, "operators/binary_logical_less_than/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_less_than/k6_N10_mem32K_40nm", @@ -628,13 +628,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 6, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 8, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 6, + "Total Node": 8 }, "operators/binary_logical_less_than/no_arch": { "test_name": "operators/binary_logical_less_than/no_arch", @@ -648,12 +648,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 6, "latch": 1, - "Longest Path": 6, + "Longest Path": 8, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 6, + "Total Node": 8 }, "operators/binary_logical_not_equal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_not_equal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -668,13 +668,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_not_equal/k6_N10_40nm": { "test_name": "operators/binary_logical_not_equal/k6_N10_40nm", @@ -689,13 +689,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_not_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_not_equal/k6_N10_mem32K_40nm", @@ -710,13 +710,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_not_equal/no_arch": { "test_name": "operators/binary_logical_not_equal/no_arch", @@ -730,12 +730,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 3, + "logic element": 2, "latch": 1, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 3, - "Total Node": 5 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_or/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_logical_or/k6_frac_N10_frac_chain_mem32K_40nm", @@ -750,13 +750,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_or/k6_N10_40nm": { "test_name": "operators/binary_logical_or/k6_N10_40nm", @@ -771,13 +771,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_or/k6_N10_mem32K_40nm": { "test_name": "operators/binary_logical_or/k6_N10_mem32K_40nm", @@ -792,13 +792,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_logical_or/no_arch": { "test_name": "operators/binary_logical_or/no_arch", @@ -812,12 +812,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_nand/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_nand/k6_frac_N10_frac_chain_mem32K_40nm", @@ -996,13 +996,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_not_equal/k6_N10_40nm": { "test_name": "operators/binary_not_equal/k6_N10_40nm", @@ -1017,13 +1017,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_not_equal/k6_N10_mem32K_40nm": { "test_name": "operators/binary_not_equal/k6_N10_mem32K_40nm", @@ -1038,13 +1038,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_not_equal/no_arch": { "test_name": "operators/binary_not_equal/no_arch", @@ -1058,12 +1058,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 7, + "logic element": 2, "latch": 1, - "Longest Path": 8, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 9 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_or/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_or/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1160,13 +1160,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 4, "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xnor/k6_N10_40nm": { "test_name": "operators/binary_xnor/k6_N10_40nm", @@ -1181,13 +1181,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xnor/k6_N10_mem32K_40nm": { "test_name": "operators/binary_xnor/k6_N10_mem32K_40nm", @@ -1202,13 +1202,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "generic logic size": 6, "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xnor/no_arch": { "test_name": "operators/binary_xnor/no_arch", @@ -1222,12 +1222,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 3, "latch": 1, "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 3, + "Total Node": 5 }, "operators/binary_xor/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/binary_xor/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1242,13 +1242,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_xor/k6_N10_40nm": { "test_name": "operators/binary_xor/k6_N10_40nm", @@ -1263,13 +1263,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_xor/k6_N10_mem32K_40nm": { "test_name": "operators/binary_xor/k6_N10_mem32K_40nm", @@ -1284,13 +1284,13 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, "generic logic size": 6, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/binary_xor/no_arch": { "test_name": "operators/binary_xor/no_arch", @@ -1304,12 +1304,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 2, - "logic element": 4, + "logic element": 2, "latch": 1, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 6 + "Estimated LUTs": 2, + "Total Node": 4 }, "operators/clog2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/clog2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1405,12 +1405,12 @@ "synthesis_time(ms)": 77.8, "Pi": 24, "Po": 72, - "logic element": 50, + "logic element": 58, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 3, - "Estimated LUTs": 56, - "Total Node": 50 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 58, + "Total Node": 58 }, "operators/concat/k6_N10_40nm": { "test_name": "operators/concat/k6_N10_40nm", @@ -1424,12 +1424,12 @@ "synthesis_time(ms)": 86.1, "Pi": 24, "Po": 72, - "logic element": 50, + "logic element": 58, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 50 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 58, + "Total Node": 58 }, "operators/concat/k6_N10_mem32K_40nm": { "test_name": "operators/concat/k6_N10_mem32K_40nm", @@ -1443,12 +1443,12 @@ "synthesis_time(ms)": 74.5, "Pi": 24, "Po": 72, - "logic element": 50, + "logic element": 58, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 3, - "Estimated LUTs": 55, - "Total Node": 50 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 58, + "Total Node": 58 }, "operators/concat/no_arch": { "test_name": "operators/concat/no_arch", @@ -1461,11 +1461,11 @@ "synthesis_time(ms)": 78, "Pi": 24, "Po": 72, - "logic element": 50, - "Longest Path": 5, - "Average Path": 3, - "Estimated LUTs": 50, - "Total Node": 50 + "logic element": 58, + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 58, + "Total Node": 58 }, "operators/eightbit_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/eightbit_arithmetic_power/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1746,12 +1746,12 @@ "synthesis_time(ms)": 54.1, "Pi": 14, "Po": 8, - "logic element": 8, + "logic element": 7, "generic logic size": 4, "Longest Path": 3, "Average Path": 3, - "Estimated LUTs": 8, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 7 }, "operators/pluscolon_8_bit/k6_N10_40nm": { "test_name": "operators/pluscolon_8_bit/k6_N10_40nm", @@ -1765,12 +1765,12 @@ "synthesis_time(ms)": 57.8, "Pi": 14, "Po": 8, - "logic element": 8, + "logic element": 7, "generic logic size": 6, "Longest Path": 3, "Average Path": 3, - "Estimated LUTs": 8, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 7 }, "operators/pluscolon_8_bit/k6_N10_mem32K_40nm": { "test_name": "operators/pluscolon_8_bit/k6_N10_mem32K_40nm", @@ -1784,12 +1784,12 @@ "synthesis_time(ms)": 53.7, "Pi": 14, "Po": 8, - "logic element": 8, + "logic element": 7, "generic logic size": 6, "Longest Path": 3, "Average Path": 3, - "Estimated LUTs": 8, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 7 }, "operators/pluscolon_8_bit/no_arch": { "test_name": "operators/pluscolon_8_bit/no_arch", @@ -1802,11 +1802,11 @@ "synthesis_time(ms)": 54, "Pi": 14, "Po": 8, - "logic element": 8, + "logic element": 7, "Longest Path": 3, "Average Path": 3, - "Estimated LUTs": 8, - "Total Node": 8 + "Estimated LUTs": 7, + "Total Node": 7 }, "operators/signed_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_16bits_asl_int_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3164,12 +3164,12 @@ "synthesis_time(ms)": 83.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_int_wide/k6_N10_40nm", @@ -3183,12 +3183,12 @@ "synthesis_time(ms)": 88.6, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_int_wide/k6_N10_mem32K_40nm", @@ -3202,12 +3202,12 @@ "synthesis_time(ms)": 97.2, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_int_wide/no_arch": { "test_name": "operators/signed_variable_asl_int_wide/no_arch", @@ -3220,20 +3220,16 @@ "synthesis_time(ms)": 87.5, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "signed_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.4, "exec_time(ms)": 326.2, "elaboration_time(ms)": 77.9, @@ -3242,21 +3238,17 @@ "synthesis_time(ms)": 208, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "signed_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172.1, "exec_time(ms)": 310, "elaboration_time(ms)": 106.2, @@ -3265,21 +3257,17 @@ "synthesis_time(ms)": 267.4, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "signed_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.4, "exec_time(ms)": 332.8, "elaboration_time(ms)": 82, @@ -3288,20 +3276,16 @@ "synthesis_time(ms)": 200.7, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_ultra_wide/no_arch": { "test_name": "operators/signed_variable_asl_ultra_wide/no_arch", "verilog": "signed_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.1, "exec_time(ms)": 260.1, "elaboration_time(ms)": 101.4, @@ -3310,11 +3294,11 @@ "synthesis_time(ms)": 231.1, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3328,12 +3312,12 @@ "synthesis_time(ms)": 37.7, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_N10_40nm", @@ -3347,12 +3331,12 @@ "synthesis_time(ms)": 47.6, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wide/k6_N10_mem32K_40nm", @@ -3366,12 +3350,12 @@ "synthesis_time(ms)": 48.7, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wide/no_arch": { "test_name": "operators/signed_variable_asl_wide/no_arch", @@ -3384,11 +3368,11 @@ "synthesis_time(ms)": 41.4, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3550,12 +3534,12 @@ "synthesis_time(ms)": 93.8, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 155, "generic logic size": 4, - "Longest Path": 34, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 155, + "Total Node": 155 }, "operators/signed_variable_asr_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_int_wide/k6_N10_40nm", @@ -3569,12 +3553,12 @@ "synthesis_time(ms)": 98.4, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 155, "generic logic size": 6, - "Longest Path": 34, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 155, + "Total Node": 155 }, "operators/signed_variable_asr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_int_wide/k6_N10_mem32K_40nm", @@ -3588,12 +3572,12 @@ "synthesis_time(ms)": 103.9, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 155, "generic logic size": 6, - "Longest Path": 34, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 155, + "Total Node": 155 }, "operators/signed_variable_asr_int_wide/no_arch": { "test_name": "operators/signed_variable_asr_int_wide/no_arch", @@ -3606,20 +3590,16 @@ "synthesis_time(ms)": 78.6, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, - "Average Path": 5, - "Estimated LUTs": 1024, - "Total Node": 1024 + "logic element": 155, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 155, + "Total Node": 155 }, "operators/signed_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "signed_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 175.1, "exec_time(ms)": 300.6, "elaboration_time(ms)": 69.8, @@ -3628,21 +3608,17 @@ "synthesis_time(ms)": 189.9, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 448, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 448, + "Total Node": 448 }, "operators/signed_variable_asr_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "signed_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 157.8, "exec_time(ms)": 268.1, "elaboration_time(ms)": 118.5, @@ -3651,21 +3627,17 @@ "synthesis_time(ms)": 234.1, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 448, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 448, + "Total Node": 448 }, "operators/signed_variable_asr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "signed_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 174.2, "exec_time(ms)": 344.8, "elaboration_time(ms)": 99.4, @@ -3674,20 +3646,16 @@ "synthesis_time(ms)": 218.9, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 448, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 448, + "Total Node": 448 }, "operators/signed_variable_asr_ultra_wide/no_arch": { "test_name": "operators/signed_variable_asr_ultra_wide/no_arch", "verilog": "signed_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 155.1, "exec_time(ms)": 228.2, "elaboration_time(ms)": 82.7, @@ -3696,11 +3664,11 @@ "synthesis_time(ms)": 203.1, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 448, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 448, + "Total Node": 448 }, "operators/signed_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3714,12 +3682,12 @@ "synthesis_time(ms)": 48, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 4, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 9 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "operators/signed_variable_asr_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_N10_40nm", @@ -3733,12 +3701,12 @@ "synthesis_time(ms)": 46.1, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 4, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 9 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "operators/signed_variable_asr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wide/k6_N10_mem32K_40nm", @@ -3752,12 +3720,12 @@ "synthesis_time(ms)": 53.2, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 4, "generic logic size": 6, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 9 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "operators/signed_variable_asr_wide/no_arch": { "test_name": "operators/signed_variable_asr_wide/no_arch", @@ -3770,11 +3738,11 @@ "synthesis_time(ms)": 47.7, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 9 + "logic element": 4, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "operators/signed_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3786,14 +3754,11 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0.1, "synthesis_time(ms)": 43.6, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 1, "generic logic size": 4, - "Longest Path": 3, - "Average Path": 3, - "Estimated LUTs": 1, - "Total Node": 1 + "Longest Path": 2, + "Average Path": 2 }, "operators/signed_variable_asr_wire/k6_N10_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_N10_40nm", @@ -3805,14 +3770,11 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0.1, "synthesis_time(ms)": 50.4, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 1, "generic logic size": 6, - "Longest Path": 3, - "Average Path": 3, - "Estimated LUTs": 1, - "Total Node": 1 + "Longest Path": 2, + "Average Path": 2 }, "operators/signed_variable_asr_wire/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_asr_wire/k6_N10_mem32K_40nm", @@ -3824,14 +3786,11 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0.1, "synthesis_time(ms)": 43.7, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 1, "generic logic size": 6, - "Longest Path": 3, - "Average Path": 3, - "Estimated LUTs": 1, - "Total Node": 1 + "Longest Path": 2, + "Average Path": 2 }, "operators/signed_variable_asr_wire/no_arch": { "test_name": "operators/signed_variable_asr_wire/no_arch", @@ -3842,13 +3801,10 @@ "optimization_time(ms)": 0, "techmap_time(ms)": 0.1, "synthesis_time(ms)": 53.9, - "Pi": 2, + "Pi": 1, "Po": 1, - "logic element": 1, - "Longest Path": 3, - "Average Path": 3, - "Estimated LUTs": 1, - "Total Node": 1 + "Longest Path": 2, + "Average Path": 2 }, "operators/signed_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_indexed/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3936,12 +3892,12 @@ "synthesis_time(ms)": 83, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_int_wide/k6_N10_40nm", @@ -3955,12 +3911,12 @@ "synthesis_time(ms)": 72.7, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_int_wide/k6_N10_mem32K_40nm", @@ -3974,12 +3930,12 @@ "synthesis_time(ms)": 95.9, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_int_wide/no_arch": { "test_name": "operators/signed_variable_sl_int_wide/no_arch", @@ -3992,20 +3948,16 @@ "synthesis_time(ms)": 92.6, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "signed_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.4, "exec_time(ms)": 325.5, "elaboration_time(ms)": 81.9, @@ -4014,21 +3966,17 @@ "synthesis_time(ms)": 203.2, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "signed_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172.3, "exec_time(ms)": 263.5, "elaboration_time(ms)": 81, @@ -4037,21 +3985,17 @@ "synthesis_time(ms)": 227, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "signed_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.7, "exec_time(ms)": 340.8, "elaboration_time(ms)": 89.3, @@ -4060,20 +4004,16 @@ "synthesis_time(ms)": 218.8, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_ultra_wide/no_arch": { "test_name": "operators/signed_variable_sl_ultra_wide/no_arch", "verilog": "signed_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.3, "exec_time(ms)": 225.5, "elaboration_time(ms)": 82.7, @@ -4082,11 +4022,11 @@ "synthesis_time(ms)": 198.1, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4100,12 +4040,12 @@ "synthesis_time(ms)": 64.5, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_N10_40nm", @@ -4119,12 +4059,12 @@ "synthesis_time(ms)": 71.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wide/k6_N10_mem32K_40nm", @@ -4138,12 +4078,12 @@ "synthesis_time(ms)": 64, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wide/no_arch": { "test_name": "operators/signed_variable_sl_wide/no_arch", @@ -4156,11 +4096,11 @@ "synthesis_time(ms)": 46.8, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4322,12 +4262,12 @@ "synthesis_time(ms)": 96.2, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_int_wide/k6_N10_40nm", @@ -4341,12 +4281,12 @@ "synthesis_time(ms)": 97.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_int_wide/k6_N10_mem32K_40nm", @@ -4360,12 +4300,12 @@ "synthesis_time(ms)": 87.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_int_wide/no_arch": { "test_name": "operators/signed_variable_sr_int_wide/no_arch", @@ -4378,20 +4318,16 @@ "synthesis_time(ms)": 90.7, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/signed_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "signed_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.4, "exec_time(ms)": 332.8, "elaboration_time(ms)": 76.8, @@ -4400,21 +4336,17 @@ "synthesis_time(ms)": 206.2, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "signed_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172, "exec_time(ms)": 264, "elaboration_time(ms)": 90.6, @@ -4423,21 +4355,17 @@ "synthesis_time(ms)": 225.2, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "signed_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.6, "exec_time(ms)": 323.1, "elaboration_time(ms)": 74.1, @@ -4446,20 +4374,16 @@ "synthesis_time(ms)": 199.1, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_ultra_wide/no_arch": { "test_name": "operators/signed_variable_sr_ultra_wide/no_arch", "verilog": "signed_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.1, "exec_time(ms)": 261.2, "elaboration_time(ms)": 103.8, @@ -4468,11 +4392,11 @@ "synthesis_time(ms)": 232.1, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/signed_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4486,12 +4410,12 @@ "synthesis_time(ms)": 54.1, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/k6_N10_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_N10_40nm", @@ -4505,12 +4429,12 @@ "synthesis_time(ms)": 56.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wide/k6_N10_mem32K_40nm", @@ -4524,12 +4448,12 @@ "synthesis_time(ms)": 47.1, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wide/no_arch": { "test_name": "operators/signed_variable_sr_wide/no_arch", @@ -4542,11 +4466,11 @@ "synthesis_time(ms)": 54.5, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/signed_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/signed_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -4957,14 +4881,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 9, - "logic element": 24, + "logic element": 337, "latch": 8, - "Adder": 19, "generic logic size": 4, - "Longest Path": 27, - "Average Path": 4, - "Estimated LUTs": 24, - "Total Node": 52 + "Longest Path": 93, + "Average Path": 5, + "Estimated LUTs": 337, + "Total Node": 346 }, "operators/twobits_arithmetic_div/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_div/k6_N10_40nm", @@ -4977,15 +4900,15 @@ "techmap_time(ms)": 4.2, "synthesis_time(ms)": 69.4, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 107, + "logic element": 337, "latch": 8, "generic logic size": 6, - "Longest Path": 32, - "Average Path": 4, - "Estimated LUTs": 107, - "Total Node": 116 + "Longest Path": 93, + "Average Path": 5, + "Estimated LUTs": 337, + "Total Node": 346 }, "operators/twobits_arithmetic_div/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_div/k6_N10_mem32K_40nm", @@ -4998,15 +4921,15 @@ "techmap_time(ms)": 3.4, "synthesis_time(ms)": 77.2, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 107, + "logic element": 337, "latch": 8, "generic logic size": 6, - "Longest Path": 32, - "Average Path": 4, - "Estimated LUTs": 107, - "Total Node": 116 + "Longest Path": 93, + "Average Path": 5, + "Estimated LUTs": 337, + "Total Node": 346 }, "operators/twobits_arithmetic_div/no_arch": { "test_name": "operators/twobits_arithmetic_div/no_arch", @@ -5018,14 +4941,14 @@ "techmap_time(ms)": 4.2, "synthesis_time(ms)": 66.8, "Latch Drivers": 1, - "Pi": 7, + "Pi": 9, "Po": 9, - "logic element": 107, + "logic element": 337, "latch": 8, - "Longest Path": 32, - "Average Path": 4, - "Estimated LUTs": 107, - "Total Node": 116 + "Longest Path": 93, + "Average Path": 5, + "Estimated LUTs": 337, + "Total Node": 346 }, "operators/twobits_arithmetic_minus/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_minus/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5123,14 +5046,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 9, + "logic element": 54, "latch": 3, - "Adder": 5, "generic logic size": 4, - "Longest Path": 12, - "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 18 + "Longest Path": 29, + "Average Path": 4, + "Estimated LUTs": 54, + "Total Node": 58 }, "operators/twobits_arithmetic_mod/k6_N10_40nm": { "test_name": "operators/twobits_arithmetic_mod/k6_N10_40nm", @@ -5145,13 +5067,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 38, + "logic element": 54, "latch": 3, "generic logic size": 6, - "Longest Path": 17, + "Longest Path": 29, "Average Path": 4, - "Estimated LUTs": 38, - "Total Node": 42 + "Estimated LUTs": 54, + "Total Node": 58 }, "operators/twobits_arithmetic_mod/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_mod/k6_N10_mem32K_40nm", @@ -5166,13 +5088,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 38, + "logic element": 54, "latch": 3, "generic logic size": 6, - "Longest Path": 17, + "Longest Path": 29, "Average Path": 4, - "Estimated LUTs": 38, - "Total Node": 42 + "Estimated LUTs": 54, + "Total Node": 58 }, "operators/twobits_arithmetic_mod/no_arch": { "test_name": "operators/twobits_arithmetic_mod/no_arch", @@ -5186,12 +5108,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 38, + "logic element": 54, "latch": 3, - "Longest Path": 17, + "Longest Path": 29, "Average Path": 4, - "Estimated LUTs": 38, - "Total Node": 42 + "Estimated LUTs": 54, + "Total Node": 58 }, "operators/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5457,13 +5379,12 @@ "Latch Drivers": 1, "Pi": 3, "Po": 4, - "logic element": 5, + "logic element": 8, "latch": 3, - "Adder": 3, "generic logic size": 4, "Longest Path": 7, "Average Path": 3, - "Estimated LUTs": 5, + "Estimated LUTs": 8, "Total Node": 12 }, "operators/twobits_arithmetic_uminus/k6_N10_40nm": { @@ -5540,13 +5461,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 15, "latch": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_equal_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_greater_equal_than/k6_N10_40nm", @@ -5561,13 +5482,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 15, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_equal_than/k6_N10_mem32K_40nm", @@ -5582,13 +5503,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 15, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_equal_than/no_arch": { "test_name": "operators/twobits_logical_greater_equal_than/no_arch", @@ -5602,12 +5523,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 15, "latch": 1, - "Longest Path": 9, + "Longest Path": 13, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 15, + "Total Node": 17 }, "operators/twobits_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5622,13 +5543,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 14, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 12, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_greater_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_N10_40nm", @@ -5643,13 +5564,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 14, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 12, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_greater_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_greater_than/k6_N10_mem32K_40nm", @@ -5664,13 +5585,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 14, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 12, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_greater_than/no_arch": { "test_name": "operators/twobits_logical_greater_than/no_arch", @@ -5684,12 +5605,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 14, "latch": 1, - "Longest Path": 8, + "Longest Path": 12, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 14, + "Total Node": 16 }, "operators/twobits_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5704,13 +5625,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 13, "latch": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 13, + "Total Node": 15 }, "operators/twobits_logical_less_equal_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_N10_40nm", @@ -5725,13 +5646,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 13, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 13, + "Total Node": 15 }, "operators/twobits_logical_less_equal_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_less_equal_than/k6_N10_mem32K_40nm", @@ -5746,13 +5667,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 13, "latch": 1, "generic logic size": 6, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 13, + "Total Node": 15 }, "operators/twobits_logical_less_equal_than/no_arch": { "test_name": "operators/twobits_logical_less_equal_than/no_arch", @@ -5766,12 +5687,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 10, + "logic element": 13, "latch": 1, - "Longest Path": 9, + "Longest Path": 11, "Average Path": 3, - "Estimated LUTs": 10, - "Total Node": 12 + "Estimated LUTs": 13, + "Total Node": 15 }, "operators/twobits_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/twobits_logical_less_than/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5786,13 +5707,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 11, "latch": 1, "generic logic size": 4, - "Longest Path": 8, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 11, + "Total Node": 13 }, "operators/twobits_logical_less_than/k6_N10_40nm": { "test_name": "operators/twobits_logical_less_than/k6_N10_40nm", @@ -5807,13 +5728,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 11, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 11, + "Total Node": 13 }, "operators/twobits_logical_less_than/k6_N10_mem32K_40nm": { "test_name": "operators/twobits_logical_less_than/k6_N10_mem32K_40nm", @@ -5828,13 +5749,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 11, "latch": 1, "generic logic size": 6, - "Longest Path": 8, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 11, + "Total Node": 13 }, "operators/twobits_logical_less_than/no_arch": { "test_name": "operators/twobits_logical_less_than/no_arch", @@ -5848,12 +5769,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 6, + "logic element": 11, "latch": 1, - "Longest Path": 8, + "Longest Path": 10, "Average Path": 3, - "Estimated LUTs": 6, - "Total Node": 8 + "Estimated LUTs": 11, + "Total Node": 13 }, "operators/unary_bitwise_bufnode/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unary_bitwise_bufnode/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7293,12 +7214,12 @@ "synthesis_time(ms)": 80.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_int_wide/k6_N10_40nm", @@ -7312,12 +7233,12 @@ "synthesis_time(ms)": 84, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_int_wide/k6_N10_mem32K_40nm", @@ -7331,12 +7252,12 @@ "synthesis_time(ms)": 82.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_int_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_int_wide/no_arch", @@ -7349,20 +7270,16 @@ "synthesis_time(ms)": 82.6, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "unsigned_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.2, "exec_time(ms)": 328.6, "elaboration_time(ms)": 74.4, @@ -7371,21 +7288,17 @@ "synthesis_time(ms)": 200.6, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "unsigned_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172.1, "exec_time(ms)": 225.9, "elaboration_time(ms)": 78, @@ -7394,21 +7307,17 @@ "synthesis_time(ms)": 191.5, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "unsigned_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.5, "exec_time(ms)": 315, "elaboration_time(ms)": 73.7, @@ -7417,20 +7326,16 @@ "synthesis_time(ms)": 188.3, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_ultra_wide/no_arch", "verilog": "unsigned_variable_asl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.3, "exec_time(ms)": 219.1, "elaboration_time(ms)": 78.2, @@ -7439,11 +7344,11 @@ "synthesis_time(ms)": 190.7, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7457,12 +7362,12 @@ "synthesis_time(ms)": 46.2, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_N10_40nm", @@ -7476,12 +7381,12 @@ "synthesis_time(ms)": 46.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wide/k6_N10_mem32K_40nm", @@ -7495,12 +7400,12 @@ "synthesis_time(ms)": 49.4, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wide/no_arch": { "test_name": "operators/unsigned_variable_asl_wide/no_arch", @@ -7513,11 +7418,11 @@ "synthesis_time(ms)": 48.4, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7679,12 +7584,12 @@ "synthesis_time(ms)": 77.2, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_int_wide/k6_N10_40nm", @@ -7698,12 +7603,12 @@ "synthesis_time(ms)": 83.9, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_int_wide/k6_N10_mem32K_40nm", @@ -7717,12 +7622,12 @@ "synthesis_time(ms)": 89.4, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_int_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_int_wide/no_arch", @@ -7735,20 +7640,16 @@ "synthesis_time(ms)": 75.7, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "unsigned_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.4, "exec_time(ms)": 338.3, "elaboration_time(ms)": 95, @@ -7757,21 +7658,17 @@ "synthesis_time(ms)": 211.9, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "unsigned_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172, "exec_time(ms)": 218.7, "elaboration_time(ms)": 75, @@ -7780,21 +7677,17 @@ "synthesis_time(ms)": 186.2, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "unsigned_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.4, "exec_time(ms)": 328.1, "elaboration_time(ms)": 83.5, @@ -7803,20 +7696,16 @@ "synthesis_time(ms)": 203.9, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_ultra_wide/no_arch", "verilog": "unsigned_variable_asr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.2, "exec_time(ms)": 216.9, "elaboration_time(ms)": 65.9, @@ -7825,11 +7714,11 @@ "synthesis_time(ms)": 187.3, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -7843,12 +7732,12 @@ "synthesis_time(ms)": 44.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_N10_40nm", @@ -7862,12 +7751,12 @@ "synthesis_time(ms)": 45.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wide/k6_N10_mem32K_40nm", @@ -7881,12 +7770,12 @@ "synthesis_time(ms)": 45.3, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wide/no_arch": { "test_name": "operators/unsigned_variable_asr_wide/no_arch", @@ -7899,11 +7788,11 @@ "synthesis_time(ms)": 49.8, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_asr_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8065,12 +7954,12 @@ "synthesis_time(ms)": 79, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_int_wide/k6_N10_40nm", @@ -8084,12 +7973,12 @@ "synthesis_time(ms)": 75.9, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_int_wide/k6_N10_mem32K_40nm", @@ -8103,12 +7992,12 @@ "synthesis_time(ms)": 84.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_int_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_int_wide/no_arch", @@ -8121,20 +8010,16 @@ "synthesis_time(ms)": 83.2, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "unsigned_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.4, "exec_time(ms)": 318.1, "elaboration_time(ms)": 76.1, @@ -8143,21 +8028,17 @@ "synthesis_time(ms)": 196.5, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "unsigned_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172.1, "exec_time(ms)": 226.1, "elaboration_time(ms)": 70.7, @@ -8166,21 +8047,17 @@ "synthesis_time(ms)": 189, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "unsigned_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.6, "exec_time(ms)": 325.5, "elaboration_time(ms)": 79.1, @@ -8189,20 +8066,16 @@ "synthesis_time(ms)": 201.8, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_ultra_wide/no_arch", "verilog": "unsigned_variable_sl_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.3, "exec_time(ms)": 224.7, "elaboration_time(ms)": 78.9, @@ -8211,11 +8084,11 @@ "synthesis_time(ms)": 196.2, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8229,12 +8102,12 @@ "synthesis_time(ms)": 61, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_N10_40nm", @@ -8248,12 +8121,12 @@ "synthesis_time(ms)": 55.6, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wide/k6_N10_mem32K_40nm", @@ -8267,12 +8140,12 @@ "synthesis_time(ms)": 49.1, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wide/no_arch": { "test_name": "operators/unsigned_variable_sl_wide/no_arch", @@ -8285,11 +8158,11 @@ "synthesis_time(ms)": 54.7, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sl_wire/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8451,12 +8324,12 @@ "synthesis_time(ms)": 82.8, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 4, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_int_wide/k6_N10_40nm", @@ -8470,12 +8343,12 @@ "synthesis_time(ms)": 95.3, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_int_wide/k6_N10_mem32K_40nm", @@ -8489,12 +8362,12 @@ "synthesis_time(ms)": 79.5, "Pi": 37, "Po": 32, - "logic element": 1024, + "logic element": 160, "generic logic size": 6, - "Longest Path": 34, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_int_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_int_wide/no_arch", @@ -8507,20 +8380,16 @@ "synthesis_time(ms)": 80.2, "Pi": 37, "Po": 32, - "logic element": 1024, - "Longest Path": 34, + "logic element": 160, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 1024, - "Total Node": 1024 + "Estimated LUTs": 160, + "Total Node": 160 }, "operators/unsigned_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "unsigned_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 189.2, "exec_time(ms)": 339.1, "elaboration_time(ms)": 80.9, @@ -8529,21 +8398,17 @@ "synthesis_time(ms)": 210.4, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 4, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_N10_40nm", "architecture": "k6_N10_40nm.xml", "verilog": "unsigned_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 172.1, "exec_time(ms)": 249.1, "elaboration_time(ms)": 85.1, @@ -8552,21 +8417,17 @@ "synthesis_time(ms)": 212.8, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_ultra_wide/k6_N10_mem32K_40nm", "architecture": "k6_N10_mem32K_40nm.xml", "verilog": "unsigned_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 188.6, "exec_time(ms)": 322.8, "elaboration_time(ms)": 72.4, @@ -8575,20 +8436,16 @@ "synthesis_time(ms)": 197, "Pi": 72, "Po": 65, - "logic element": 4225, + "logic element": 455, "generic logic size": 6, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_ultra_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_ultra_wide/no_arch", "verilog": "unsigned_variable_sr_ultra_wide.v", - "warnings": [ - "[NETLIST] requesting a shift left that will overflow the maximum size of 63 [63]", - "[NETLIST] requesting a shift left that will overflow the maximum size of 64 [63]" - ], "max_rss(MiB)": 169.2, "exec_time(ms)": 232.2, "elaboration_time(ms)": 81.9, @@ -8597,11 +8454,11 @@ "synthesis_time(ms)": 204.1, "Pi": 72, "Po": 65, - "logic element": 4225, - "Longest Path": 67, - "Average Path": 5, - "Estimated LUTs": 4225, - "Total Node": 4225 + "logic element": 455, + "Longest Path": 9, + "Average Path": 4, + "Estimated LUTs": 455, + "Total Node": 455 }, "operators/unsigned_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_frac_N10_frac_chain_mem32K_40nm", @@ -8615,12 +8472,12 @@ "synthesis_time(ms)": 42.9, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 4, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/k6_N10_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_N10_40nm", @@ -8634,12 +8491,12 @@ "synthesis_time(ms)": 48.6, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/k6_N10_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wide/k6_N10_mem32K_40nm", @@ -8653,12 +8510,12 @@ "synthesis_time(ms)": 48.2, "Pi": 5, "Po": 3, - "logic element": 9, + "logic element": 6, "generic logic size": 6, - "Longest Path": 5, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wide/no_arch": { "test_name": "operators/unsigned_variable_sr_wide/no_arch", @@ -8671,11 +8528,11 @@ "synthesis_time(ms)": 59.7, "Pi": 5, "Po": 3, - "logic element": 9, - "Longest Path": 5, + "logic element": 6, + "Longest Path": 4, "Average Path": 3, - "Estimated LUTs": 9, - "Total Node": 9 + "Estimated LUTs": 6, + "Total Node": 6 }, "operators/unsigned_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "operators/unsigned_variable_sr_wire/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/simulation_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/simulation_result.json index 4907cd5273b..1906d3f7bb5 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/simulation_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/simulation_result.json @@ -10,13 +10,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_for_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -29,13 +29,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 17, "latch": 8, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 17, + "Total Node": 26 }, "syntax/8_bit_for_pass_through_module/no_arch": { "test_name": "syntax/8_bit_for_pass_through_module/no_arch", @@ -47,12 +47,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 17, "latch": 8, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 17, + "Total Node": 26 }, "syntax/8_bit_for_pass_through/no_arch": { "test_name": "syntax/8_bit_for_pass_through/no_arch", @@ -64,12 +64,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_off_by_1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_for_pass_through_off_by_1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -82,13 +82,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_off_by_1/no_arch": { "test_name": "syntax/8_bit_for_pass_through_off_by_1/no_arch", @@ -100,12 +100,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -118,13 +118,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 17, "latch": 8, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 17, + "Total Node": 26 }, "syntax/8_bit_pass_through_module/no_arch": { "test_name": "syntax/8_bit_pass_through_module/no_arch", @@ -136,12 +136,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 17, "latch": 8, - "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Longest Path": 6, + "Average Path": 5, + "Estimated LUTs": 17, + "Total Node": 26 }, "syntax/and_primitive/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/and_primitive/k6_frac_N10_frac_chain_mem32K_40nm", @@ -150,15 +150,15 @@ "max_rss(MiB)": 65.4, "exec_time(ms)": 113.4, "simulation_time(ms)": 0.4, - "test_coverage(%)": 66.7, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 2, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/and_primitive/no_arch": { "test_name": "syntax/and_primitive/no_arch", @@ -166,14 +166,14 @@ "max_rss(MiB)": 44.9, "exec_time(ms)": 9.9, "simulation_time(ms)": 0.5, - "test_coverage(%)": 66.7, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 2, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/basic_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/basic_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -185,13 +185,13 @@ "test_coverage(%)": 96.7, "Pi": 7, "Po": 4, - "logic element": 6, + "logic element": 4, "Adder": 8, "generic logic size": 4, "Longest Path": 8, "Average Path": 5, - "Estimated LUTs": 6, - "Total Node": 14 + "Estimated LUTs": 4, + "Total Node": 12 }, "syntax/basic_expression_in_module_port/no_arch": { "test_name": "syntax/basic_expression_in_module_port/no_arch", @@ -202,11 +202,11 @@ "test_coverage(%)": 100, "Pi": 7, "Po": 4, - "logic element": 16, + "logic element": 14, "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Estimated LUTs": 14, + "Total Node": 14 }, "syntax/bitwise_op_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bitwise_op_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -218,13 +218,13 @@ "test_coverage(%)": 84.2, "Pi": 10, "Po": 4, - "logic element": 11, + "logic element": 9, "Adder": 9, "generic logic size": 4, "Longest Path": 9, - "Average Path": 6, - "Estimated LUTs": 11, - "Total Node": 20 + "Average Path": 5, + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/bitwise_op_expression_in_module_port/no_arch": { "test_name": "syntax/bitwise_op_expression_in_module_port/no_arch", @@ -235,11 +235,11 @@ "test_coverage(%)": 87.8, "Pi": 10, "Po": 4, - "logic element": 23, + "logic element": 21, "Longest Path": 9, "Average Path": 5, - "Estimated LUTs": 23, - "Total Node": 23 + "Estimated LUTs": 21, + "Total Node": 21 }, "syntax/bm_dag5_mod/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_dag5_mod/k6_frac_N10_frac_chain_mem32K_40nm", @@ -250,15 +250,15 @@ "simulation_time(ms)": 0.9, "test_coverage(%)": 90.2, "Latch Drivers": 1, - "Pi": 5, + "Pi": 6, "Po": 3, - "logic element": 17, - "latch": 9, + "logic element": 11, + "latch": 13, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 27 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 11, + "Total Node": 25 }, "syntax/bm_dag5_mod/no_arch": { "test_name": "syntax/bm_dag5_mod/no_arch", @@ -268,14 +268,14 @@ "simulation_time(ms)": 0.8, "test_coverage(%)": 90.2, "Latch Drivers": 1, - "Pi": 5, + "Pi": 6, "Po": 3, - "logic element": 17, - "latch": 9, - "Longest Path": 10, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 27 + "logic element": 11, + "latch": 13, + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 11, + "Total Node": 25 }, "syntax/bm_dag6_mod_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_dag6_mod_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -287,12 +287,12 @@ "test_coverage(%)": 93.3, "Pi": 6, "Po": 3, - "logic element": 15, + "logic element": 12, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 5, - "Estimated LUTs": 15, - "Total Node": 15 + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 12, + "Total Node": 12 }, "syntax/bm_dag6_mod_log/no_arch": { "test_name": "syntax/bm_dag6_mod_log/no_arch", @@ -303,11 +303,11 @@ "test_coverage(%)": 93.3, "Pi": 6, "Po": 3, - "logic element": 15, - "Longest Path": 8, - "Average Path": 5, - "Estimated LUTs": 15, - "Total Node": 15 + "logic element": 12, + "Longest Path": 7, + "Average Path": 4, + "Estimated LUTs": 12, + "Total Node": 12 }, "syntax/bm_dag7_mod_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_dag7_mod_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -319,12 +319,12 @@ "test_coverage(%)": 71.4, "Pi": 6, "Po": 3, - "logic element": 6, + "logic element": 3, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "syntax/bm_dag7_mod_log/no_arch": { "test_name": "syntax/bm_dag7_mod_log/no_arch", @@ -335,11 +335,11 @@ "test_coverage(%)": 71.4, "Pi": 6, "Po": 3, - "logic element": 6, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 6 + "logic element": 3, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 3, + "Total Node": 3 }, "syntax/bm_DL_4_bit_updown_counter/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_4_bit_updown_counter/k6_frac_N10_frac_chain_mem32K_40nm", @@ -352,14 +352,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 8, - "latch": 3, + "logic element": 6, + "latch": 4, "Adder": 3, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 8, - "Total Node": 15 + "Longest Path": 8, + "Average Path": 4, + "Estimated LUTs": 6, + "Total Node": 14 }, "syntax/bm_DL_4_bit_updown_counter/no_arch": { "test_name": "syntax/bm_DL_4_bit_updown_counter/no_arch", @@ -371,12 +371,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 2, - "logic element": 11, - "latch": 3, + "logic element": 9, + "latch": 4, "Longest Path": 12, - "Average Path": 5, - "Estimated LUTs": 11, - "Total Node": 15 + "Average Path": 4, + "Estimated LUTs": 9, + "Total Node": 14 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/k6_frac_N10_frac_chain_mem32K_40nm", @@ -388,13 +388,13 @@ "test_coverage(%)": 65.1, "Pi": 65, "Po": 34, - "logic element": 49, + "logic element": 41, "Adder": 66, "generic logic size": 4, - "Longest Path": 47, + "Longest Path": 43, "Average Path": 5, - "Estimated LUTs": 49, - "Total Node": 115 + "Estimated LUTs": 41, + "Total Node": 107 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/no_arch": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/no_arch", @@ -405,11 +405,11 @@ "test_coverage(%)": 70.1, "Pi": 65, "Po": 34, - "logic element": 175, - "Longest Path": 46, + "logic element": 167, + "Longest Path": 42, "Average Path": 5, - "Estimated LUTs": 175, - "Total Node": 175 + "Estimated LUTs": 167, + "Total Node": 167 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/k6_frac_N10_frac_chain_mem32K_40nm", @@ -421,13 +421,13 @@ "test_coverage(%)": 65.4, "Pi": 65, "Po": 34, - "logic element": 43, + "logic element": 36, "Adder": 68, "generic logic size": 4, - "Longest Path": 44, + "Longest Path": 40, "Average Path": 5, - "Estimated LUTs": 43, - "Total Node": 111 + "Estimated LUTs": 36, + "Total Node": 104 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/no_arch": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/no_arch", @@ -438,11 +438,11 @@ "test_coverage(%)": 70.3, "Pi": 65, "Po": 34, - "logic element": 173, - "Longest Path": 43, + "logic element": 166, + "Longest Path": 39, "Average Path": 5, - "Estimated LUTs": 173, - "Total Node": 173 + "Estimated LUTs": 166, + "Total Node": 166 }, "syntax/bm_DL_simple_fsm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_simple_fsm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -451,17 +451,17 @@ "max_rss(MiB)": 80.5, "exec_time(ms)": 108.9, "simulation_time(ms)": 0.8, - "test_coverage(%)": 100, + "test_coverage(%)": 71.4, "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 15, - "latch": 2, + "logic element": 10, + "latch": 3, "generic logic size": 4, - "Longest Path": 13, - "Average Path": 6, - "Estimated LUTs": 15, - "Total Node": 18 + "Longest Path": 12, + "Average Path": 5, + "Estimated LUTs": 10, + "Total Node": 14 }, "syntax/bm_DL_simple_fsm/no_arch": { "test_name": "syntax/bm_DL_simple_fsm/no_arch", @@ -469,16 +469,16 @@ "max_rss(MiB)": 60.4, "exec_time(ms)": 24.6, "simulation_time(ms)": 0.9, - "test_coverage(%)": 100, + "test_coverage(%)": 71.4, "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 15, - "latch": 2, - "Longest Path": 13, - "Average Path": 6, - "Estimated LUTs": 15, - "Total Node": 18 + "logic element": 10, + "latch": 3, + "Longest Path": 12, + "Average Path": 5, + "Estimated LUTs": 10, + "Total Node": 14 }, "syntax/bm_jk_rtl/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_jk_rtl/k6_frac_N10_frac_chain_mem32K_40nm", @@ -489,15 +489,15 @@ "simulation_time(ms)": 0.8, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 3, "Po": 2, - "logic element": 17, + "logic element": 15, "latch": 1, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 19 + "Longest Path": 10, + "Average Path": 3, + "Estimated LUTs": 15, + "Total Node": 17 }, "syntax/bm_jk_rtl/no_arch": { "test_name": "syntax/bm_jk_rtl/no_arch", @@ -507,14 +507,14 @@ "simulation_time(ms)": 1, "test_coverage(%)": 100, "Latch Drivers": 1, - "Pi": 4, + "Pi": 3, "Po": 2, - "logic element": 17, + "logic element": 15, "latch": 1, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 17, - "Total Node": 19 + "Longest Path": 10, + "Average Path": 3, + "Estimated LUTs": 15, + "Total Node": 17 }, "syntax/bm_log_all/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_log_all/k6_frac_N10_frac_chain_mem32K_40nm", @@ -526,12 +526,12 @@ "test_coverage(%)": 65.7, "Pi": 64, "Po": 256, - "logic element": 704, + "logic element": 320, "generic logic size": 4, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 704, - "Total Node": 704 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 320, + "Total Node": 320 }, "syntax/bm_log_all/no_arch": { "test_name": "syntax/bm_log_all/no_arch", @@ -542,11 +542,11 @@ "test_coverage(%)": 65.7, "Pi": 64, "Po": 256, - "logic element": 704, - "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 704, - "Total Node": 704 + "logic element": 320, + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 320, + "Total Node": 320 }, "syntax/bm_simple_memory/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_simple_memory/k6_frac_N10_frac_chain_mem32K_40nm", @@ -644,15 +644,15 @@ "Latch Drivers": 1, "Pi": 67, "Po": 65, - "logic element": 32676, - "latch": 6273, + "logic element": 23552, + "latch": 6295, "Adder": 1195, "Multiplier": 38, "generic logic size": 4, - "Longest Path": 401, + "Longest Path": 412, "Average Path": 7, - "Estimated LUTs": 36039, - "Total Node": 40183 + "Estimated LUTs": 23552, + "Total Node": 31081 }, "syntax/cf_fft_1024_16/no_arch": { "test_name": "syntax/cf_fft_1024_16/no_arch", @@ -664,12 +664,12 @@ "Latch Drivers": 1, "Pi": 67, "Po": 65, - "logic element": 84264, - "latch": 6273, + "logic element": 77180, + "latch": 6295, "Longest Path": 855, "Average Path": 7, - "Estimated LUTs": 84264, - "Total Node": 90538 + "Estimated LUTs": 77180, + "Total Node": 83476 }, "syntax/complex_post_for_loop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/complex_post_for_loop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -682,13 +682,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/complex_post_for_loop/no_arch": { "test_name": "syntax/complex_post_for_loop/no_arch", @@ -700,12 +700,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/conditional_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/conditional_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -717,13 +717,13 @@ "test_coverage(%)": 86.1, "Pi": 9, "Po": 4, - "logic element": 10, + "logic element": 8, "Adder": 9, "generic logic size": 4, "Longest Path": 8, "Average Path": 5, - "Estimated LUTs": 10, - "Total Node": 19 + "Estimated LUTs": 8, + "Total Node": 17 }, "syntax/conditional_expression_in_module_port/no_arch": { "test_name": "syntax/conditional_expression_in_module_port/no_arch", @@ -734,11 +734,11 @@ "test_coverage(%)": 89.7, "Pi": 9, "Po": 4, - "logic element": 22, + "logic element": 20, "Longest Path": 8, "Average Path": 5, - "Estimated LUTs": 22, - "Total Node": 22 + "Estimated LUTs": 20, + "Total Node": 20 }, "syntax/constant_module_inst/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/constant_module_inst/k6_frac_N10_frac_chain_mem32K_40nm", @@ -786,13 +786,13 @@ "Latch Drivers": 1, "Pi": 1, "Po": 3, - "logic element": 3, + "logic element": 1, "latch": 2, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 6 + "Estimated LUTs": 1, + "Total Node": 4 }, "syntax/delay_syntax/no_arch": { "test_name": "syntax/delay_syntax/no_arch", @@ -804,12 +804,12 @@ "Latch Drivers": 1, "Pi": 1, "Po": 3, - "logic element": 3, + "logic element": 1, "latch": 2, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 6 + "Estimated LUTs": 1, + "Total Node": 4 }, "syntax/diffeq_f_systemC/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/diffeq_f_systemC/k6_frac_N10_frac_chain_mem32K_40nm", @@ -822,15 +822,15 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 447, + "logic element": 441, "latch": 96, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 119, + "Longest Path": 92, "Average Path": 5, - "Estimated LUTs": 457, - "Total Node": 681 + "Estimated LUTs": 441, + "Total Node": 675 }, "syntax/diffeq_f_systemC/no_arch": { "test_name": "syntax/diffeq_f_systemC/no_arch", @@ -842,12 +842,12 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 5356, + "logic element": 5350, "latch": 96, - "Longest Path": 1462, + "Longest Path": 1434, "Average Path": 5, - "Estimated LUTs": 5356, - "Total Node": 5453 + "Estimated LUTs": 5350, + "Total Node": 5447 }, "syntax/diffeq_paj_convert/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/diffeq_paj_convert/k6_frac_N10_frac_chain_mem32K_40nm", @@ -860,15 +860,15 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 647, + "logic element": 641, "latch": 193, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 127, - "Average Path": 5, - "Estimated LUTs": 657, - "Total Node": 978 + "Longest Path": 93, + "Average Path": 4, + "Estimated LUTs": 641, + "Total Node": 972 }, "syntax/diffeq_paj_convert/no_arch": { "test_name": "syntax/diffeq_paj_convert/no_arch", @@ -880,17 +880,20 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 5556, + "logic element": 5550, "latch": 193, - "Longest Path": 1581, - "Average Path": 5, - "Estimated LUTs": 5556, - "Total Node": 5750 + "Longest Path": 1364, + "Average Path": 4, + "Estimated LUTs": 5550, + "Total Node": 5744 }, "syntax/expression_in_chain_modules/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/expression_in_chain_modules/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "generated_blif": "expression_in_chain_modules_generated.blif", + "warnings": [ + "[SIMULATION] Vector 0 equivalent but output vector has bits set when expecting don't care :" + ], "max_rss(MiB)": 100, "exec_time(ms)": 191.1, "simulation_time(ms)": 4, @@ -898,18 +901,21 @@ "Latch Drivers": 1, "Pi": 8, "Po": 16, - "logic element": 16, - "latch": 17, + "logic element": 6, + "latch": 14, "Adder": 17, "generic logic size": 4, - "Longest Path": 12, + "Longest Path": 11, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 51 + "Estimated LUTs": 6, + "Total Node": 38 }, "syntax/expression_in_chain_modules/no_arch": { "test_name": "syntax/expression_in_chain_modules/no_arch", "generated_blif": "expression_in_chain_modules_generated.blif", + "warnings": [ + "[SIMULATION] Vector 0 equivalent but output vector has bits set when expecting don't care :" + ], "max_rss(MiB)": 75.6, "exec_time(ms)": 99.7, "simulation_time(ms)": 4, @@ -917,12 +923,12 @@ "Latch Drivers": 1, "Pi": 8, "Po": 16, - "logic element": 41, - "latch": 17, - "Longest Path": 11, + "logic element": 31, + "latch": 14, + "Longest Path": 10, "Average Path": 4, - "Estimated LUTs": 41, - "Total Node": 59 + "Estimated LUTs": 31, + "Total Node": 46 }, "syntax/flip_flop_enable/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/flip_flop_enable/k6_frac_N10_frac_chain_mem32K_40nm", @@ -995,13 +1001,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 12, + "logic element": 9, "latch": 4, "generic logic size": 4, "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 17 + "Average Path": 3, + "Estimated LUTs": 9, + "Total Node": 14 }, "syntax/for_loop_adv_post/no_arch": { "test_name": "syntax/for_loop_adv_post/no_arch", @@ -1013,12 +1019,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 12, + "logic element": 9, "latch": 4, "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 17 + "Average Path": 3, + "Estimated LUTs": 9, + "Total Node": 14 }, "syntax/for_loop_adv_pre/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/for_loop_adv_pre/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1031,13 +1037,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/for_loop_adv_pre/no_arch": { "test_name": "syntax/for_loop_adv_pre/no_arch", @@ -1049,12 +1055,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 16, + "logic element": 9, "latch": 8, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 25 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/freq_division/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/freq_division/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1067,13 +1073,13 @@ "Latch Drivers": 1, "Pi": 1, "Po": 4, - "logic element": 42, + "logic element": 38, "latch": 3, "generic logic size": 4, - "Longest Path": 19, + "Longest Path": 21, "Average Path": 4, - "Estimated LUTs": 42, - "Total Node": 46 + "Estimated LUTs": 38, + "Total Node": 42 }, "syntax/freq_division/no_arch": { "test_name": "syntax/freq_division/no_arch", @@ -1085,12 +1091,12 @@ "Latch Drivers": 1, "Pi": 1, "Po": 4, - "logic element": 42, + "logic element": 38, "latch": 3, - "Longest Path": 19, + "Longest Path": 21, "Average Path": 4, - "Estimated LUTs": 42, - "Total Node": 46 + "Estimated LUTs": 38, + "Total Node": 42 }, "syntax/function_automatic/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/function_automatic/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1103,14 +1109,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 7, + "logic element": 4, "latch": 3, "Adder": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 12 }, "syntax/function_automatic/no_arch": { "test_name": "syntax/function_automatic/no_arch", @@ -1122,12 +1128,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "syntax/function_hdr/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/function_hdr/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1140,14 +1146,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 7, + "logic element": 4, "latch": 3, "Adder": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 12 }, "syntax/function_hdr/no_arch": { "test_name": "syntax/function_hdr/no_arch", @@ -1159,12 +1165,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "syntax/function_syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/function_syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1173,15 +1179,15 @@ "max_rss(MiB)": 67.3, "exec_time(ms)": 94.6, "simulation_time(ms)": 0.5, - "test_coverage(%)": 83.3, + "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 4, + "logic element": 1, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/function_syntax/no_arch": { "test_name": "syntax/function_syntax/no_arch", @@ -1189,14 +1195,14 @@ "max_rss(MiB)": 47.3, "exec_time(ms)": 11.2, "simulation_time(ms)": 0.6, - "test_coverage(%)": 83.3, + "test_coverage(%)": 100, "Pi": 2, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/h7_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/h7_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1209,13 +1215,13 @@ "Latch Drivers": 1, "Pi": 8, "Po": 8, - "logic element": 15, + "logic element": 9, "latch": 7, "generic logic size": 4, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 15, - "Total Node": 23 + "Estimated LUTs": 9, + "Total Node": 17 }, "syntax/h7_of_8_bit_for_pass_through/no_arch": { "test_name": "syntax/h7_of_8_bit_for_pass_through/no_arch", @@ -1227,12 +1233,12 @@ "Latch Drivers": 1, "Pi": 8, "Po": 8, - "logic element": 15, + "logic element": 9, "latch": 7, "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 15, - "Total Node": 23 + "Estimated LUTs": 9, + "Total Node": 17 }, "syntax/ifdef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/ifdef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1245,14 +1251,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "syntax/ifdef-else-syntax/no_arch": { "test_name": "syntax/ifdef-else-syntax/no_arch", @@ -1264,12 +1270,12 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "syntax/ifndef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/ifndef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1282,14 +1288,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "syntax/ifndef-else-syntax/no_arch": { "test_name": "syntax/ifndef-else-syntax/no_arch", @@ -1301,12 +1307,12 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "syntax/include-syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/include-syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1319,14 +1325,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "syntax/include-syntax/no_arch": { "test_name": "syntax/include-syntax/no_arch", @@ -1338,12 +1344,12 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "syntax/inferred_DPram/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/inferred_DPram/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1426,13 +1432,11 @@ "Latch Drivers": 1, "Pi": 32, "Po": 32, - "logic element": 32, "latch": 32, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 32, - "Total Node": 65 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 33 }, "syntax/inferred_SPram/no_arch": { "test_name": "syntax/inferred_SPram/no_arch", @@ -1444,12 +1448,10 @@ "Latch Drivers": 1, "Pi": 32, "Po": 32, - "logic element": 32, "latch": 32, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 32, - "Total Node": 65 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 33 }, "syntax/l2_and_h2_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/l2_and_h2_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1462,13 +1464,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 12, + "logic element": 9, "latch": 4, "generic logic size": 4, "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 17 + "Average Path": 3, + "Estimated LUTs": 9, + "Total Node": 14 }, "syntax/l2_and_h2_of_8_bit_for_pass_through/no_arch": { "test_name": "syntax/l2_and_h2_of_8_bit_for_pass_through/no_arch", @@ -1480,12 +1482,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 12, + "logic element": 9, "latch": 4, "Longest Path": 5, - "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 17 + "Average Path": 3, + "Estimated LUTs": 9, + "Total Node": 14 }, "syntax/macro_in_module_declaration/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/macro_in_module_declaration/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1498,13 +1500,11 @@ "Latch Drivers": 1, "Pi": 32, "Po": 32, - "logic element": 32, "latch": 32, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 32, - "Total Node": 65 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 33 }, "syntax/macro_in_module_declaration/no_arch": { "test_name": "syntax/macro_in_module_declaration/no_arch", @@ -1516,12 +1516,10 @@ "Latch Drivers": 1, "Pi": 32, "Po": 32, - "logic element": 32, "latch": 32, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 32, - "Total Node": 65 + "Longest Path": 3, + "Average Path": 3, + "Total Node": 33 }, "syntax/memlooptesting/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/memlooptesting/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1534,14 +1532,14 @@ "Latch Drivers": 1, "Pi": 38, "Po": 32, - "logic element": 96, + "logic element": 129, "latch": 32, "Memory": 32, "generic logic size": 4, "Longest Path": 7, - "Average Path": 5, - "Estimated LUTs": 96, - "Total Node": 161 + "Average Path": 4, + "Estimated LUTs": 129, + "Total Node": 194 }, "syntax/memlooptesting/no_arch": { "test_name": "syntax/memlooptesting/no_arch", @@ -1553,12 +1551,12 @@ "Latch Drivers": 1, "Pi": 38, "Po": 32, - "logic element": 1188, + "logic element": 1221, "latch": 544, "Longest Path": 13, - "Average Path": 6, - "Estimated LUTs": 1188, - "Total Node": 1733 + "Average Path": 5, + "Estimated LUTs": 1221, + "Total Node": 1766 }, "syntax/memory_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/memory_combinational/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1571,15 +1569,15 @@ "Latch Drivers": 1, "Pi": 79, "Po": 32, - "logic element": 114, + "logic element": 134, "latch": 1, "Adder": 2, "Memory": 32, "generic logic size": 4, - "Longest Path": 10, - "Average Path": 6, - "Estimated LUTs": 114, - "Total Node": 150 + "Longest Path": 12, + "Average Path": 7, + "Estimated LUTs": 134, + "Total Node": 170 }, "syntax/memory_combinational/no_arch": { "test_name": "syntax/memory_combinational/no_arch", @@ -1591,12 +1589,12 @@ "Latch Drivers": 1, "Pi": 79, "Po": 32, - "logic element": 26019, + "logic element": 26039, "latch": 8193, - "Longest Path": 16, - "Average Path": 7, - "Estimated LUTs": 26019, - "Total Node": 34213 + "Longest Path": 18, + "Average Path": 8, + "Estimated LUTs": 26039, + "Total Node": 34233 }, "syntax/mix_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/mix_expression_in_module_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1626,13 +1624,13 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 8, - "logic element": 9, + "logic element": 8, "Adder": 5, "generic logic size": 4, "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 14 + "Estimated LUTs": 8, + "Total Node": 13 }, "syntax/mix_expression_in_module_port_nested/no_arch": { "test_name": "syntax/mix_expression_in_module_port_nested/no_arch", @@ -1643,11 +1641,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 8, - "logic element": 16, + "logic element": 15, "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 16, - "Total Node": 16 + "Estimated LUTs": 15, + "Total Node": 15 }, "syntax/mix_expression_in_module_port/no_arch": { "test_name": "syntax/mix_expression_in_module_port/no_arch", @@ -1702,13 +1700,13 @@ "Latch Drivers": 2, "Pi": 4, "Po": 4, - "logic element": 177, - "latch": 33, + "logic element": 114, + "latch": 43, "generic logic size": 4, - "Longest Path": 33, - "Average Path": 5, - "Estimated LUTs": 177, - "Total Node": 212 + "Longest Path": 27, + "Average Path": 4, + "Estimated LUTs": 114, + "Total Node": 159 }, "syntax/multi_clock_reader_writer/no_arch": { "test_name": "syntax/multi_clock_reader_writer/no_arch", @@ -1720,12 +1718,12 @@ "Latch Drivers": 2, "Pi": 4, "Po": 4, - "logic element": 177, - "latch": 33, - "Longest Path": 33, - "Average Path": 5, - "Estimated LUTs": 177, - "Total Node": 212 + "logic element": 114, + "latch": 43, + "Longest Path": 27, + "Average Path": 4, + "Estimated LUTs": 114, + "Total Node": 159 }, "syntax/multi_edge_reader_writer/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/multi_edge_reader_writer/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1772,12 +1770,12 @@ "test_coverage(%)": 73.5, "Pi": 64, "Po": 64, - "logic element": 128, + "logic element": 64, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 128, - "Total Node": 128 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 64, + "Total Node": 64 }, "syntax/multi_module_io_data_types/no_arch": { "test_name": "syntax/multi_module_io_data_types/no_arch", @@ -1788,11 +1786,11 @@ "test_coverage(%)": 73.5, "Pi": 64, "Po": 64, - "logic element": 128, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 128, - "Total Node": 128 + "logic element": 64, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 64, + "Total Node": 64 }, "syntax/multi_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/multi_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1804,12 +1802,12 @@ "test_coverage(%)": 79.9, "Pi": 64, "Po": 32, - "logic element": 64, + "logic element": 32, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "syntax/multi_module/no_arch": { "test_name": "syntax/multi_module/no_arch", @@ -1820,11 +1818,11 @@ "test_coverage(%)": 79.9, "Pi": 64, "Po": 32, - "logic element": 64, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 64 + "logic element": 32, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 32, + "Total Node": 32 }, "syntax/nested-ifdef-syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/nested-ifdef-syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1837,14 +1835,14 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 102, + "logic element": 63, "latch": 55, "Multiplier": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 102, - "Total Node": 162 + "Estimated LUTs": 63, + "Total Node": 123 }, "syntax/nested-ifdef-syntax/no_arch": { "test_name": "syntax/nested-ifdef-syntax/no_arch", @@ -1856,12 +1854,12 @@ "Latch Drivers": 1, "Pi": 47, "Po": 78, - "logic element": 787, + "logic element": 748, "latch": 55, - "Longest Path": 26, + "Longest Path": 25, "Average Path": 5, - "Estimated LUTs": 787, - "Total Node": 843 + "Estimated LUTs": 748, + "Total Node": 804 }, "syntax/no_input/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/no_input/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2000,15 +1998,15 @@ "Latch Drivers": 1, "Pi": 12, "Po": 7, - "logic element": 3416, + "logic element": 2369, "latch": 517, "Adder": 31, "Multiplier": 13, "generic logic size": 4, - "Longest Path": 1130, + "Longest Path": 1056, "Average Path": 8, - "Estimated LUTs": 3523, - "Total Node": 3978 + "Estimated LUTs": 2369, + "Total Node": 2931 }, "syntax/rs_decoder_1/no_arch": { "test_name": "syntax/rs_decoder_1/no_arch", @@ -2020,12 +2018,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 7, - "logic element": 3863, + "logic element": 2816, "latch": 517, - "Longest Path": 1333, + "Longest Path": 1224, "Average Path": 8, - "Estimated LUTs": 3863, - "Total Node": 4381 + "Estimated LUTs": 2816, + "Total Node": 3334 }, "syntax/rs_decoder_2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/rs_decoder_2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2038,15 +2036,15 @@ "Latch Drivers": 1, "Pi": 20, "Po": 11, - "logic element": 11082, + "logic element": 5632, "latch": 616, "Adder": 41, "Multiplier": 9, "generic logic size": 4, - "Longest Path": 1295, - "Average Path": 8, - "Estimated LUTs": 13022, - "Total Node": 11749 + "Longest Path": 1241, + "Average Path": 9, + "Estimated LUTs": 5632, + "Total Node": 6299 }, "syntax/rs_decoder_2/no_arch": { "test_name": "syntax/rs_decoder_2/no_arch", @@ -2058,12 +2056,12 @@ "Latch Drivers": 1, "Pi": 20, "Po": 11, - "logic element": 12127, + "logic element": 6677, "latch": 616, - "Longest Path": 1647, - "Average Path": 9, - "Estimated LUTs": 12127, - "Total Node": 12744 + "Longest Path": 1491, + "Average Path": 8, + "Estimated LUTs": 6677, + "Total Node": 7294 }, "syntax/sign_extend_nomem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/sign_extend_nomem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2076,13 +2074,13 @@ "Latch Drivers": 1, "Pi": 37, "Po": 32, - "logic element": 114, + "logic element": 134, "latch": 1, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 6, - "Estimated LUTs": 114, - "Total Node": 116 + "Estimated LUTs": 134, + "Total Node": 136 }, "syntax/sign_extend_nomem/no_arch": { "test_name": "syntax/sign_extend_nomem/no_arch", @@ -2094,12 +2092,12 @@ "Latch Drivers": 1, "Pi": 37, "Po": 32, - "logic element": 114, + "logic element": 134, "latch": 1, - "Longest Path": 9, + "Longest Path": 12, "Average Path": 6, - "Estimated LUTs": 114, - "Total Node": 116 + "Estimated LUTs": 134, + "Total Node": 136 }, "syntax/simple_function/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/simple_function/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2112,14 +2110,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 7, + "logic element": 4, "latch": 3, "Adder": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 12 }, "syntax/simple_function/no_arch": { "test_name": "syntax/simple_function/no_arch", @@ -2131,12 +2129,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "syntax/simple_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/simple_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2149,14 +2147,14 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 7, + "logic element": 4, "latch": 3, "Adder": 4, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 12 }, "syntax/simple_module/no_arch": { "test_name": "syntax/simple_module/no_arch", @@ -2168,12 +2166,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 4, - "logic element": 12, + "logic element": 9, "latch": 3, - "Longest Path": 8, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 12, - "Total Node": 16 + "Estimated LUTs": 9, + "Total Node": 13 }, "syntax/simple_task/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/simple_task/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2316,15 +2314,15 @@ "max_rss(MiB)": 67.6, "exec_time(ms)": 109.9, "simulation_time(ms)": 0.6, - "test_coverage(%)": 63.6, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 4, + "logic element": 1, "generic logic size": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/timescale_syntax/no_arch": { "test_name": "syntax/timescale_syntax/no_arch", @@ -2332,14 +2330,14 @@ "max_rss(MiB)": 47.2, "exec_time(ms)": 30.3, "simulation_time(ms)": 16.8, - "test_coverage(%)": 63.6, + "test_coverage(%)": 75, "Pi": 2, "Po": 1, - "logic element": 4, - "Longest Path": 5, - "Average Path": 5, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/unconnected_input/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/unconnected_input/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2351,12 +2349,12 @@ "test_coverage(%)": 86.4, "Pi": 6, "Po": 4, - "logic element": 7, + "logic element": 4, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 7 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "syntax/unconnected_input/no_arch": { "test_name": "syntax/unconnected_input/no_arch", @@ -2367,11 +2365,11 @@ "test_coverage(%)": 86.4, "Pi": 6, "Po": 4, - "logic element": 7, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 7, - "Total Node": 7 + "logic element": 4, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "syntax/undeclared_signal/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/undeclared_signal/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2433,12 +2431,12 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 4, + "logic element": 2, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "syntax/vector_and/no_arch": { "test_name": "syntax/vector_and/no_arch", @@ -2449,11 +2447,11 @@ "test_coverage(%)": 100, "Pi": 4, "Po": 2, - "logic element": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 4, - "Total Node": 4 + "logic element": 2, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 2, + "Total Node": 2 }, "syntax/vector_buf/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/vector_buf/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/synthesis_result.json index ec2c44f08f6..7764be929f7 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/syntax/synthesis_result.json @@ -12,13 +12,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_for_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -33,13 +33,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_module/no_arch": { "test_name": "syntax/8_bit_for_pass_through_module/no_arch", @@ -53,12 +53,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through/no_arch": { "test_name": "syntax/8_bit_for_pass_through/no_arch", @@ -72,12 +72,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_off_by_1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_for_pass_through_off_by_1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -92,13 +92,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_for_pass_through_off_by_1/no_arch": { "test_name": "syntax/8_bit_for_pass_through_off_by_1/no_arch", @@ -112,12 +112,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/8_bit_pass_through_module/k6_frac_N10_frac_chain_mem32K_40nm", @@ -132,13 +132,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/8_bit_pass_through_module/no_arch": { "test_name": "syntax/8_bit_pass_through_module/no_arch", @@ -152,12 +152,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/and_primitive/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/and_primitive/k6_frac_N10_frac_chain_mem32K_40nm", @@ -224,13 +224,11 @@ "synthesis_time(ms)": 63.5, "Pi": 7, "Po": 4, - "logic element": 2, "Adder": 8, "generic logic size": 4, "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 2, - "Total Node": 10 + "Total Node": 8 }, "syntax/basic_expression_in_module_port/no_arch": { "test_name": "syntax/basic_expression_in_module_port/no_arch", @@ -243,11 +241,11 @@ "synthesis_time(ms)": 60.7, "Pi": 7, "Po": 4, - "logic element": 12, + "logic element": 10, "Longest Path": 6, "Average Path": 3, - "Estimated LUTs": 12, - "Total Node": 12 + "Estimated LUTs": 10, + "Total Node": 10 }, "syntax/basic_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/basic_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -295,13 +293,13 @@ "synthesis_time(ms)": 89.9, "Pi": 10, "Po": 4, - "logic element": 7, + "logic element": 5, "Adder": 9, "generic logic size": 4, "Longest Path": 8, - "Average Path": 5, - "Estimated LUTs": 7, - "Total Node": 16 + "Average Path": 4, + "Estimated LUTs": 5, + "Total Node": 14 }, "syntax/bitwise_op_expression_in_module_port/no_arch": { "test_name": "syntax/bitwise_op_expression_in_module_port/no_arch", @@ -314,11 +312,11 @@ "synthesis_time(ms)": 68.5, "Pi": 10, "Po": 4, - "logic element": 19, + "logic element": 17, "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 19, - "Total Node": 19 + "Estimated LUTs": 17, + "Total Node": 17 }, "syntax/bitwise_op_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bitwise_op_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -348,15 +346,15 @@ "techmap_time(ms)": 0.6, "synthesis_time(ms)": 111.6, "Latch Drivers": 1, - "Pi": 5, + "Pi": 6, "Po": 3, - "logic element": 14, - "latch": 9, + "logic element": 11, + "latch": 13, "generic logic size": 4, - "Longest Path": 9, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 14, - "Total Node": 24 + "Estimated LUTs": 11, + "Total Node": 25 }, "syntax/bm_dag5_mod/no_arch": { "test_name": "syntax/bm_dag5_mod/no_arch", @@ -368,14 +366,14 @@ "techmap_time(ms)": 0.6, "synthesis_time(ms)": 114.8, "Latch Drivers": 1, - "Pi": 5, + "Pi": 6, "Po": 3, - "logic element": 14, - "latch": 9, - "Longest Path": 9, + "logic element": 11, + "latch": 13, + "Longest Path": 8, "Average Path": 4, - "Estimated LUTs": 14, - "Total Node": 24 + "Estimated LUTs": 11, + "Total Node": 25 }, "syntax/bm_dag6_mod_log/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_dag6_mod_log/k6_frac_N10_frac_chain_mem32K_40nm", @@ -463,13 +461,13 @@ "Pi": 5, "Po": 2, "logic element": 6, - "latch": 3, + "latch": 4, "Adder": 3, "generic logic size": 4, "Longest Path": 8, "Average Path": 4, "Estimated LUTs": 6, - "Total Node": 13 + "Total Node": 14 }, "syntax/bm_DL_4_bit_updown_counter/no_arch": { "test_name": "syntax/bm_DL_4_bit_updown_counter/no_arch", @@ -484,11 +482,11 @@ "Pi": 5, "Po": 2, "logic element": 9, - "latch": 3, - "Longest Path": 11, + "latch": 4, + "Longest Path": 12, "Average Path": 4, "Estimated LUTs": 9, - "Total Node": 13 + "Total Node": 14 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/k6_frac_N10_frac_chain_mem32K_40nm", @@ -502,13 +500,13 @@ "synthesis_time(ms)": 94.7, "Pi": 65, "Po": 34, - "logic element": 15, + "logic element": 9, "Adder": 66, "generic logic size": 4, - "Longest Path": 46, + "Longest Path": 43, "Average Path": 4, - "Estimated LUTs": 15, - "Total Node": 81 + "Estimated LUTs": 9, + "Total Node": 75 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/no_arch": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow/no_arch", @@ -521,11 +519,11 @@ "synthesis_time(ms)": 84.5, "Pi": 65, "Po": 34, - "logic element": 141, - "Longest Path": 45, + "logic element": 135, + "Longest Path": 42, "Average Path": 4, - "Estimated LUTs": 141, - "Total Node": 141 + "Estimated LUTs": 135, + "Total Node": 135 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/k6_frac_N10_frac_chain_mem32K_40nm", @@ -539,13 +537,13 @@ "synthesis_time(ms)": 87, "Pi": 65, "Po": 34, - "logic element": 9, + "logic element": 3, "Adder": 68, "generic logic size": 4, - "Longest Path": 43, + "Longest Path": 40, "Average Path": 4, - "Estimated LUTs": 9, - "Total Node": 77 + "Estimated LUTs": 3, + "Total Node": 71 }, "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/no_arch": { "test_name": "syntax/bm_DL_nbit_adder_with_carryout_and_overflow_simplified/no_arch", @@ -558,11 +556,11 @@ "synthesis_time(ms)": 86.5, "Pi": 65, "Po": 34, - "logic element": 139, - "Longest Path": 42, + "logic element": 133, + "Longest Path": 39, "Average Path": 4, - "Estimated LUTs": 139, - "Total Node": 139 + "Estimated LUTs": 133, + "Total Node": 133 }, "syntax/bm_DL_simple_fsm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_DL_simple_fsm/k6_frac_N10_frac_chain_mem32K_40nm", @@ -577,13 +575,13 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 14, - "latch": 2, + "logic element": 10, + "latch": 3, "generic logic size": 4, "Longest Path": 12, "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 17 + "Estimated LUTs": 10, + "Total Node": 14 }, "syntax/bm_DL_simple_fsm/no_arch": { "test_name": "syntax/bm_DL_simple_fsm/no_arch", @@ -597,12 +595,12 @@ "Latch Drivers": 1, "Pi": 2, "Po": 1, - "logic element": 14, - "latch": 2, + "logic element": 10, + "latch": 3, "Longest Path": 12, "Average Path": 5, - "Estimated LUTs": 14, - "Total Node": 17 + "Estimated LUTs": 10, + "Total Node": 14 }, "syntax/bm_function_1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_function_1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -649,13 +647,13 @@ "techmap_time(ms)": 0.4, "synthesis_time(ms)": 67.3, "Latch Drivers": 1, - "Pi": 4, + "Pi": 3, "Po": 2, "logic element": 15, "latch": 1, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 4, + "Longest Path": 10, + "Average Path": 3, "Estimated LUTs": 15, "Total Node": 17 }, @@ -669,12 +667,12 @@ "techmap_time(ms)": 0.3, "synthesis_time(ms)": 68.6, "Latch Drivers": 1, - "Pi": 4, + "Pi": 3, "Po": 2, "logic element": 15, "latch": 1, - "Longest Path": 8, - "Average Path": 4, + "Longest Path": 10, + "Average Path": 3, "Estimated LUTs": 15, "Total Node": 17 }, @@ -690,12 +688,12 @@ "synthesis_time(ms)": 192.8, "Pi": 64, "Po": 256, - "logic element": 448, + "logic element": 320, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 448, - "Total Node": 448 + "Estimated LUTs": 320, + "Total Node": 320 }, "syntax/bm_log_all/no_arch": { "test_name": "syntax/bm_log_all/no_arch", @@ -708,20 +706,16 @@ "synthesis_time(ms)": 206.5, "Pi": 64, "Po": 256, - "logic element": 448, - "Longest Path": 6, + "logic element": 320, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 448, - "Total Node": 448 + "Estimated LUTs": 320, + "Total Node": 320 }, "syntax/bm_simple_memory/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/bm_simple_memory/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "bm_simple_memory.v", - "warnings": [ - "[NETLIST] Input pin (bm_simple_memory^address_out~3) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (bm_simple_memory^address_in~3) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 67.3, "exec_time(ms)": 135.5, "elaboration_time(ms)": 48.1, @@ -739,10 +733,6 @@ "syntax/bm_simple_memory/no_arch": { "test_name": "syntax/bm_simple_memory/no_arch", "verilog": "bm_simple_memory.v", - "warnings": [ - "[NETLIST] Input pin (bm_simple_memory^address_out~3) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (bm_simple_memory^address_in~3) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 48, "exec_time(ms)": 56.3, "elaboration_time(ms)": 50.2, @@ -829,15 +819,15 @@ "Latch Drivers": 1, "Pi": 67, "Po": 65, - "logic element": 32611, - "latch": 6273, + "logic element": 23552, + "latch": 6295, "Adder": 1195, "Multiplier": 38, "generic logic size": 4, - "Longest Path": 400, - "Average Path": 6, - "Estimated LUTs": 35974, - "Total Node": 40118 + "Longest Path": 412, + "Average Path": 7, + "Estimated LUTs": 23552, + "Total Node": 31081 }, "syntax/cf_fft_1024_16/no_arch": { "test_name": "syntax/cf_fft_1024_16/no_arch", @@ -851,12 +841,12 @@ "Latch Drivers": 1, "Pi": 67, "Po": 65, - "logic element": 84199, - "latch": 6273, - "Longest Path": 854, - "Average Path": 6, - "Estimated LUTs": 84199, - "Total Node": 90473 + "logic element": 77180, + "latch": 6295, + "Longest Path": 855, + "Average Path": 7, + "Estimated LUTs": 77180, + "Total Node": 83476 }, "syntax/complex_post_for_loop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/complex_post_for_loop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -871,13 +861,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/complex_post_for_loop/no_arch": { "test_name": "syntax/complex_post_for_loop/no_arch", @@ -891,12 +881,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/conditional_expression_in_function_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/conditional_expression_in_function_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -927,13 +917,13 @@ "synthesis_time(ms)": 69.9, "Pi": 9, "Po": 4, - "logic element": 6, + "logic element": 4, "Adder": 9, "generic logic size": 4, "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 6, - "Total Node": 15 + "Estimated LUTs": 4, + "Total Node": 13 }, "syntax/conditional_expression_in_module_port/no_arch": { "test_name": "syntax/conditional_expression_in_module_port/no_arch", @@ -946,11 +936,11 @@ "synthesis_time(ms)": 67.3, "Pi": 9, "Po": 4, - "logic element": 18, + "logic element": 16, "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 18, - "Total Node": 18 + "Estimated LUTs": 16, + "Total Node": 16 }, "syntax/conditional_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/conditional_expression_in_task_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1071,15 +1061,15 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 351, + "logic element": 441, "latch": 96, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 118, - "Average Path": 4, - "Estimated LUTs": 361, - "Total Node": 585 + "Longest Path": 92, + "Average Path": 5, + "Estimated LUTs": 441, + "Total Node": 675 }, "syntax/diffeq_f_systemC/no_arch": { "test_name": "syntax/diffeq_f_systemC/no_arch", @@ -1093,12 +1083,12 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 5260, + "logic element": 5350, "latch": 96, - "Longest Path": 1461, - "Average Path": 4, - "Estimated LUTs": 5260, - "Total Node": 5357 + "Longest Path": 1434, + "Average Path": 5, + "Estimated LUTs": 5350, + "Total Node": 5447 }, "syntax/diffeq_paj_convert/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/diffeq_paj_convert/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1113,15 +1103,15 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 551, + "logic element": 641, "latch": 193, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 126, + "Longest Path": 93, "Average Path": 4, - "Estimated LUTs": 561, - "Total Node": 882 + "Estimated LUTs": 641, + "Total Node": 972 }, "syntax/diffeq_paj_convert/no_arch": { "test_name": "syntax/diffeq_paj_convert/no_arch", @@ -1135,12 +1125,12 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 5460, + "logic element": 5550, "latch": 193, - "Longest Path": 1580, + "Longest Path": 1364, "Average Path": 4, - "Estimated LUTs": 5460, - "Total Node": 5654 + "Estimated LUTs": 5550, + "Total Node": 5744 }, "syntax/expression_in_chain_modules/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/expression_in_chain_modules/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1155,12 +1145,12 @@ "Latch Drivers": 1, "Pi": 8, "Po": 16, - "latch": 17, + "latch": 14, "Adder": 17, "generic logic size": 4, "Longest Path": 11, "Average Path": 3, - "Total Node": 35 + "Total Node": 32 }, "syntax/expression_in_chain_modules/no_arch": { "test_name": "syntax/expression_in_chain_modules/no_arch", @@ -1175,11 +1165,11 @@ "Pi": 8, "Po": 16, "logic element": 25, - "latch": 17, + "latch": 14, "Longest Path": 10, "Average Path": 3, "Estimated LUTs": 25, - "Total Node": 43 + "Total Node": 40 }, "syntax/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/fir_scu_rtl_restructured_for_cmm_exp/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1267,13 +1257,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 4, + "logic element": 5, "latch": 4, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 9 + "Estimated LUTs": 5, + "Total Node": 10 }, "syntax/for_loop_adv_post/no_arch": { "test_name": "syntax/for_loop_adv_post/no_arch", @@ -1287,12 +1277,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 4, + "logic element": 5, "latch": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 9 + "Estimated LUTs": 5, + "Total Node": 10 }, "syntax/for_loop_adv_pre/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/for_loop_adv_pre/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1307,13 +1297,13 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/for_loop_adv_pre/no_arch": { "test_name": "syntax/for_loop_adv_pre/no_arch", @@ -1327,12 +1317,12 @@ "Latch Drivers": 1, "Pi": 9, "Po": 8, - "logic element": 8, + "logic element": 9, "latch": 8, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 4, - "Estimated LUTs": 8, - "Total Node": 17 + "Estimated LUTs": 9, + "Total Node": 18 }, "syntax/freq_division/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/freq_division/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1347,13 +1337,13 @@ "Latch Drivers": 1, "Pi": 1, "Po": 4, - "logic element": 38, + "logic element": 37, "latch": 3, "generic logic size": 4, - "Longest Path": 18, + "Longest Path": 21, "Average Path": 3, - "Estimated LUTs": 38, - "Total Node": 42 + "Estimated LUTs": 37, + "Total Node": 41 }, "syntax/freq_division/no_arch": { "test_name": "syntax/freq_division/no_arch", @@ -1367,12 +1357,12 @@ "Latch Drivers": 1, "Pi": 1, "Po": 4, - "logic element": 38, + "logic element": 37, "latch": 3, - "Longest Path": 18, + "Longest Path": 21, "Average Path": 3, - "Estimated LUTs": 38, - "Total Node": 42 + "Estimated LUTs": 37, + "Total Node": 41 }, "syntax/function_automatic/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/function_automatic/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1468,12 +1458,12 @@ "synthesis_time(ms)": 43.5, "Pi": 2, "Po": 1, - "logic element": 3, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/function_syntax/no_arch": { "test_name": "syntax/function_syntax/no_arch", @@ -1486,11 +1476,11 @@ "synthesis_time(ms)": 41.6, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/h7_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/h7_of_8_bit_for_pass_through/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1505,13 +1495,13 @@ "Latch Drivers": 1, "Pi": 8, "Po": 8, - "logic element": 7, + "logic element": 8, "latch": 7, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 15 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 8, + "Total Node": 16 }, "syntax/h7_of_8_bit_for_pass_through/no_arch": { "test_name": "syntax/h7_of_8_bit_for_pass_through/no_arch", @@ -1525,12 +1515,12 @@ "Latch Drivers": 1, "Pi": 8, "Po": 8, - "logic element": 7, + "logic element": 8, "latch": 7, - "Longest Path": 4, - "Average Path": 3, - "Estimated LUTs": 7, - "Total Node": 15 + "Longest Path": 5, + "Average Path": 4, + "Estimated LUTs": 8, + "Total Node": 16 }, "syntax/ifdef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/ifdef-else-syntax/k6_frac_N10_frac_chain_mem32K_40nm", @@ -1982,13 +1972,13 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 4, + "logic element": 5, "latch": 4, "generic logic size": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 9 + "Estimated LUTs": 5, + "Total Node": 10 }, "syntax/l2_and_h2_of_8_bit_for_pass_through/no_arch": { "test_name": "syntax/l2_and_h2_of_8_bit_for_pass_through/no_arch", @@ -2002,12 +1992,12 @@ "Latch Drivers": 1, "Pi": 5, "Po": 8, - "logic element": 4, + "logic element": 5, "latch": 4, - "Longest Path": 4, + "Longest Path": 5, "Average Path": 3, - "Estimated LUTs": 4, - "Total Node": 9 + "Estimated LUTs": 5, + "Total Node": 10 }, "syntax/macro_in_module_declaration/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/macro_in_module_declaration/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2075,14 +2065,14 @@ "Latch Drivers": 1, "Pi": 38, "Po": 32, - "logic element": 64, + "logic element": 129, "latch": 32, "Memory": 32, "generic logic size": 4, - "Longest Path": 6, + "Longest Path": 7, "Average Path": 4, - "Estimated LUTs": 64, - "Total Node": 129 + "Estimated LUTs": 129, + "Total Node": 194 }, "syntax/memlooptesting/no_arch": { "test_name": "syntax/memlooptesting/no_arch", @@ -2096,12 +2086,12 @@ "Latch Drivers": 1, "Pi": 38, "Po": 32, - "logic element": 1156, + "logic element": 1221, "latch": 544, - "Longest Path": 12, + "Longest Path": 13, "Average Path": 5, - "Estimated LUTs": 1156, - "Total Node": 1701 + "Estimated LUTs": 1221, + "Total Node": 1766 }, "syntax/memory_combinational/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/memory_combinational/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2116,15 +2106,15 @@ "Latch Drivers": 1, "Pi": 79, "Po": 32, - "logic element": 82, + "logic element": 110, "latch": 1, "Adder": 2, "Memory": 32, "generic logic size": 4, - "Longest Path": 9, - "Average Path": 5, - "Estimated LUTs": 82, - "Total Node": 118 + "Longest Path": 11, + "Average Path": 6, + "Estimated LUTs": 110, + "Total Node": 146 }, "syntax/memory_combinational/no_arch": { "test_name": "syntax/memory_combinational/no_arch", @@ -2138,12 +2128,12 @@ "Latch Drivers": 1, "Pi": 79, "Po": 32, - "logic element": 25987, + "logic element": 26015, "latch": 8193, - "Longest Path": 15, - "Average Path": 6, - "Estimated LUTs": 25987, - "Total Node": 34181 + "Longest Path": 17, + "Average Path": 7, + "Estimated LUTs": 26015, + "Total Node": 34209 }, "syntax/mix_expression_in_function_port/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/mix_expression_in_function_port/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2302,13 +2292,13 @@ "Latch Drivers": 2, "Pi": 4, "Po": 4, - "logic element": 173, - "latch": 33, + "logic element": 113, + "latch": 43, "generic logic size": 4, - "Longest Path": 32, + "Longest Path": 27, "Average Path": 4, - "Estimated LUTs": 173, - "Total Node": 208 + "Estimated LUTs": 113, + "Total Node": 158 }, "syntax/multi_clock_reader_writer/no_arch": { "test_name": "syntax/multi_clock_reader_writer/no_arch", @@ -2322,21 +2312,17 @@ "Latch Drivers": 2, "Pi": 4, "Po": 4, - "logic element": 173, - "latch": 33, - "Longest Path": 32, + "logic element": 113, + "latch": 43, + "Longest Path": 27, "Average Path": 4, - "Estimated LUTs": 173, - "Total Node": 208 + "Estimated LUTs": 113, + "Total Node": 158 }, "syntax/multi_edge_reader_writer/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/multi_edge_reader_writer/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "multi_edge_reader_writer.v", - "warnings": [ - "[NETLIST] Input pin (multiclock_reader_writer^addr_read~2) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (multiclock_reader_writer^addr_write~2) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 69.8, "exec_time(ms)": 182.9, "elaboration_time(ms)": 72.8, @@ -2354,10 +2340,6 @@ "syntax/multi_edge_reader_writer/no_arch": { "test_name": "syntax/multi_edge_reader_writer/no_arch", "verilog": "multi_edge_reader_writer.v", - "warnings": [ - "[NETLIST] Input pin (multiclock_reader_writer^addr_read~2) exceeds the size of its connected port, will be left unconnected", - "[NETLIST] Input pin (multiclock_reader_writer^addr_write~2) exceeds the size of its connected port, will be left unconnected" - ], "max_rss(MiB)": 49.9, "exec_time(ms)": 68, "elaboration_time(ms)": 60.8, @@ -2678,15 +2660,15 @@ "Latch Drivers": 1, "Pi": 12, "Po": 7, - "logic element": 3409, + "logic element": 2369, "latch": 517, "Adder": 31, "Multiplier": 13, "generic logic size": 4, - "Longest Path": 1092, - "Average Path": 7, - "Estimated LUTs": 3516, - "Total Node": 3971 + "Longest Path": 1034, + "Average Path": 8, + "Estimated LUTs": 2369, + "Total Node": 2931 }, "syntax/rs_decoder_1/no_arch": { "test_name": "syntax/rs_decoder_1/no_arch", @@ -2700,12 +2682,12 @@ "Latch Drivers": 1, "Pi": 12, "Po": 7, - "logic element": 3856, + "logic element": 2816, "latch": 517, - "Longest Path": 1332, - "Average Path": 7, - "Estimated LUTs": 3856, - "Total Node": 4374 + "Longest Path": 1224, + "Average Path": 8, + "Estimated LUTs": 2816, + "Total Node": 3334 }, "syntax/rs_decoder_2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/rs_decoder_2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2720,15 +2702,15 @@ "Latch Drivers": 1, "Pi": 20, "Po": 11, - "logic element": 11071, + "logic element": 5632, "latch": 616, "Adder": 41, "Multiplier": 9, "generic logic size": 4, - "Longest Path": 1191, - "Average Path": 8, - "Estimated LUTs": 13011, - "Total Node": 11738 + "Longest Path": 1152, + "Average Path": 9, + "Estimated LUTs": 5632, + "Total Node": 6299 }, "syntax/rs_decoder_2/no_arch": { "test_name": "syntax/rs_decoder_2/no_arch", @@ -2742,12 +2724,12 @@ "Latch Drivers": 1, "Pi": 20, "Po": 11, - "logic element": 12116, + "logic element": 6677, "latch": 616, - "Longest Path": 1646, + "Longest Path": 1491, "Average Path": 8, - "Estimated LUTs": 12116, - "Total Node": 12733 + "Estimated LUTs": 6677, + "Total Node": 7294 }, "syntax/sign_extend_nomem/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/sign_extend_nomem/k6_frac_N10_frac_chain_mem32K_40nm", @@ -2762,13 +2744,13 @@ "Latch Drivers": 1, "Pi": 37, "Po": 32, - "logic element": 82, + "logic element": 110, "latch": 1, "generic logic size": 4, - "Longest Path": 8, - "Average Path": 5, - "Estimated LUTs": 82, - "Total Node": 84 + "Longest Path": 11, + "Average Path": 6, + "Estimated LUTs": 110, + "Total Node": 112 }, "syntax/sign_extend_nomem/no_arch": { "test_name": "syntax/sign_extend_nomem/no_arch", @@ -2782,12 +2764,12 @@ "Latch Drivers": 1, "Pi": 37, "Po": 32, - "logic element": 82, + "logic element": 110, "latch": 1, - "Longest Path": 8, - "Average Path": 5, - "Estimated LUTs": 82, - "Total Node": 84 + "Longest Path": 11, + "Average Path": 6, + "Estimated LUTs": 110, + "Total Node": 112 }, "syntax/simple_function/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/simple_function/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3015,12 +2997,12 @@ "synthesis_time(ms)": 62, "Pi": 2, "Po": 1, - "logic element": 3, + "logic element": 1, "generic logic size": 4, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/timescale_syntax/no_arch": { "test_name": "syntax/timescale_syntax/no_arch", @@ -3033,11 +3015,11 @@ "synthesis_time(ms)": 50.6, "Pi": 2, "Po": 1, - "logic element": 3, - "Longest Path": 4, - "Average Path": 4, - "Estimated LUTs": 3, - "Total Node": 3 + "logic element": 1, + "Longest Path": 3, + "Average Path": 3, + "Estimated LUTs": 1, + "Total Node": 1 }, "syntax/top_and/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/top_and/k6_frac_N10_frac_chain_mem32K_40nm", @@ -3126,12 +3108,12 @@ "synthesis_time(ms)": 94.8, "Pi": 4, "Po": 4, - "logic element": 2, + "logic element": 4, "generic logic size": 4, - "Longest Path": 3, - "Average Path": 2, - "Estimated LUTs": 2, - "Total Node": 2 + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "syntax/unordered_ports/no_arch": { "test_name": "syntax/unordered_ports/no_arch", @@ -3144,11 +3126,11 @@ "synthesis_time(ms)": 60.3, "Pi": 4, "Po": 4, - "logic element": 2, - "Longest Path": 3, - "Average Path": 2, - "Estimated LUTs": 2, - "Total Node": 2 + "logic element": 4, + "Longest Path": 4, + "Average Path": 3, + "Estimated LUTs": 4, + "Total Node": 4 }, "syntax/vector_and/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "syntax/vector_and/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/ODIN_II/regression_test/benchmark/task/yosys+odin/vtr/synthesis_result.json b/ODIN_II/regression_test/benchmark/task/yosys+odin/vtr/synthesis_result.json index 1ae3bc491e3..ad47e63ad83 100644 --- a/ODIN_II/regression_test/benchmark/task/yosys+odin/vtr/synthesis_result.json +++ b/ODIN_II/regression_test/benchmark/task/yosys+odin/vtr/synthesis_result.json @@ -24,6 +24,28 @@ "test_name": "vtr/arm_core/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "arm_core.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~4: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~5: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~6: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~8: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~9: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~10: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~11: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~12: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~13: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_fetch.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~14: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~4: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~5: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~6: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~8: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~9: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~10: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~11: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~12: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~13: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin arm_core^u_mem.address_cachable_$logic_and_Y_A_$logic_or_Y_A_$_NOT__Y_A_$_OR__Y_B_$_AND__Y_B_$_AND__A_Y~14: not available." + ], "max_rss(MiB)": 76.2, "exec_time(ms)": 8172.4, "elaboration_time(ms)": 8032.3, @@ -33,20 +55,51 @@ "Latch Drivers": 1, "Pi": 132, "Po": 179, - "logic element": 24491, - "latch": 3500, - "Adder": 380, + "logic element": 22351, + "latch": 3510, + "Adder": 451, "Memory": 1192, "generic logic size": 4, - "Longest Path": 5301, + "Longest Path": 3942, "Average Path": 5, - "Estimated LUTs": 25093, - "Total Node": 29564 + "Estimated LUTs": 22351, + "Total Node": 27505 }, "vtr/bgm/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/bgm/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "bgm.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a7_add.u4.fract_in_shftl_1_$pmux_Y_S_5_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a2_add.u4.fract_in_shftl_1_$pmux_Y_S_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_B~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a4_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a0_add.u4.fract_in_shftl_1_$pmux_Y_S_7_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a1_add.u4.fract_in_shftl_1_$pmux_Y_S_9_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a6_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a8_add.u4.fract_in_shftl_1_$pmux_Y_S_3_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a5_add.u4.fract_in_shftl_1_$pmux_Y_S_6_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin bgm^a3_add.u4.fract_in_shftl_1_$pmux_Y_S_2_$_NOT__Y_A_$_OR__Y_A_$_OR__Y_A_$_OR__Y_B_$_OR__B_A_$_OR__A_Y~2: not available." + ], "max_rss(MiB)": 417.7, "exec_time(ms)": 21582.8, "elaboration_time(ms)": 21024.8, @@ -56,15 +109,15 @@ "Latch Drivers": 1, "Pi": 256, "Po": 32, - "logic element": 81481, - "latch": 5140, + "logic element": 94683, + "latch": 5132, "Adder": 2511, "Multiplier": 11, "generic logic size": 4, - "Longest Path": 2149, + "Longest Path": 2005, "Average Path": 5, - "Estimated LUTs": 93220, - "Total Node": 89144 + "Estimated LUTs": 94683, + "Total Node": 102338 }, "vtr/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/blob_merge/k6_frac_N10_frac_chain_mem32K_40nm", @@ -79,14 +132,14 @@ "Latch Drivers": 1, "Pi": 35, "Po": 100, - "logic element": 18113, - "latch": 552, - "Adder": 3564, + "logic element": 20105, + "latch": 586, + "Adder": 3612, "generic logic size": 4, - "Longest Path": 451, + "Longest Path": 932, "Average Path": 4, - "Estimated LUTs": 19466, - "Total Node": 22230 + "Estimated LUTs": 20105, + "Total Node": 24304 }, "vtr/boundtop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/boundtop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -101,15 +154,15 @@ "Latch Drivers": 1, "Pi": 273, "Po": 193, - "logic element": 4204, - "latch": 871, - "Adder": 151, + "logic element": 5776, + "latch": 1126, + "Adder": 233, "Memory": 32, "generic logic size": 4, - "Longest Path": 416, - "Average Path": 4, - "Estimated LUTs": 4510, - "Total Node": 5259 + "Longest Path": 639, + "Average Path": 5, + "Estimated LUTs": 5776, + "Total Node": 7168 }, "vtr/ch_intrinsics/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/ch_intrinsics/k6_frac_N10_frac_chain_mem32K_40nm", @@ -124,14 +177,14 @@ "Latch Drivers": 1, "Pi": 98, "Po": 130, - "logic element": 437, - "latch": 199, + "logic element": 395, + "latch": 210, "Memory": 8, "generic logic size": 4, - "Longest Path": 54, + "Longest Path": 53, "Average Path": 3, - "Estimated LUTs": 462, - "Total Node": 645 + "Estimated LUTs": 395, + "Total Node": 614 }, "vtr/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/diffeq1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -146,15 +199,15 @@ "Latch Drivers": 1, "Pi": 161, "Po": 96, - "logic element": 551, + "logic element": 641, "latch": 193, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 126, + "Longest Path": 93, "Average Path": 4, - "Estimated LUTs": 561, - "Total Node": 882 + "Estimated LUTs": 641, + "Total Node": 972 }, "vtr/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/diffeq2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -169,15 +222,15 @@ "Latch Drivers": 1, "Pi": 65, "Po": 96, - "logic element": 351, + "logic element": 441, "latch": 96, "Adder": 132, "Multiplier": 5, "generic logic size": 4, - "Longest Path": 119, + "Longest Path": 92, "Average Path": 4, - "Estimated LUTs": 361, - "Total Node": 585 + "Estimated LUTs": 441, + "Total Node": 675 }, "vtr/LU32PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/LU32PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -192,16 +245,16 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 182551, - "latch": 20642, - "Adder": 13784, + "logic element": 240313, + "latch": 19711, + "Adder": 13473, "Multiplier": 32, "Memory": 5251, "generic logic size": 4, - "Longest Path": 4942, - "Average Path": 4, - "Estimated LUTs": 193255, - "Total Node": 222261 + "Longest Path": 5349, + "Average Path": 5, + "Estimated LUTs": 240313, + "Total Node": 278781 }, "vtr/LU64PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/LU64PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -216,16 +269,16 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 355345, - "latch": 39209, - "Adder": 25875, + "logic element": 470738, + "latch": 37320, + "Adder": 25215, "Multiplier": 64, "Memory": 10372, "generic logic size": 4, - "Longest Path": 4987, - "Average Path": 4, - "Estimated LUTs": 376132, - "Total Node": 430866 + "Longest Path": 5387, + "Average Path": 5, + "Estimated LUTs": 470738, + "Total Node": 543710 }, "vtr/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/LU8PEEng/k6_frac_N10_frac_chain_mem32K_40nm", @@ -240,21 +293,24 @@ "Latch Drivers": 1, "Pi": 113, "Po": 102, - "logic element": 52847, - "latch": 6468, - "Adder": 4682, + "logic element": 67327, + "latch": 6253, + "Adder": 4629, "Multiplier": 8, "Memory": 1409, "generic logic size": 4, - "Longest Path": 4878, + "Longest Path": 5292, "Average Path": 4, - "Estimated LUTs": 56141, - "Total Node": 65415 + "Estimated LUTs": 67327, + "Total Node": 79627 }, "vtr/mcml/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/mcml/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "mcml.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin mcml^c_state_$pmux_Y_B_3_$mux_Y_A_$mux_Y_S_$_OR__Y_A_$_NOT__Y_A~2: not available." + ], "max_rss(MiB)": 646.3, "exec_time(ms)": 98273.3, "elaboration_time(ms)": 97255.6, @@ -264,16 +320,16 @@ "Latch Drivers": 1, "Pi": 35, "Po": 356, - "logic element": 184072, - "latch": 51617, - "Adder": 27390, + "logic element": 194233, + "latch": 51836, + "Adder": 25169, "Multiplier": 27, "Memory": 348, "generic logic size": 4, - "Longest Path": 19937, + "Longest Path": 11605, "Average Path": 4, - "Estimated LUTs": 192874, - "Total Node": 263455 + "Estimated LUTs": 194233, + "Total Node": 271614 }, "vtr/mkDelayWorker32B/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/mkDelayWorker32B/k6_frac_N10_frac_chain_mem32K_40nm", @@ -288,15 +344,15 @@ "Latch Drivers": 1, "Pi": 510, "Po": 553, - "logic element": 13897, - "latch": 2309, - "Adder": 768, + "logic element": 17510, + "latch": 2357, + "Adder": 786, "Memory": 1336, "generic logic size": 4, - "Longest Path": 319, - "Average Path": 4, - "Estimated LUTs": 14663, - "Total Node": 18311 + "Longest Path": 357, + "Average Path": 5, + "Estimated LUTs": 17510, + "Total Node": 21990 }, "vtr/mkPktMerge/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/mkPktMerge/k6_frac_N10_frac_chain_mem32K_40nm", @@ -311,15 +367,15 @@ "Latch Drivers": 1, "Pi": 310, "Po": 156, - "logic element": 515, + "logic element": 407, "latch": 36, "Adder": 42, "Memory": 459, "generic logic size": 4, - "Longest Path": 105, + "Longest Path": 85, "Average Path": 4, - "Estimated LUTs": 515, - "Total Node": 1053 + "Estimated LUTs": 407, + "Total Node": 945 }, "vtr/mkSMAdapter4B/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/mkSMAdapter4B/k6_frac_N10_frac_chain_mem32K_40nm", @@ -334,15 +390,15 @@ "Latch Drivers": 1, "Pi": 192, "Po": 205, - "logic element": 5749, - "latch": 901, - "Adder": 344, + "logic element": 6591, + "latch": 919, + "Adder": 365, "Memory": 153, "generic logic size": 4, - "Longest Path": 387, - "Average Path": 4, - "Estimated LUTs": 5880, - "Total Node": 7148 + "Longest Path": 327, + "Average Path": 5, + "Estimated LUTs": 6591, + "Total Node": 8029 }, "vtr/multiclock_output_and_latch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/multiclock_output_and_latch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -379,14 +435,14 @@ "Latch Drivers": 2, "Pi": 1, "Po": 1, - "logic element": 58, + "logic element": 56, "latch": 11, "Adder": 8, "generic logic size": 4, - "Longest Path": 19, - "Average Path": 5, - "Estimated LUTs": 58, - "Total Node": 79 + "Longest Path": 21, + "Average Path": 6, + "Estimated LUTs": 56, + "Total Node": 77 }, "vtr/multiclock_separate_and_latch/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/multiclock_separate_and_latch/k6_frac_N10_frac_chain_mem32K_40nm", @@ -413,6 +469,9 @@ "test_name": "vtr/or1200/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "or1200.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin or1200_flat^or1200_sprs.spr_dat_cfgr_$mux_Y_1_S_$_NOT__Y_A_$_OR__Y_B_$_OR__B_1_A~1: not available." + ], "max_rss(MiB)": 31.3, "exec_time(ms)": 2043.5, "elaboration_time(ms)": 2011.3, @@ -422,16 +481,16 @@ "Latch Drivers": 1, "Pi": 384, "Po": 394, - "logic element": 7082, - "latch": 692, + "logic element": 7935, + "latch": 693, "Adder": 496, "Multiplier": 1, "Memory": 64, "generic logic size": 4, - "Longest Path": 1732, - "Average Path": 5, - "Estimated LUTs": 7444, - "Total Node": 8336 + "Longest Path": 1785, + "Average Path": 6, + "Estimated LUTs": 7935, + "Total Node": 9190 }, "vtr/raygentop/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/raygentop/k6_frac_N10_frac_chain_mem32K_40nm", @@ -446,16 +505,16 @@ "Latch Drivers": 1, "Pi": 235, "Po": 305, - "logic element": 2716, - "latch": 1032, - "Adder": 413, + "logic element": 3249, + "latch": 951, + "Adder": 419, "Multiplier": 15, "Memory": 21, "generic logic size": 4, - "Longest Path": 108, + "Longest Path": 205, "Average Path": 4, - "Estimated LUTs": 2775, - "Total Node": 4198 + "Estimated LUTs": 3249, + "Total Node": 4656 }, "vtr/sha/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/sha/k6_frac_N10_frac_chain_mem32K_40nm", @@ -470,14 +529,14 @@ "Latch Drivers": 1, "Pi": 37, "Po": 36, - "logic element": 4836, - "latch": 910, + "logic element": 5453, + "latch": 894, "Adder": 309, "generic logic size": 4, - "Longest Path": 2422, + "Longest Path": 2989, "Average Path": 4, - "Estimated LUTs": 5059, - "Total Node": 6056 + "Estimated LUTs": 5453, + "Total Node": 6657 }, "vtr/single_ff/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/single_ff/k6_frac_N10_frac_chain_mem32K_40nm", @@ -527,21 +586,25 @@ "Latch Drivers": 1, "Pi": 44, "Po": 32, - "logic element": 2656, - "latch": 224, + "logic element": 2535, + "latch": 231, "Adder": 62, "Multiplier": 1, "Memory": 128, "generic logic size": 4, - "Longest Path": 744, - "Average Path": 3, - "Estimated LUTs": 2920, - "Total Node": 3072 + "Longest Path": 765, + "Average Path": 4, + "Estimated LUTs": 2535, + "Total Node": 2958 }, "vtr/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/stereovision0/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "verilog": "stereovision0.v", + "warnings": [ + "[PARSE_BLIF] Warn: Could not hook up the pin sv_chip0_hierarchy_no_mem^tm3_vidout_clock_$reduce_and_A_A_3_$ne_Y_A_$pmux_S.Y_$_AND__Y_A_$_OR__Y_B~2: not available.", + "[PARSE_BLIF] Warn: Could not hook up the pin sv_chip0_hierarchy_no_mem^tm3_vidout_hsync_$dffe_Q_D_$mux_Y_S_$and_Y_B_$_OR__Y_A_$_NOT__Y_A_$_OR__Y_A_$_OR__A_Y~4: not available." + ], "max_rss(MiB)": 63.5, "exec_time(ms)": 3177.7, "elaboration_time(ms)": 3100.8, @@ -551,14 +614,14 @@ "Latch Drivers": 1, "Pi": 168, "Po": 197, - "logic element": 8945, - "latch": 11833, - "Adder": 2729, + "logic element": 10710, + "latch": 11749, + "Adder": 2731, "generic logic size": 4, - "Longest Path": 168, - "Average Path": 4, - "Estimated LUTs": 9089, - "Total Node": 23508 + "Longest Path": 180, + "Average Path": 5, + "Estimated LUTs": 10710, + "Total Node": 25191 }, "vtr/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/stereovision1/k6_frac_N10_frac_chain_mem32K_40nm", @@ -573,15 +636,15 @@ "Latch Drivers": 1, "Pi": 132, "Po": 145, - "logic element": 11207, - "latch": 11449, + "logic element": 12102, + "latch": 11522, "Adder": 2332, "Multiplier": 152, "generic logic size": 4, - "Longest Path": 200, + "Longest Path": 193, "Average Path": 4, - "Estimated LUTs": 11234, - "Total Node": 25141 + "Estimated LUTs": 12102, + "Total Node": 26109 }, "vtr/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/stereovision2/k6_frac_N10_frac_chain_mem32K_40nm", @@ -596,15 +659,15 @@ "Latch Drivers": 1, "Pi": 148, "Po": 182, - "logic element": 10343, - "latch": 15833, - "Adder": 12471, + "logic element": 10771, + "latch": 15657, + "Adder": 12153, "Multiplier": 468, "generic logic size": 4, - "Longest Path": 138, + "Longest Path": 139, "Average Path": 4, - "Estimated LUTs": 10357, - "Total Node": 39116 + "Estimated LUTs": 10771, + "Total Node": 39050 }, "vtr/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vtr/stereovision3/k6_frac_N10_frac_chain_mem32K_40nm", @@ -619,14 +682,14 @@ "Latch Drivers": 2, "Pi": 9, "Po": 30, - "logic element": 1140, - "latch": 99, + "logic element": 592, + "latch": 120, "Adder": 28, "generic logic size": 4, - "Longest Path": 77, + "Longest Path": 128, "Average Path": 4, - "Estimated LUTs": 1453, - "Total Node": 1269 + "Estimated LUTs": 592, + "Total Node": 742 }, "DEFAULT": { "test_name": "n/a", diff --git a/ODIN_II/regression_test/benchmark/verilog/common/1r.v b/ODIN_II/regression_test/benchmark/verilog/common/1r.v index 42ff7f63c37..926b6fe53c5 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/1r.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/1r.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/1r2w.v b/ODIN_II/regression_test/benchmark/verilog/common/1r2w.v index 9bfdb340863..0c9c27b69a3 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/1r2w.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/1r2w.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 32 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/2r.v b/ODIN_II/regression_test/benchmark/verilog/common/2r.v index f1fe97335bf..3c28a714649 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/2r.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/2r.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/2r1w.v b/ODIN_II/regression_test/benchmark/verilog/common/2r1w.v index 21850fc445f..74e502bf3bd 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/2r1w.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/2r1w.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 32 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/2r2w.v b/ODIN_II/regression_test/benchmark/verilog/common/2r2w.v index 5dd985998ad..78c7c7668a4 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/2r2w.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/2r2w.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/bram.v b/ODIN_II/regression_test/benchmark/verilog/common/bram.v index 406e9b0e4e0..9d45a7ddfdd 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/bram.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/bram.v @@ -1,6 +1,6 @@ // DEFINES -`define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 8 +`define DEPTH 64 // Depth of memory +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/div.v b/ODIN_II/regression_test/benchmark/verilog/common/div.v index 93fe640c6e8..8a13b347b4a 100644 --- a/ODIN_II/regression_test/benchmark/verilog/common/div.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/div.v @@ -4,7 +4,7 @@ module div (A, B, Y); parameter B_SIGNED = 0; parameter A_WIDTH = 4; parameter B_WIDTH = 4; - parameter Y_WIDTH = 7; + parameter Y_WIDTH = 4; input [A_WIDTH-1:0] A; input [B_WIDTH-1:0] B; diff --git a/ODIN_II/regression_test/benchmark/verilog/common/mem.v b/ODIN_II/regression_test/benchmark/verilog/common/mem.v index 90c120d1567..469c78d353c 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/mem.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/mem.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/memrd.v b/ODIN_II/regression_test/benchmark/verilog/common/memrd.v index 9caf54b6a18..e7fee6ac208 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/memrd.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/memrd.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/mod.v b/ODIN_II/regression_test/benchmark/verilog/common/mod.v index af96113c77a..ea028c71eac 100644 --- a/ODIN_II/regression_test/benchmark/verilog/common/mod.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/mod.v @@ -4,7 +4,7 @@ module mod (A, B, Y); parameter B_SIGNED = 0; parameter A_WIDTH = 4; parameter B_WIDTH = 4; - parameter Y_WIDTH = 7; + parameter Y_WIDTH = 4; input [A_WIDTH-1:0] A; input [B_WIDTH-1:0] B; diff --git a/ODIN_II/regression_test/benchmark/verilog/common/nr.v b/ODIN_II/regression_test/benchmark/verilog/common/nr.v index 2e8454aee4e..d1a26fe56b3 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/nr.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/nr.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/nrnw.v b/ODIN_II/regression_test/benchmark/verilog/common/nrnw.v index 366a0a1ca55..fba68737ac3 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/nrnw.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/nrnw.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/common/rom.v b/ODIN_II/regression_test/benchmark/verilog/common/rom.v index bc4e4fd8097..d36a558761e 100755 --- a/ODIN_II/regression_test/benchmark/verilog/common/rom.v +++ b/ODIN_II/regression_test/benchmark/verilog/common/rom.v @@ -1,6 +1,6 @@ // DEFINES `define DEPTH 16 // Depth of memory -`define ADDR_WIDTH 4 +`define ADDR_WIDTH $clog2(`DEPTH) `define DATA_WIDTH 8 // Width of memory // TOP MODULE diff --git a/ODIN_II/regression_test/benchmark/verilog/full/blob_merge_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/blob_merge_yosys_output index 7aaab789e10..97b1996575c 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/blob_merge_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/blob_merge_yosys_output @@ -1,398 +1,398 @@ oReadFifoRequest oWriteBlobData oWriteRequest oAvgSizeXaxis oAvgSizeYaxis -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -x xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -1 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -1 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -1 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -1 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx -0 xxxxxxxxxxxxxxxxxxxxxx00000000000000000000000xxxxxxxxxx0xxxxxxxxxx000000000x x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +x xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +1 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +1 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +1 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +1 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx +0 xxxxxxxxxxxxxxxxxxxxxx0000000000000000000000xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxx xxxxxxxxxxx diff --git a/ODIN_II/regression_test/benchmark/verilog/full/bm_base_memory_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/bm_base_memory_yosys_output index 467303ea576..e947a258d05 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/bm_base_memory_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/bm_base_memory_yosys_output @@ -1,8 +1,8 @@ value_out out1 out2 -xxxx xxxx 0X0 -xxxx xxxx 0X0 -xxxx xxxx 0X0 -xxxx xxxx 0X0 +xxxx xxxx xxxx +xxxx xxxx xxxx +xxxx xxxx xxxx +xxxx xxxx xxxx xxxx x00x 0X0 xxxx x00x 0X0 xxxx x00x 0X0 diff --git a/ODIN_II/regression_test/benchmark/verilog/full/mcml_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/mcml_yosys_output index c3043d6e6e6..f6857fbee3a 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/mcml_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/mcml_yosys_output @@ -11,18 +11,18 @@ xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxx 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 0 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 0 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 0 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0001 0Xedaed3c1 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 xxxxxxxx00000000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0001 0Xedaed3c1 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 xxxxxxxx00000000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 xxxxxxxx00000000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 xxxxxxxx00000000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0001 0X5cd28abb 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0000 0X0001 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0002 0X5f859089 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0002 0X4e61d209 0X00000000 0X00000000 0X00000000 0X00000000 -0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 0X0000 xxxxxxxx00000000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 0X0000 xxxxxxxx00000000 0X0000000000000000 1 0X1 0X1 0X0001 0X0002 0X5f859089 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 0X0000 xxxxxxxx00000000 0X0000000000000000 1 0X1 0X1 0X0001 0X0002 0X4e61d209 0X00000000 0X00000000 0X00000000 0X00000000 +0X00000000 0 0X0000 0X0000 0X0000 xxxxxxxx00000000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0001 0X9bf0d37e 0X9bf0d37e 0X00000000 0X00000000 0X00000000 0X00000000 0 0X0000 0X0000 0X0000 0X0000 0X0000000000000000 1 0X1 0X1 0X0001 0X0002 0X74d051cf 0X9bf0d37e 0X00000000 0X00000000 0X00000000 diff --git a/ODIN_II/regression_test/benchmark/verilog/full/oc54_cpu_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/oc54_cpu_yosys_output index 6b9298b8959..74ffa836872 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/oc54_cpu_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/oc54_cpu_yosys_output @@ -27,10 +27,10 @@ x x x x 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 0 1 0 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 0 1 0 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 0 1 0 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 0 1 0 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 0 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 0 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 0 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 0 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx @@ -39,38 +39,38 @@ x x x x 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 1 1 x 1 1 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 1 1 x 1 1 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 1 1 x 1 1 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -1 x x 1 1 x 1 1 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx -x 1 x 1 1 0 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 -x 1 x 1 1 0 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 -x 1 x 1 1 0 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 -x 1 x 1 1 0 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xffff -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xffff -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xffff -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xffff -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -0 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -0 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -0 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -0 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe -1 0 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0X2520 -1 0 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0X2520 -1 0 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0X2520 -1 0 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0X2520 +1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +1 x x 1 1 x 1 x xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx +x x x 0 1 x 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 +x x x 0 1 x 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 +x x x 0 1 x 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 +x x x 0 1 x 1 0 xxxxxxxxxxxxxxxx xxxxxxxxxxx00000 +x 1 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0Xffff +x 1 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0Xffff +x 1 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0Xffff +x 1 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0Xffff +x 1 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe +x 1 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe +x 1 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe +x 1 1 0 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe +0 1 1 1 1 x 1 0 xxxxxxxxxxxxxxx1 0Xfffe +0 1 1 1 1 x 1 0 xxxxxxxxxxxxxxx1 0Xfffe +0 1 1 1 1 x 1 0 xxxxxxxxxxxxxxx1 0Xfffe +0 1 1 1 1 x 1 0 xxxxxxxxxxxxxxx1 0Xfffe +1 0 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0X2520 +1 0 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0X2520 +1 0 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0X2520 +1 0 1 0 1 x 1 0 xxxxxxxxxxxxxxx1 0X2520 1 1 1 0 1 0 1 0 xxxxxxxxxxxxxx11 0Xffff 1 1 1 0 1 0 1 0 xxxxxxxxxxxxxx11 0Xffff 1 1 1 0 1 0 1 0 xxxxxxxxxxxxxx11 0Xffff 1 1 1 0 1 0 1 0 xxxxxxxxxxxxxx11 0Xffff -0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff -0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff -0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff -0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff +0 1 1 0 1 0 1 0 xxxxxxxxxxxxx111 0Xffff +0 1 1 0 1 0 1 0 xxxxxxxxxxxxx111 0Xffff +0 1 1 0 1 0 1 0 xxxxxxxxxxxxx111 0Xffff +0 1 1 0 1 0 1 0 xxxxxxxxxxxxx111 0Xffff 0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff 0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff 0 1 1 1 1 0 1 0 xxxxxxxxxxxxx111 0Xffff @@ -279,10 +279,10 @@ x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe 1 1 1 0 1 0 1 0 xxx1111111101011 0Xffff 1 1 1 0 1 0 1 0 xxx1111111101011 0Xffff 1 1 1 0 1 0 1 0 xxx1111111101011 0Xffff -0 1 1 1 1 0 1 0 xxx1111111101011 0Xffff -0 1 1 1 1 0 1 0 xxx1111111101011 0Xffff -0 1 1 1 1 0 1 0 xxx1111111101011 0Xffff -0 1 1 1 1 0 1 0 xxx1111111101011 0Xffff +0 1 1 0 1 0 1 0 xxx1111111101011 0Xffff +0 1 1 0 1 0 1 0 xxx1111111101011 0Xffff +0 1 1 0 1 0 1 0 xxx1111111101011 0Xffff +0 1 1 0 1 0 1 0 xxx1111111101011 0Xffff 1 0 1 0 1 0 1 0 xx11111111010111 0Xffff 1 0 1 0 1 0 1 0 xx11111111010111 0Xffff 1 0 1 0 1 0 1 0 xx11111111010111 0Xffff @@ -363,10 +363,10 @@ x 1 1 1 1 0 1 0 xxxxxxxxxxxxxxx1 0Xfffe 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 -1 1 1 1 1 0 1 0 0Xfafc 0X75a0 -1 1 1 1 1 0 1 0 0Xfafc 0X75a0 -1 1 1 1 1 0 1 0 0Xfafc 0X75a0 -1 1 1 1 1 0 1 0 0Xfafc 0X75a0 +0 1 1 0 1 0 1 0 0Xfafc 0X75a0 +0 1 1 0 1 0 1 0 0Xfafc 0X75a0 +0 1 1 0 1 0 1 0 0Xfafc 0X75a0 +0 1 1 0 1 0 1 0 0Xfafc 0X75a0 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 0 1 1 1 1 0 1 0 0Xfafc 0X75a0 diff --git a/ODIN_II/regression_test/benchmark/verilog/full/paj_framebuftop_hierarchy_no_mem_no_combinational_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/paj_framebuftop_hierarchy_no_mem_no_combinational_yosys_output index 9474f460d20..06092d6e3ca 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/paj_framebuftop_hierarchy_no_mem_no_combinational_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/paj_framebuftop_hierarchy_no_mem_no_combinational_yosys_output @@ -1,8 +1,8 @@ fbnextscanline tm3_vidout_red tm3_vidout_green tm3_vidout_blue tm3_vidout_clock tm3_vidout_hsync tm3_vidout_vsync tm3_vidout_blank -0 xxxxxxx00x xxxxxxx00x xxxxxxx00x x x x x -0 xxxxxxx00x xxxxxxx00x xxxxxxx00x x x x x -0 xxxxxxx00x xxxxxxx00x xxxxxxx00x x x x x -0 xxxxxxx00x xxxxxxx00x xxxxxxx00x x x x x +0 xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x +0 xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x +0 xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x +0 xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 0 0X001 0X001 0X001 1 0 0 0 0 0X001 0X001 0X001 1 0 0 0 0 0X001 0X001 0X001 1 0 0 0 diff --git a/ODIN_II/regression_test/benchmark/verilog/full/stereovision0_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/stereovision0_yosys_output index c1e92395ec9..be3f59993fe 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/stereovision0_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/stereovision0_yosys_output @@ -1,398 +1,398 @@ v_nd_s1_left_2to0 v_nd_s2_left_2to0 v_nd_s4_left_2to0 v_d_reg_s1_left_2to0 v_d_reg_s2_left_2to0 v_d_reg_s4_left_2to0 v_nd_s1_right_2to0 v_nd_s2_right_2to0 v_nd_s4_right_2to0 v_d_reg_s1_right_2to0 v_d_reg_s2_right_2to0 v_d_reg_s4_right_2to0 tm3_vidout_red tm3_vidout_green tm3_vidout_blue tm3_vidout_clock tm3_vidout_hsync tm3_vidout_vsync tm3_vidout_blank depth_out -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx -0 0 0 0Xad xxxxxxxx xxxxxxxx 0 0 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxx00 xxxxxxxx00 x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +x x x xxxxxxxx xxxxxxxx xxxxxxxx x x x xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 1 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 1 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx 0 0 0 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X85 xxxxxxxx xxxxxxxx 1 0 0 0X5f xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X19 xxxxxxxx xxxxxxxx 1 0 0 0Xfb xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xf3 xxxxxxxx xxxxxxxx 1 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xf3 xxxxxxxx xxxxxxxx 0 0 0 0X27 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3b xxxxxxxx xxxxxxxx 1 0 0 0X54 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xee xxxxxxxx xxxxxxxx 1 0 0 0X39 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X21 xxxxxxxx xxxxxxxx 1 0 0 0X5b xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X3a xxxxxxxx xxxxxxxx 1 0 0 0X6e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X69 xxxxxxxx xxxxxxxx 1 0 0 0X5c xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xa2 xxxxxxxx xxxxxxxx 1 1 0 0Xc8 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xda xxxxxxxx xxxxxxxx 1 0 0 0X43 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X24 xxxxxxxx xxxxxxxx 1 0 0 0X9e xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xeb xxxxxxxx xxxxxxxx 1 1 0 0X18 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0Xe7 xxxxxxxx xxxxxxxx 1 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xe7 xxxxxxxx xxxxxxxx 0 0 0 0Xa1 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xd6 xxxxxxxx xxxxxxxx 1 1 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xd6 xxxxxxxx xxxxxxxx 0 0 0 0Xae xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0X86 xxxxxxxx xxxxxxxx 1 1 0 0X10 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 0 0 0X8e xxxxxxxx xxxxxxxx 1 0 0 0X69 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +1 1 0 0Xad xxxxxxxx xxxxxxxx 1 1 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx +0 0 0 0Xad xxxxxxxx xxxxxxxx 0 0 0 0X78 xxxxxxxx xxxxxxxx xxxxxxxxxx xxxxxxxxxx xxxxxxxxxx x x x x 00000000xxxxxxxx diff --git a/ODIN_II/regression_test/benchmark/verilog/full/stereovision1_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/stereovision1_yosys_output index c78db00e6a8..5c0f9e66dfc 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/stereovision1_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/stereovision1_yosys_output @@ -35,14 +35,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 xxxxxxxx xxxxxxxx xxxxxxxx 0X1 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 @@ -99,14 +99,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X2 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X3 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X4 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 0X00000 0X0000000000000000 0Xff 0X3 1 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 0X5 @@ -163,14 +163,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 @@ -227,14 +227,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X6 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X6 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X6 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X7 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0Xb5 0X80 0Xc0 0X00 0X00 0X00 0X1 0X00000 0X0000000000000000 0Xff 0X3 1 0Xb5 0X80 0Xc0 0X00 0X00 0X00 0X1 0X00000 0X0000000000000000 0Xff 0X3 1 0Xb5 0X80 0Xc0 0X00 0X00 0X00 0X1 @@ -291,14 +291,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 @@ -355,14 +355,14 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0000xx0xxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 +0000xxxxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 @@ -395,4 +395,4 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe q bus_wo 0000x0xxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0000x0xxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 0000x0xxxxxxxxxxxxx 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 -0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 \ No newline at end of file +0X00000 0X0000000000000000 0Xff 0X3 1 0X00 0X00 0X00 0X00 0X00 0X00 0X0 diff --git a/ODIN_II/regression_test/benchmark/verilog/full/stereovision2_yosys_output b/ODIN_II/regression_test/benchmark/verilog/full/stereovision2_yosys_output index 48f2d9702f5..beb287859bd 100644 --- a/ODIN_II/regression_test/benchmark/verilog/full/stereovision2_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/full/stereovision2_yosys_output @@ -1,398 +1,398 @@ offchip_sram_addr offchip_sram_data_out offchip_sram_we offchip_sram_oe tm3_sram_adsp counter_out_2to1 bus_word_3_2to1 bus_word_4_2to1 bus_word_5_2to1 bus_word_6_2to1 vidin_new_data_fifo vidin_rgb_reg_fifo_left vidin_rgb_reg_fifo_right vidin_addr_reg_2to0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf -0000xxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X113d 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx x xxxxxxxx xxxxxxxx xxxx +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x x xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 xxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X6cf5 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X94eb 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe82f 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17f5 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xba5c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 1 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X17d1 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0d05 0Xe000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X344e 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X467c 0Xa000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9f1c 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000xxxx 000000000000xxxx 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X881f 0X8000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4a7f 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb7db 0X6000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7ed8 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X8273 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 00000000000000xx 00000000000000xx 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf965 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0002 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X6 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 00000000000000xx 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X7 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 000000000000000x 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1246 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xaf9c 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X92de 0X3000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0003 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7d11 0X7000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X584f 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc233 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X0000 0X0001 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xe67f 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X0523 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X8 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx 0X000c 0X000e 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xf106 0X9000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X3 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X917e 0Xd000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc889 0Xf000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4e58 0X9000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff05 1111111111xxxxxx 0X0172 0000000010011xxx 0 xxxxxxxx xxxxxxxx 0Xa +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X391b 0X3000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xff0e 0X004b 0X01d1 0X0156 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0Xfdeb 0Xffc3 0X0249 0X003c 0 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 1111111101101xxx xxxxxxxxxxxxxxxx 0X009f 0X0022 1 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X14e5 0Xb000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xdeaf 0X8000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X420c 0Xe000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0068 0X0197 0X0157 0X02c2 0 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X764e 0X0000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X00df 0X01b3 0X01c5 0X02cb 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X9a2d 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc45b 0X4000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0192 0X00cb 0X028f 0X01e8 1 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xb721 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xe +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7268 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0135 0X014e 0X0171 0X0274 0 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0046 0X000c 0X0126 0X016c 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7023 0Xc000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X22ab 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X006e 0X008d 0X0126 0X01c4 0 xxxxxxxx xxxxxxxx 0X6 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0077 0X0008 0X00f7 0X015d 1 xxxxxxxx xxxxxxxx 0X1 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002f 0X000d 0X00c6 0X00e9 1 xxxxxxxx xxxxxxxx 0X5 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X5 0X0007 0X0036 0X00fe 0X00bc 0 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4be4 0Xa000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X003c 0X00e5 0X0180 0X0225 0 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X009c 0X007c 0X015b 0X01c4 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X4 0X002d 0X00d2 0X00bf 0X01b5 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xd76a 0X2000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc1cf 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X1dd4 0Xd000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xb +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xccfc 0X7000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xd +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4cb4 0X5000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X2 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0Xffe1 0X01f1 0X01b7 0X0324 0 xxxxxxxx xxxxxxxx 0Xc +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0Xc3c7 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X0 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0035 0X0077 0X016d 0X01a8 0 xxxxxxxx xxxxxxxx 0X9 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X3 0X0164 0X0026 0X01fa 0X0183 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X7844 0Xf000 0X0000 0X0000 0 xxxxxxxx xxxxxxxx 0X4 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X2 0X0022 0X0012 0X0146 0X0129 1 xxxxxxxx xxxxxxxx 0X7 +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X4159 0X4000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0Xf +xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0Xff 1x 0 0X1 0X113d 0X1000 0X0000 0X0000 1 xxxxxxxx xxxxxxxx 0X6 diff --git a/ODIN_II/regression_test/benchmark/verilog/micro/bm_dag3_mod_yosys_output b/ODIN_II/regression_test/benchmark/verilog/micro/bm_dag3_mod_yosys_output index 2be94369e8a..850c0c368f8 100644 --- a/ODIN_II/regression_test/benchmark/verilog/micro/bm_dag3_mod_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/micro/bm_dag3_mod_yosys_output @@ -1,12 +1,12 @@ out0 out1 -0x x -0x x -0x x -0x x -0x x -0x x -0x x -0x x +xx x +xx x +xx x +xx x +xx x +xx x +xx x +xx x 0X0 x 0X0 x 0X0 x diff --git a/ODIN_II/regression_test/benchmark/verilog/micro/bm_expr_all_mod_yosys_output b/ODIN_II/regression_test/benchmark/verilog/micro/bm_expr_all_mod_yosys_output index fe9f35774d8..5c100e82633 100644 --- a/ODIN_II/regression_test/benchmark/verilog/micro/bm_expr_all_mod_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/micro/bm_expr_all_mod_yosys_output @@ -1,8 +1,8 @@ land_out lor_out leq_out lneq_out lgt_out lge_out llt_out lle_out add_out sub_out shift_l1_out shift_r1_out shift_l2_out shift_r2_out and_out or_out xor_out xnor_out lembed_out embed_out bit_sel_out concat_out range_select_out number_out number_out2 not_out lnot_out two_compliment_out -x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x 0000000000000000000000000000xxxx 000000000000000000000000000000xx 0000000000000000000000000000x0x0 0000000000000000000000000000x0x0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x 0000000000000000000000000000xxxx 000000000000000000000000000000xx 0000000000000000000000000000x0x0 0000000000000000000000000000x0x0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x 0000000000000000000000000000xxxx 000000000000000000000000000000xx 0000000000000000000000000000x0x0 0000000000000000000000000000x0x0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx -x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x 0000000000000000000000000000xxxx 000000000000000000000000000000xx 0000000000000000000000000000x0x0 0000000000000000000000000000x0x0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 000000000000000000000000000000xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 000000000000000000000000000000xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 000000000000000000000000000000xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +x x x x x x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00 000xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 000000000000000000000000000000xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 1 1 0 1 1 1 0 0 0X069bf3f3 0X7246186d 0Xf1c418c0 0X178e20c6 0Xe3883180 0X5e388318 0X28310430 0Xfdff4773 0Xd5ce4343 0X2a31bcbc 0 0Xbddd163c 0 0X00000000 0X00000000 0X00000000 0X00000000 0X438ef9cf 0 0X438ef9d0 1 1 0 1 1 1 0 0 0X069bf3f3 0X7246186d 0Xf1c418c0 0X178e20c6 0Xe3883180 0X5e388318 0X28310430 0Xfdff4773 0Xd5ce4343 0X2a31bcbc 0 0Xbddd163c 0 0X00000000 0X00000000 0X00000000 0X00000000 0X438ef9cf 0 0X438ef9d0 1 1 0 1 1 1 0 0 0X069bf3f3 0X7246186d 0Xf1c418c0 0X178e20c6 0Xe3883180 0X5e388318 0X28310430 0Xfdff4773 0Xd5ce4343 0X2a31bcbc 0 0Xbddd163c 0 0X00000000 0X00000000 0X00000000 0X00000000 0X438ef9cf 0 0X438ef9d0 diff --git a/ODIN_II/regression_test/benchmark/verilog/micro/bm_match1_str_arch_yosys_output b/ODIN_II/regression_test/benchmark/verilog/micro/bm_match1_str_arch_yosys_output index b7785106b73..1b861628b8c 100644 --- a/ODIN_II/regression_test/benchmark/verilog/micro/bm_match1_str_arch_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/micro/bm_match1_str_arch_yosys_output @@ -1,8 +1,8 @@ out0 out1 out2 out3 out4 out5 -xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X16f6a 0X0af92 0X4e5c190da -xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X0116e 0X0b78e 0X032249e18 -xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X24b1c 0X000ea 0X03164c634 -xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X057c2 0X000b0 0X241f897dd +xxxxxxxxxxxxxxxxxx 00xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X16f6a 0X0af92 0X4e5c190da +xxxxxxxxxxxxxxxxxx 00xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X0116e 0X0b78e 0X032249e18 +xxxxxxxxxxxxxxxxxx 00xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X24b1c 0X000ea 0X03164c634 +xxxxxxxxxxxxxxxxxx 00xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X057c2 0X000b0 0X241f897dd 0X057c2 0X000b0 0X241f897dd 0X19f08 0X004d0 0X136765631 0X057c2 0X000b0 0X241f897dd 0X193a4 0X03ff9 0X3189333a6 0X057c2 0X000b0 0X241f897dd 0X0b7ed 0X0ba4a 0X51c0713e6 diff --git a/ODIN_II/regression_test/benchmark/verilog/micro/bm_match4_str_arch_yosys_output b/ODIN_II/regression_test/benchmark/verilog/micro/bm_match4_str_arch_yosys_output index 0245d28e519..082b1a8b09a 100644 --- a/ODIN_II/regression_test/benchmark/verilog/micro/bm_match4_str_arch_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/micro/bm_match4_str_arch_yosys_output @@ -1,8 +1,8 @@ out0 out1 out2 out3 out4 out5 -xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X000016f6a 0X00000c866 0X000003e04 -xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00000ec88 0X00000070c 0X000003a44 -xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00002e11c 0X000013bd3 0X000005010 -xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 0X00000d2be 0X0000148a2 0X000000c40 +0000000000000000xxxxxxxxxxxxxxxxxxxx 0000000000000000000xxxxxxxxxxxxxxxxx 00000000000000000000xxxxxxxxxxxxxxxx 0X000016f6a 0X00000c866 0X000003e04 +0000000000000000xxxxxxxxxxxxxxxxxxxx 0000000000000000000xxxxxxxxxxxxxxxxx 00000000000000000000xxxxxxxxxxxxxxxx 0X00000ec88 0X00000070c 0X000003a44 +0000000000000000xxxxxxxxxxxxxxxxxxxx 0000000000000000000xxxxxxxxxxxxxxxxx 00000000000000000000xxxxxxxxxxxxxxxx 0X00002e11c 0X000013bd3 0X000005010 +0000000000000000xxxxxxxxxxxxxxxxxxxx 0000000000000000000xxxxxxxxxxxxxxxxx 00000000000000000000xxxxxxxxxxxxxxxx 0X00000d2be 0X0000148a2 0X000000c40 0X0000227a0 0X0000148a2 0X000000c40 0X00002cb14 0X000002d50 0X000001040 0X0000227a0 0X0000148a2 0X000000c40 0X0000165db 0X000000720 0X000005008 0X0000227a0 0X0000148a2 0X000000c40 0X000006e5b 0X000003322 0X000005f10 diff --git a/ODIN_II/regression_test/benchmark/verilog/operators/twobits_arithmetic_uminus_yosys_output b/ODIN_II/regression_test/benchmark/verilog/operators/twobits_arithmetic_uminus_yosys_output index 8e6ec5c25c5..2d306663257 100644 --- a/ODIN_II/regression_test/benchmark/verilog/operators/twobits_arithmetic_uminus_yosys_output +++ b/ODIN_II/regression_test/benchmark/verilog/operators/twobits_arithmetic_uminus_yosys_output @@ -4,8 +4,8 @@ xxx 0 0X0 0 0X0 1 0X0 0 -0X3 1 -0X3 0 -0X2 1 -0X2 0 -0X1 1 +0X7 1 +0X7 0 +0X6 1 +0X6 0 +0X5 1 diff --git a/ODIN_II/regression_test/tools/synth.tcl b/ODIN_II/regression_test/tools/synth.tcl index 2bd143b0e1b..0a783f0831e 100644 --- a/ODIN_II/regression_test/tools/synth.tcl +++ b/ODIN_II/regression_test/tools/synth.tcl @@ -11,13 +11,13 @@ setattr -mod -set keep_hierarchy 1 dual_port_ram # Read the HDL file with pre-defined parer in the "run_yosys.sh" script if {$env(PARSER) == "surelog" } { puts "Using Yosys read_uhdm command" - plugin -i systemverilog; - yosys -import + plugin -i systemverilog; + yosys -import read_uhdm -debug $env(TCL_CIRCUIT); } elseif {$env(PARSER) == "yosys-plugin" } { puts "Using Yosys read_systemverilog command" - plugin -i systemverilog; - yosys -import + plugin -i systemverilog; + yosys -import read_systemverilog -debug $env(TCL_CIRCUIT) } elseif {$env(PARSER) == "yosys" } { puts "Using Yosys read_verilog command" @@ -29,22 +29,48 @@ if {$env(PARSER) == "surelog" } { # Check that cells match libraries and find top module hierarchy -check -auto-top -purge_lib; -# Make name convention more readable -autoname; -# Translate processes to entlist components such as MUXs, FFs and latches -procs; opt; + +# Translate processes to netlist components such as MUXs, FFs and latches +# Transform the design into a new one with single top module +proc; flatten; opt_expr; opt_clean; + +# Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. +# "-nodffe" to disable dff -> dffe conversion, and other transforms recognizing clock enable +# "-nosdff" to disable dff -> sdff conversion, and other transforms recognizing sync resets +check; opt -nodffe -nosdff; + # Extraction and optimization of finite state machines fsm; opt; -# Collects memories, their port and create multiport memory cells -memory_collect; memory_dff; opt; +# To possibly reduce word sizes by Yosys +wreduce; +# To applies a collection of peephole optimizers to the current design. +peepopt; opt_clean; + +# To merge shareable resources into a single resource. A SAT solver +# is used to determine if two resources are share-able +share; opt; + +# Use a readable name convention +# [NOTE]: the 'autoname' process has a high memory footprint for giant netlists +# we run it after basic optimization passes to reduce the overhead (see issue #2031) +autoname; # Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. check; # resolve asynchronous dffs techmap -map $env(ODIN_TECHLIB)/adff2dff.v; techmap -map $env(ODIN_TECHLIB)/adffe2dff.v; -# To resolve Yosys internal indexed part-select circuitry -techmap */t:\$shift */t:\$shiftx; + +# Yosys performs various optimizations on memories in the design. Then, it detects DFFs at +# memory read ports and merges them into the memory port. I.e. it consumes an asynchronous +# memory port and the flip-flops at its interface and yields a synchronous memory port. +# Afterwards, Yosys detects cases where an asynchronous read port is only connected via a mux +# tree to a write port with the same address. When such a connection is found, it is replaced +# with a new condition on an enable signal, allowing for removal of the read port. Finally +# Yosys merges share-able memory ports into single memory ports and collects memories, their +# port and create multiport memory cells. +memory -nomap; + # convert mem block to bram/rom # [NOTE]: Yosys complains about expression width more than 24 bits. @@ -53,12 +79,27 @@ techmap */t:\$shift */t:\$shiftx; # memory_bram -rules $env(ODIN_TECHLIB)/mem_rules.txt # techmap -map $env(ODIN_TECHLIB)/mem_map.v; +# Transforming all RTLIL components into LUTs except for memories, adders, subtractors, +# multipliers, DFFs with set (VCC) and clear (GND) signals, and DFFs with the set (VCC), +# clear (GND), and enable signals The Odin-II partial mapper will perform the technology +# mapping for the above-mentioned circuits + +# [NOTE]: the purpose of using this pass is to keep the connectivity of internal signals +# in the coarse-grained BLIF file, as they were not properly connected in the +# initial implementation of Yosys+Odin-II, which did not use this pass +techmap */t:\$mem */t:\$memrd */t:\$add */t:\$sub */t:\$mul */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; + # Transform the design into a new one with single top module flatten; -# Transforms pmux into trees of regular multiplexers -pmuxtree; -# To possibly reduce words size -wreduce; + +# To possibly reduce word sizes by Yosys and fine-graining the basic operations +wreduce; simplemap */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; +# Turn all DFFs into simple latches +dffunmap; opt -fast -noff; + +# Check the hierarchy for any unknown modules, and purge all modules (including blackboxes) that aren't used +hierarchy -check -purge_lib; + # "undirven" to ensure there is no wire without drive # "opt_muxtree" removes dead branches, "opt_expr" performs constant folding, # removes "undef" inputs from mux cells, and replaces muxes with buffers and inverters. @@ -69,4 +110,4 @@ autoname; # Print statistics stat; -write_blif -param -impltf $env(TCL_BLIF); +write_blif -param -impltf $env(TCL_BLIF); \ No newline at end of file diff --git a/doc/src/yosys+odin/dev_guide/contributing.rst b/doc/src/yosys+odin/dev_guide/contributing.rst index 4b392523e8b..92cd8b7c10d 100644 --- a/doc/src/yosys+odin/dev_guide/contributing.rst +++ b/doc/src/yosys+odin/dev_guide/contributing.rst @@ -28,11 +28,11 @@ The flow is depicted in the figure below. .. code-block:: tcl - # FILE: $VTR_ROOT/ODIN_II/regression_test/tools/synth.tcl # yosys -import # the environment variable VTR_ROOT is set by Odin-II. # Feel free to specify file paths using "$env(VTR_ROOT)/ ..." + # Read VTR baseline library first read_verilog -nomem2reg $env(ODIN_TECHLIB)/../../vtr_flow/primitives.v setattr -mod -set keep_hierarchy 1 single_port_ram @@ -56,43 +56,79 @@ The flow is depicted in the figure below. error "Invalid PARSER" } - # Read the hardware decription Verilog - read_verilog -nomem2reg -nolatches PATH_TO_VERILOG_FILE.v; # Check that cells match libraries and find top module - hierarchy -check -auto-top; + hierarchy -check -auto-top -purge_lib; - # Make name convention more readable - autoname; + # Translate processes to netlist components such as MUXs, FFs and latches - procs; opt; + # Transform the design into a new one with single top module + proc; flatten; opt_expr; opt_clean; + + # Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. + # "-nodffe" to disable dff -> dffe conversion, and other transforms recognizing clock enable + # "-nosdff" to disable dff -> sdff conversion, and other transforms recognizing sync resets + check; opt -nodffe -nosdff; + # Extraction and optimization of finite state machines fsm; opt; - # Collects memories, their port and create multiport memory cells - memory_collect; memory_dff; opt; + # To possibly reduce word sizes by Yosys + wreduce; + # To applies a collection of peephole optimizers to the current design. + peepopt; opt_clean; + + # To merge shareable resources into a single resource. A SAT solver + # is used to determine if two resources are share-able + share; opt; + + # Use a readable name convention + # [NOTE]: the 'autoname' process has a high memory footprint for giant netlists + # we run it after basic optimization passes to reduce the overhead (see issue #2031) + autoname; # Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. check; # resolve asynchronous dffs - techmap -map $VTR_ROOT/ODIN_II/techlib/adff2dff.v; - techmap -map $VTR_ROOT/ODIN_II/techlib/adffe2dff.v; - # To resolve Yosys internal indexed part-select circuitry - techmap */t:\$shift */t:\$shiftx; - - ## Utilizing the "memory_bram" command and the Verilog design provided at "$VTR_ROOT/ODIN_II/techlib/mem_map.v" - ## we could map Yosys memory blocks to BRAMs and ROMs before the Odin-II partial mapping phase. - ## However, Yosys complains about expression widths more than 24 bits. - ## E.g. reg [63:0] memory [18:0] ==> ERROR: Expression width 33554432 exceeds implementation limit of 16777216! - ## Although we provided the required design files for this process (located in ODIN_II/techlib), we will handle - ## memory blocks in the Odin-II BLIF elaborator and partial mapper. - # memory_bram -rules $VTR_ROOT/ODIN_II/techlib/mem_rules.txt - # techmap -map $VTR_ROOT/ODIN_II/techlib/mem_map.v; + techmap -map $env(ODIN_TECHLIB)/adff2dff.v; + techmap -map $env(ODIN_TECHLIB)/adffe2dff.v; + + # Yosys performs various optimizations on memories in the design. Then, it detects DFFs at + # memory read ports and merges them into the memory port. I.e. it consumes an asynchronous + # memory port and the flip-flops at its interface and yields a synchronous memory port. + # Afterwards, Yosys detects cases where an asynchronous read port is only connected via a mux + # tree to a write port with the same address. When such a connection is found, it is replaced + # with a new condition on an enable signal, allowing for removal of the read port. Finally + # Yosys collects memories, their port and create multiport memory cells. + opt_mem; memory_dff; opt_clean; opt_mem_feedback; opt_clean; memory_collect; + + # convert mem block to bram/rom + + # [NOTE]: Yosys complains about expression width more than 24 bits. + # E.g. [63:0] memory [18:0] ==> ERROR: Expression width 33554432 exceeds implementation limit of 16777216! + # mem will be handled using Odin-II + # memory_bram -rules $env(ODIN_TECHLIB)/mem_rules.txt + # techmap -map $env(ODIN_TECHLIB)/mem_map.v; + + # Transforming all RTLIL components into LUTs except for memories, adders, subtractors, + # multipliers, DFFs with set (VCC) and clear (GND) signals, and DFFs with the set (VCC), + # clear (GND), and enable signals The Odin-II partial mapper will perform the technology + # mapping for the above-mentioned circuits + + # [NOTE]: the purpose of using this pass is to keep the connectivity of internal signals + # in the coarse-grained BLIF file, as they were not properly connected in the + # initial implementation of Yosys+Odin-II, which did not use this pass + techmap */t:\$mem */t:\$memrd */t:\$add */t:\$sub */t:\$mul */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; # Transform the design into a new one with single top module flatten; - # Transforms pmux into trees of regular multiplexers - pmuxtree; - # To possibly reduce words size - wreduce; + + # To possibly reduce word sizes by Yosys and fine-graining the basic operations + wreduce; simplemap */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; + # Turn all DFFs into simple latches + dffunmap; opt -fast -noff; + + # Check the hierarchy for any unknown modules, and purge all modules (including blackboxes) that aren't used + hierarchy -check -purge_lib; + # "undirven" to ensure there is no wire without drive # "opt_muxtree" removes dead branches, "opt_expr" performs constant folding, # removes "undef" inputs from mux cells, and replaces muxes with buffers and inverters. @@ -102,9 +138,10 @@ The flow is depicted in the figure below. autoname; # Print statistics stat; - # Output BLIF - write_blif -param -impltf TCL_BLIF; - + + write_blif -param -impltf $env(TCL_BLIF); + + **Algorithm 1** - The Yosys+Odin-II Tcl Script File @@ -119,23 +156,42 @@ The generic coarse-grained synthesis commands includes: 1. Parsing the hardware description Verilog/SystemVerilog/UHDM files. The option ``-nomem2reg`` prevents Yosys from exploding implicit memories to an array of registers. The option ``-nolatches`` is used for both VTR primitives and input circuit design to avoid Yosys generating logic loops. 2. Checking that the design cells match the libraries and detecting the top module using ``hierarchy``. 3. Translating the processes to netlist components such as multiplexers, flip-flops, and latches, by the ``procs`` command. -4. Performing extraction and optimization of finite state machines by the ``fsm`` command. -5. Collecting memories and their ports, then creating a multiport memory cell, by the ``memory_collect`` command. -6. Converting asynchronous memory ports to synchronous ones by merging ports and the related DFFs at their interfaces, using the ``memory_dff`` command. -7. Checking for errors like combinatorial loops, wires with multiple drivers and used wires without any driver by the ``check`` command. +4. The ``flatten`` command generates a netlist with only one module, representing the HDL circuit design's top module. +5. The ``check`` command looks for combinatorial loops, wires with multiple drivers and used wires without any driver. +6. Performing extraction and optimization of finite state machines by the ``fsm`` command. +7. The option ``wreduce`` performs possible word size reduction for operations to avoid propagating additional signals to the subsequent phases. +8. The command ``peephole`` applies a collection of peephole optimizers to the current design. +9. Using the ``share`` command, Yosys merges shareable resources into a single resource (A SAT solver is used to determine if two resources are share-able). + +In the ``autoname`` passes, Yosys generates an easy-to-read names by transforming signal names into a shorter format. +This command removes some debugging information, such as the path to the source file, that Yosys inserts in names by default and generally gives easier-to-interpret names. After performing basic synthesis steps, the ``techmap`` command with the input ``adff2dff`` transforms DFFs with asynchronous reset to the synchronous form using the design provided by Yosys. The next command follows the same approach but with a modified version of the provided design file for DFFs with asynchronous reset and synchronous data enable signals. -The last techmap command is in place to resolve the Yosys internal circuitries designed specifically for indexed part-select Verilog code. -Since this step is mainly related to the Verilog elaboration, we ask Yosys to transform the ``$shift`` and ``$shiftx`` sub-circuits into a more straightforward representation. -The ``flatten`` command generates an output netlist with only one module, representing the HDL circuit design's top module. -The ``pmuxtree`` pass is used to transforms `pmux`, a sub-circuit representing parallel cases, into trees of regular multiplexers. -The option ``wreduce`` performs possible word size reduction for operations to avoid propagating additional signals to the subsequent phases. -In the ``autoname`` passes, Yosys generates an easy-to-read BLIF file by transforming signal names into a shorter format. -This command removes some debugging information, such as the path to the source file, that Yosys inserts in names by default and generally gives easier-to-interpret names. +Followed by the ``techmap`` command, Yosys performs various optimizations on memories in the design. +Using the ``memory_dff`` commands, Yosys detects DFFs at memory read ports and merges them into the memory port. +I.e. it consumes an asynchronous memory port and the flip-flops at its interface and yields a synchronous memory port. +Yosys then detects cases where an asynchronous read port is only connected via a mux tree to a write port with the same address. +When such a connection is found, it is replaced with a new condition on an enable signal, allowing for removal of the read port. +Finally Yosys collects memories, their port and create multiport memory cells. -Then, the optimization pass is called to make the netlist ready for output. +Afterwards, Yosys transforms all RTLIL components into soft logic except for primary hard blocks and latches to postpone their technology mapping to the Odin-II partial mapping phase. +These components include memories, adders, subtractors, multipliers, DFFs with set (VCC) and clear (GND) signals, and DFFs with the set (VCC), clear (GND), and enable signals. + +.. note:: + + The purpose of using ``techmap`` pass is to keep the connectivity of internal signals in the coarse-grained BLIF file. + In the initial implementation of Yosys+Odin-II, in which the Odin-II partial mapper received all components in coarse-grained format, some disconnectivity, resulting from an incomplete elaboration, existed in the BLIF file. + This solution is proposed to technology-map all primary components and keep the connectivity of the submodules with the top-module in the Yosys output BLIF file. + It worth noting that Odin-II still receives the memories and arithmetic operations in the coarse-grained format so that it partially-maps them with architecture awareness. + +Then, we again flatten the design and the ``simplemap`` command is called to ensure about the connectivity of the technology-mapped components. +The given selection to the ``simplemap`` pass avoid mapping latches and DFFs with set/reset signals, as we want to postpone them for Odin-II partial mapping. +The ``dffunmap`` command turns all types of complex DFFs, such as DFFs with enable and reset signals, into simple latches if there exist any in the design. + +Ultimately, we check the hierarchy for any unknown modules, and purge all modules (including blackboxes) that aren't used. +The optimization pass is then called to make the netlist ready for output. The option ``undriven`` ensures that all nets without a driver are removed, while the ``full`` optimization option is used to remove duplicated inputs in `AND`, `OR` and `MUX` gates. The ``opt_muxtree`` removes dead branches, ``opt_expr`` performs possible constant folding, in addition to removing ``undef`` inputs from mux cells and transforming muxes into buffers and inverters. Ultimately, we use the ``write_blif`` command to output the coarse-grained BLIF file. @@ -189,4 +245,4 @@ Simulator --------- The simulator of Odin-II takes an input vector file and creates an output vector file determined by the behaviour described in the Verilog file or BLIF file. -This section is comprehensivly decribed in the Yosys+Odin-II :ref:`user_guide` and the Odin-II `Simulation Arguments `_. +This section is comprehensivly decribed in the Yosys+Odin-II :ref:`user_guide` and the Odin-II `Simulation Arguments `_. \ No newline at end of file diff --git a/doc/src/yosys+odin/user_guide.rst b/doc/src/yosys+odin/user_guide.rst index 08f901f4fc3..d58ad1b4516 100644 --- a/doc/src/yosys+odin/user_guide.rst +++ b/doc/src/yosys+odin/user_guide.rst @@ -113,44 +113,80 @@ Example of Tcl script for Yosys+Odin-II error "Invalid PARSER" } - # Read the hardware decription Verilog - read_verilog -nomem2reg -nolatches PATH_TO_VERILOG_FILE.v; # Check that cells match libraries and find top module - hierarchy -check -auto-top; + hierarchy -check -auto-top -purge_lib; - # Make name convention more readable - autoname; + # Translate processes to netlist components such as MUXs, FFs and latches - procs; opt; + # Transform the design into a new one with single top module + proc; flatten; opt_expr; opt_clean; + + # Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. + # "-nodffe" to disable dff -> dffe conversion, and other transforms recognizing clock enable + # "-nosdff" to disable dff -> sdff conversion, and other transforms recognizing sync resets + check; opt -nodffe -nosdff; + # Extraction and optimization of finite state machines fsm; opt; - # Collects memories, their port and create multiport memory cells - memory_collect; memory_dff; opt; + # To possibly reduce word sizes by Yosys + wreduce; + # To applies a collection of peephole optimizers to the current design. + peepopt; opt_clean; + + # To merge shareable resources into a single resource. A SAT solver + # is used to determine if two resources are share-able + share; opt; + # Use a readable name convention + # [NOTE]: the 'autoname' process has a high memory footprint for giant netlists + # we run it after basic optimization passes to reduce the overhead (see issue #2031) + autoname; + # Looking for combinatorial loops, wires with multiple drivers and used wires without any driver. check; # resolve asynchronous dffs - techmap -map $VTR_ROOT/ODIN_II/techlib/adff2dff.v; - techmap -map $VTR_ROOT/ODIN_II/techlib/adffe2dff.v; - # To resolve Yosys internal indexed part-select circuitry - techmap */t:\$shift */t:\$shiftx; + techmap -map $env(ODIN_TECHLIB)/adff2dff.v; + techmap -map $env(ODIN_TECHLIB)/adffe2dff.v; + + # Yosys performs various optimizations on memories in the design. Then, it detects DFFs at + # memory read ports and merges them into the memory port. I.e. it consumes an asynchronous + # memory port and the flip-flops at its interface and yields a synchronous memory port. + # Afterwards, Yosys detects cases where an asynchronous read port is only connected via a mux + # tree to a write port with the same address. When such a connection is found, it is replaced + # with a new condition on an enable signal, allowing for removal of the read port. Finally + # Yosys collects memories, their port and create multiport memory cells. + opt_mem; memory_dff; opt_clean; opt_mem_feedback; opt_clean; memory_collect; - ## Utilizing the "memory_bram" command and the Verilog design provided at "$VTR_ROOT/ODIN_II/techlib/mem_map.v" - ## we could map Yosys memory blocks to BRAMs and ROMs before the Odin-II partial mapping phase. - ## However, Yosys complains about expression widths more than 24 bits. - ## E.g. reg [63:0] memory [18:0] ==> ERROR: Expression width 33554432 exceeds implementation limit of 16777216! - ## Although we provided the required design files for this process (located in ODIN_II/techlib), we will handle - ## memory blocks in the Odin-II BLIF elaborator and partial mapper. - # memory_bram -rules $VTR_ROOT/ODIN_II/techlib/mem_rules.txt - # techmap -map $VTR_ROOT/ODIN_II/techlib/mem_map.v; + # convert mem block to bram/rom + + # [NOTE]: Yosys complains about expression width more than 24 bits. + # E.g. [63:0] memory [18:0] ==> ERROR: Expression width 33554432 exceeds implementation limit of 16777216! + # mem will be handled using Odin-II + # memory_bram -rules $env(ODIN_TECHLIB)/mem_rules.txt + # techmap -map $env(ODIN_TECHLIB)/mem_map.v; + + # Transforming all RTLIL components into LUTs except for memories, adders, subtractors, + # multipliers, DFFs with set (VCC) and clear (GND) signals, and DFFs with the set (VCC), + # clear (GND), and enable signals The Odin-II partial mapper will perform the technology + # mapping for the above-mentioned circuits + + # [NOTE]: the purpose of using this pass is to keep the connectivity of internal signals + # in the coarse-grained BLIF file, as they were not properly connected in the + # initial implementation of Yosys+Odin-II, which did not use this pass + techmap */t:\$mem */t:\$memrd */t:\$add */t:\$sub */t:\$mul */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; # Transform the design into a new one with single top module flatten; - # Transforms pmux into trees of regular multiplexers - pmuxtree; - # To possibly reduce words size - wreduce; - # "undriven" to ensure there is no wire without drive + + # To possibly reduce word sizes by Yosys and fine-graining the basic operations + wreduce; simplemap */t:\$dffsr */t:\$dffsre */t:\$sr */t:\$dlatch */t:\$adlatch %% %n; + # Turn all DFFs into simple latches + dffunmap; opt -fast -noff; + + # Check the hierarchy for any unknown modules, and purge all modules (including blackboxes) that aren't used + hierarchy -check -purge_lib; + + # "undirven" to ensure there is no wire without drive # "opt_muxtree" removes dead branches, "opt_expr" performs constant folding, # removes "undef" inputs from mux cells, and replaces muxes with buffers and inverters. # "-noff" a potential option to remove all sdff and etc. Only dff will remain @@ -159,8 +195,9 @@ Example of Tcl script for Yosys+Odin-II autoname; # Print statistics stat; - # Output BLIF - write_blif -param -impltf TCL_BLIF; + + write_blif -param -impltf $env(TCL_BLIF); + .. note:: diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_yosys_odin/vtr_benchmarks/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_yosys_odin/vtr_benchmarks/config/golden_results.txt index 1f73a60efc6..5753caf25a2 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_yosys_odin/vtr_benchmarks/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_yosys_odin/vtr_benchmarks/config/golden_results.txt @@ -1,22 +1,22 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem yosys_synth_time max_yosys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_frac_N10_frac_chain_mem32K_40nm.xml arm_core.v common 351.67 vpr 245.83 MiB 17.31 68716 -1 -1 19 59.39 -1 -1 72876 -1 -1 867 133 27 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 251732 133 179 14393 14254 1 7095 1206 38 38 1444 memory auto 34.74 -1 13.39 0.10 19.6892 -185961 -19.6892 19.6892 4.07 0.027518 0.0236634 3.89886 3.18881 104 179162 36 8.30822e+07 6.15231e+07 9.60143e+06 6649.19 195.60 15.283 12.6631 163597 14 30015 119553 31149982 6472864 22.4894 22.4894 -210733 -22.4894 0 0 1.21843e+07 8437.89 3.60 7.65 1.74572 1.57601 -k6_frac_N10_frac_chain_mem32K_40nm.xml bgm.v common 673.59 vpr 654.29 MiB 28.91 251580 -1 -1 14 244.22 -1 -1 126564 -1 -1 2597 257 0 11 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 669992 257 32 37129 34537 1 19670 2897 62 62 3844 clb auto 74.10 -1 60.49 0.43 17.1069 -23421.7 -17.1069 17.1069 32.84 0.0714945 0.0632997 9.5036 7.83796 76 365081 29 2.30929e+08 1.44321e+08 1.99380e+07 5186.80 172.87 40.2481 33.4122 349412 19 91014 381045 23314859 3892784 19.5361 19.5361 -26341.2 -19.5361 0 0 2.49292e+07 6485.22 7.79 9.92 5.10264 4.55021 -k6_frac_N10_frac_chain_mem32K_40nm.xml blob_merge.v common 102.19 vpr 149.67 MiB 5.82 48396 -1 -1 5 8.02 -1 -1 54124 -1 -1 518 36 0 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 153260 36 100 12665 10079 1 2784 654 29 29 841 clb auto 21.25 -1 9.56 0.06 13.9875 -2197.5 -13.9875 13.9875 3.07 0.0221919 0.0191635 3.90482 3.17519 64 62231 22 4.4999e+07 2.79171e+07 3.58700e+06 4265.16 38.04 12.0996 10.0049 57275 17 10967 49806 2185384 290617 16.0872 16.0872 -2641.32 -16.0872 0 0 4.48162e+06 5328.92 1.82 2.15 1.55641 1.36297 -k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 25.99 abc 38.75 MiB 18.14 29396 -1 -1 3 1.08 -1 -1 39684 -1 -1 38 196 1 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 39264 196 193 1082 1227 1 559 428 15 15 225 io auto 0.97 -1 0.80 0.01 1.94396 -923.145 -1.94396 1.94396 0.61 0.00203069 0.00180358 0.279357 0.248187 38 6130 32 1.03862e+07 2.59597e+06 544116. 2418.30 2.02 0.761909 0.689838 4923 14 1541 1962 242449 68035 2.66859 2.66859 -1143.18 -2.66859 0 0 690508. 3068.92 0.22 0.16 0.101923 0.0964625 -k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 4.47 abc 36.25 MiB 0.39 16128 -1 -1 3 0.13 -1 -1 37120 -1 -1 70 99 1 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 32688 99 130 333 463 1 225 300 12 12 144 clb auto 0.20 -1 0.43 0.00 1.57289 -131.831 -1.57289 1.57289 0.34 0.000574422 0.000513777 0.10005 0.0887282 44 1161 23 5.66058e+06 4.32058e+06 360780. 2505.42 1.73 0.287708 0.26051 991 9 445 630 28829 9525 1.86578 1.86578 -161.113 -1.86578 0 0 470760. 3269.17 0.15 0.04 0.0220949 0.0210462 -k6_frac_N10_frac_chain_mem32K_40nm.xml diffeq1.v common 18.63 vpr 44.65 MiB 0.25 15944 -1 -1 6 0.19 -1 -1 38052 -1 -1 31 162 0 5 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 45724 162 96 1069 886 1 656 294 16 16 256 mult_36 auto 0.47 -1 0.79 0.01 15.2668 -1207.27 -15.2668 15.2668 0.73 0.0021996 0.00200796 0.289228 0.260851 68 9436 36 1.21132e+07 3.65071e+06 1.06067e+06 4143.25 13.36 1.45597 1.33498 7757 21 3044 5215 1657068 451352 16.5699 16.5699 -1343.45 -16.5699 0 0 1.31810e+06 5148.84 0.43 0.51 0.139386 0.131323 -k6_frac_N10_frac_chain_mem32K_40nm.xml diffeq2.v common 10.47 abc 37.13 MiB 0.17 15880 -1 -1 6 0.12 -1 -1 38024 -1 -1 22 66 0 5 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 37668 66 96 778 595 1 463 189 16 16 256 mult_36 auto 0.58 -1 0.51 0.01 11.2616 -712.111 -11.2616 11.2616 0.72 0.00135315 0.00121999 0.193297 0.174317 52 8046 48 1.21132e+07 3.16567e+06 805949. 3148.24 5.70 0.696979 0.641885 7004 23 3174 6629 2178265 559615 12.7006 12.7006 -841.335 -12.7006 0 0 1.06067e+06 4143.25 0.34 0.59 0.10806 0.102055 -k6_frac_N10_frac_chain_mem32K_40nm.xml mkDelayWorker32B.v common 103.88 vpr 307.24 MiB 9.53 54320 -1 -1 5 12.83 -1 -1 56996 -1 -1 614 507 44 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 314612 507 553 3394 3892 1 3036 1718 50 50 2500 memory auto 5.00 -1 9.97 0.07 6.98957 -1717.63 -6.98957 6.98957 25.19 0.0192897 0.0175239 4.37934 3.94736 38 22834 15 1.47946e+08 5.72038e+07 6.86579e+06 2746.32 21.20 8.05661 7.37293 21743 14 4171 5277 3824493 945443 7.66492 7.66492 -2059.72 -7.66492 0 0 8.69102e+06 3476.41 4.41 1.86 0.906514 0.858308 -k6_frac_N10_frac_chain_mem32K_40nm.xml mkPktMerge.v common 21.54 vpr 62.84 MiB 0.92 18932 -1 -1 2 0.14 -1 -1 37680 -1 -1 30 311 15 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64348 311 156 1015 1158 1 965 512 28 28 784 memory auto 0.89 -1 1.63 0.02 4.20059 -4082.54 -4.20059 4.20059 3.20 0.00474299 0.00413884 0.726003 0.624004 46 13551 23 4.25198e+07 9.83682e+06 2.40571e+06 3068.51 7.81 1.94003 1.71472 13041 13 2731 3007 2108915 570335 4.38655 4.38655 -4828.02 -4.38655 -0.00135869 -0.00135869 3.09729e+06 3950.62 1.38 0.79 0.215306 0.198617 -k6_frac_N10_frac_chain_mem32K_40nm.xml mkSMAdapter4B.v common 34.30 vpr 62.71 MiB 4.03 28696 -1 -1 5 2.81 -1 -1 43792 -1 -1 171 193 5 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64220 193 205 2799 2733 1 1399 574 20 20 400 memory auto 4.08 -1 3.35 0.02 5.02222 -2615.5 -5.02222 5.02222 1.36 0.00599707 0.00523666 1.22356 1.06392 54 20983 39 2.07112e+07 1.19559e+07 1.35938e+06 3398.46 13.36 4.15894 3.6689 16771 15 4414 10311 925924 217286 5.97901 5.97901 -3115.54 -5.97901 0 0 1.76609e+06 4415.22 0.55 0.54 0.345892 0.319538 -k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 82.93 vpr 121.40 MiB 4.18 30788 -1 -1 8 5.70 -1 -1 45644 -1 -1 259 385 2 1 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 124312 385 394 4660 4554 1 2389 1041 27 27 729 io auto 10.50 -1 6.32 0.04 8.28662 -9864.1 -8.28662 8.28662 2.88 0.00837167 0.00761231 1.72218 1.5308 96 46967 18 3.93038e+07 1.54505e+07 4.41327e+06 6053.86 41.67 7.32947 6.52148 43799 17 9738 34271 3618341 701137 8.98455 8.98455 -10792.5 -8.98455 0 0 5.51931e+06 7571.08 2.12 1.86 0.866146 0.79955 -k6_frac_N10_frac_chain_mem32K_40nm.xml raygentop.v common 28.38 vpr 59.27 MiB 3.22 30820 -1 -1 4 1.14 -1 -1 41192 -1 -1 119 236 1 6 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 60696 236 305 3145 2957 1 1501 667 19 19 361 io auto 3.90 -1 2.77 0.03 4.30054 -2522.73 -4.30054 4.30054 1.18 0.00743643 0.0067721 1.00875 0.906057 58 24284 35 1.72706e+07 9.33739e+06 1.32779e+06 3678.09 10.31 3.15017 2.85336 20270 16 5675 14610 2818770 633174 5.16722 5.16722 -3033.49 -5.16722 0 0 1.69263e+06 4688.74 0.69 1.07 0.418842 0.392353 -k6_frac_N10_frac_chain_mem32K_40nm.xml sha.v common 22.81 vpr 58.63 MiB 1.54 25844 -1 -1 5 2.30 -1 -1 42496 -1 -1 134 38 0 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 60040 38 36 2756 2505 1 1061 208 16 16 256 clb auto 2.68 -1 1.71 0.01 9.14746 -2469.77 -9.14746 9.14746 0.74 0.00499372 0.00438728 0.725907 0.62227 70 13189 45 1.21132e+07 7.2218e+06 1.08607e+06 4242.47 9.49 3.71214 3.2305 11948 18 3714 9467 323620 56529 10.3067 10.3067 -3024.97 -10.3067 0 0 1.36713e+06 5340.37 0.43 0.46 0.380544 0.348742 -k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 17.87 vpr 44.04 MiB 2.26 23552 -1 -1 17 0.74 -1 -1 38868 -1 -1 63 45 3 1 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 45096 45 32 1175 1134 1 789 144 14 14 196 memory auto 2.29 -1 0.91 0.01 9.85301 -6456.89 -9.85301 9.85301 0.52 0.0027058 0.00230384 0.404186 0.338854 60 13283 36 9.20055e+06 5.43532e+06 710723. 3626.14 8.07 1.57062 1.35692 10667 14 3367 8833 1610056 412254 11.2617 11.2617 -7711.5 -11.2617 0 0 894373. 4563.13 0.28 0.58 0.196185 0.181545 -k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision0.v common 114.89 vpr 226.60 MiB 7.92 52524 -1 -1 5 13.82 -1 -1 70664 -1 -1 695 169 0 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 232040 169 197 23247 21381 1 6470 1061 33 33 1089 clb auto 11.95 -1 14.16 0.10 2.98229 -12778.1 -2.98229 2.98229 4.42 0.0433027 0.0389503 6.57197 5.34706 56 59664 26 6.0475e+07 3.74565e+07 4.09277e+06 3758.28 44.21 22.4788 19.0371 55053 13 16244 23940 938859 182491 3.92175 3.92175 -15546.6 -3.92175 0 0 5.21984e+06 4793.24 1.43 1.31 1.32155 1.22997 -k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision1.v common 141.17 vpr 240.77 MiB 6.01 65844 -1 -1 3 20.38 -1 -1 78344 -1 -1 683 115 0 40 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 246544 115 145 22884 19321 1 9576 983 40 40 1600 mult_36 auto 10.36 -1 9.60 0.08 5.04629 -22233.1 -5.04629 5.04629 6.09 0.02178 0.0178204 3.28432 2.77802 86 128065 46 9.16046e+07 5.26503e+07 8.98461e+06 5615.38 65.18 12.5936 10.8219 116455 16 31639 47944 23312472 4760438 5.39419 5.39419 -25393.8 -5.39419 0 0 1.13675e+07 7104.67 3.11 5.18 1.41562 1.31154 -k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision2.v common 526.13 vpr 942.38 MiB 8.18 104924 -1 -1 3 8.40 -1 -1 159352 -1 -1 1493 149 0 179 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 964992 149 182 56385 37743 1 29074 2003 80 80 6400 mult_36 auto 19.91 -1 50.80 0.29 13.5751 -49363.7 -13.5751 13.5751 59.80 0.061002 0.0545228 10.7283 9.19783 100 403422 22 3.90281e+08 1.51347e+08 4.24662e+07 6635.34 296.96 35.0561 30.0347 387800 19 94696 112175 39750799 8033802 15.142 15.142 -57451.7 -15.142 0 0 5.35781e+07 8371.59 19.68 11.49 3.93382 3.55771 -k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.92 abc 36.32 MiB 0.57 17520 -1 -1 5 0.22 -1 -1 37116 -1 -1 15 11 0 0 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 28224 11 30 330 338 2 135 56 7 7 49 clb auto 0.41 -1 0.12 0.00 2.31955 -156.974 -2.31955 2.06339 0.07 0.000418074 0.000323327 0.0525048 0.0407426 34 1131 32 1.07788e+06 808410 84249.8 1719.38 0.37 0.170337 0.140592 895 17 547 997 31429 10579 2.67679 2.326 -188.956 -2.67679 0 0 103542. 2113.11 0.02 0.05 0.0397644 0.0363647 -k6_frac_N10_frac_chain_mem32K_40nm.xml LU8PEEng.v common 553.59 vpr 611.35 MiB 31.97 162780 -1 -1 101 118.59 -1 -1 110904 -1 -1 2149 114 45 8 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 626020 114 102 38750 34762 1 17873 2418 56 56 3136 clb auto 73.55 -1 54.19 0.40 66.3729 -56347.3 -66.3729 66.3729 25.99 0.0684746 0.0604152 10.3818 8.46426 98 330373 38 1.8697e+08 1.43649e+08 2.01848e+07 6436.49 189.99 45.4391 37.2533 308306 23 68253 266745 34210531 6779508 76.9988 76.9988 -69073.3 -76.9988 0 0 2.55970e+07 8162.30 8.52 12.26 5.46971 4.74762 -k6_frac_N10_frac_chain_mem32K_40nm.xml LU32PEEng.v common 3134.75 vpr 2.10 GiB 84.46 539476 -1 -1 100 1114.78 -1 -1 345796 -1 -1 7373 114 168 32 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2201844 114 102 127768 115282 1 58419 7789 102 102 10404 clb auto 229.55 -1 401.07 2.44 67.6282 -351903 -67.6282 67.6282 96.65 0.269079 0.233924 39.7595 32.9656 116 1282210 22 6.36957e+08 5.02058e+08 7.95869e+07 7649.65 982.07 159.552 130.953 1231573 21 215277 948652 184272624 43378514 76.1937 76.1937 -481707 -76.1937 0 0 1.00100e+08 9621.32 33.40 63.57 18.9372 16.5353 -k6_frac_N10_frac_chain_mem32K_40nm.xml mcml.v common 7058.06 vpr 2.12 GiB 145.74 431012 -1 -1 25 3735.42 -1 -1 370972 -1 -1 6963 36 159 27 success 249f371 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2022-05-13T19:25:06 gh-actions-runner-vtr-auto-spawned55 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2224756 36 356 204677 177630 1 71497 7541 99 99 9801 clb auto 240.87 -1 550.11 2.85 40.9606 -310047 -40.9606 40.9606 85.25 0.269814 0.216609 44.2465 35.8272 138 1054751 25 6.00857e+08 4.73056e+08 8.73468e+07 8912.03 2091.96 185.725 152.53 1021033 18 247677 607276 97674752 21023538 43.2657 43.2657 -371849 -43.2657 0 0 1.11488e+08 11375.2 38.73 37.20 17.0798 15.242 +k6_frac_N10_frac_chain_mem32K_40nm.xml arm_core.v common 289.39 vpr 258.57 MiB 24.61 158276 -1 -1 20 28.64 -1 -1 71512 -1 -1 865 133 30 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 264776 133 179 14402 14202 1 7199 1207 38 38 1444 memory auto 38.94 -1 13.24 0.09 18.8523 -183590 -18.8523 18.8523 3.81 0.0251887 0.0210161 3.76159 3.11595 118 191881 34 8.30822e+07 6.30594e+07 1.07788e+07 7464.55 135.39 13.8049 11.2074 172880 15 31064 119094 29980627 5816168 21.7402 21.7402 -210504 -21.7402 0 0 1.36332e+07 9441.30 3.32 7.20 1.77197 1.56758 +k6_frac_N10_frac_chain_mem32K_40nm.xml bgm.v common 470.19 odin 969.86 MiB 91.24 993136 -1 -1 13 57.54 -1 -1 109968 -1 -1 2795 257 0 11 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 686180 257 32 37686 35094 1 20440 3095 63 63 3969 clb auto 73.57 -1 52.01 0.38 17.2204 -22733.7 -17.2204 17.2204 30.86 0.0756664 0.0621212 9.59885 7.9604 78 394364 22 2.36641e+08 1.54991e+08 2.10337e+07 5299.50 106.42 36.2967 29.4228 373741 18 92639 401381 21433636 3435096 19.4123 19.4123 -25190.6 -19.4123 0 0 2.66285e+07 6709.12 7.64 9.39 5.25866 4.58681 +k6_frac_N10_frac_chain_mem32K_40nm.xml blob_merge.v common 75.90 odin 276.07 MiB 11.46 282696 -1 -1 5 3.89 -1 -1 58680 -1 -1 528 36 0 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 149344 36 100 12930 10304 1 2998 664 29 29 841 clb auto 16.26 -1 5.12 0.03 13.1678 -2196.78 -13.1678 13.1678 1.96 0.0107799 0.00899519 1.83642 1.55061 62 63931 40 4.4999e+07 2.8456e+07 3.45982e+06 4113.93 26.06 5.54004 4.56874 57831 17 11587 51471 2168747 285016 15.1723 15.1723 -2525.92 -15.1723 0 0 4.29908e+06 5111.87 1.00 1.34 0.964319 0.841919 +k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 10.48 vpr 71.42 MiB 4.99 59080 -1 -1 3 0.69 -1 -1 39636 -1 -1 43 178 0 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 73136 178 193 1245 1344 1 597 414 14 14 196 io auto 0.69 -1 0.62 0.01 2.58477 -557.416 -2.58477 2.58477 0.37 0.00166273 0.00148082 0.237439 0.211921 40 5086 20 9.20055e+06 2.31744e+06 488146. 2490.54 1.29 0.628725 0.568859 4513 16 1579 2322 115894 31181 2.97519 2.97519 -676.649 -2.97519 0 0 612638. 3125.70 0.14 0.10 0.0857783 0.0807786 +k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 2.46 vpr 66.02 MiB 0.26 17188 -1 -1 3 0.06 -1 -1 38584 -1 -1 68 99 1 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 67600 99 130 344 474 1 227 298 12 12 144 clb auto 0.18 -1 0.27 0.00 1.6034 -105.252 -1.6034 1.6034 0.23 0.000418061 0.000369018 0.0724014 0.0638622 46 1165 12 5.66058e+06 4.21279e+06 378966. 2631.71 0.55 0.176302 0.158792 1100 12 460 696 32029 10374 1.9165 1.9165 -128.312 -1.9165 0 0 486261. 3376.82 0.10 0.03 0.0196058 0.0184592 +k6_frac_N10_frac_chain_mem32K_40nm.xml diffeq1.v common 9.01 vpr 69.05 MiB 0.28 19396 -1 -1 5 0.10 -1 -1 38212 -1 -1 31 162 0 5 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 70704 162 96 1068 885 1 660 294 16 16 256 mult_36 auto 0.30 -1 0.55 0.01 15.3317 -1127.05 -15.3317 15.3317 0.49 0.00149317 0.00133496 0.212572 0.191011 46 11145 49 1.21132e+07 3.65071e+06 727244. 2840.79 5.30 0.670189 0.609855 9400 21 3410 5470 2349725 581488 17.4088 17.4088 -1308.39 -17.4088 0 0 934704. 3651.19 0.20 0.45 0.0902238 0.0844222 +k6_frac_N10_frac_chain_mem32K_40nm.xml diffeq2.v common 7.00 vpr 67.70 MiB 0.20 18248 -1 -1 5 0.09 -1 -1 39960 -1 -1 22 66 0 5 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 69328 66 96 775 592 1 465 189 16 16 256 mult_36 auto 0.21 -1 0.39 0.00 11.2529 -695.696 -11.2529 11.2529 0.50 0.00110299 0.000986252 0.162392 0.145783 50 8155 26 1.21132e+07 3.16567e+06 780532. 3048.95 3.77 0.459985 0.419393 7187 18 3099 6613 2197613 574281 12.6224 12.6224 -821.416 -12.6224 0 0 1.00276e+06 3917.05 0.21 0.41 0.0630202 0.0592271 +k6_frac_N10_frac_chain_mem32K_40nm.xml mkDelayWorker32B.v common 73.10 vpr 312.69 MiB 12.80 117732 -1 -1 5 2.50 -1 -1 61840 -1 -1 453 506 44 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 320192 506 553 3231 3729 1 2865 1556 50 50 2500 memory auto 4.89 -1 5.21 0.04 7.24304 -1808.97 -7.24304 7.24304 18.67 0.0110531 0.00986659 2.51296 2.23089 40 22824 15 1.47946e+08 4.85265e+07 7.18436e+06 2873.75 13.95 5.46506 4.94673 21806 16 3846 4900 3404169 865493 7.97502 7.97502 -2266.88 -7.97502 0 0 8.97548e+06 3590.19 2.46 1.18 0.627647 0.591326 +k6_frac_N10_frac_chain_mem32K_40nm.xml mkPktMerge.v common 13.18 vpr 71.53 MiB 0.47 19768 -1 -1 2 0.09 -1 -1 38180 -1 -1 30 311 15 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 73248 311 156 1015 1158 1 965 512 28 28 784 memory auto 0.59 -1 0.97 0.01 4.20059 -4082.54 -4.20059 4.20059 1.82 0.00289243 0.00247893 0.425328 0.360271 46 13551 23 4.25198e+07 9.83682e+06 2.40571e+06 3068.51 4.97 1.15206 1.0067 13041 13 2733 3009 2108979 570348 4.38655 4.38655 -4828.02 -4.38655 -0.00135869 -0.00135869 3.09729e+06 3950.62 0.72 0.49 0.126039 0.116075 +k6_frac_N10_frac_chain_mem32K_40nm.xml mkSMAdapter4B.v common 21.13 vpr 83.62 MiB 3.35 49804 -1 -1 5 1.47 -1 -1 43404 -1 -1 170 193 5 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 85632 193 205 2761 2690 1 1414 573 20 20 400 memory auto 2.42 -1 2.05 0.01 4.92059 -2551.26 -4.92059 4.92059 0.84 0.00346931 0.00286185 0.660026 0.555531 58 20019 28 2.07112e+07 1.1902e+07 1.47095e+06 3677.38 7.27 1.75833 1.51601 17070 14 4711 11865 939709 216913 5.94415 5.94415 -2992.14 -5.94415 0 0 1.87544e+06 4688.60 0.42 0.36 0.219989 0.203293 +k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 45.73 vpr 106.35 MiB 4.58 71992 -1 -1 8 3.48 -1 -1 45408 -1 -1 254 385 2 1 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 108904 385 394 4717 4600 1 2443 1036 27 27 729 io auto 7.77 -1 4.80 0.05 8.27603 -9349.98 -8.27603 8.27603 1.77 0.00792599 0.00698793 1.27567 1.13218 112 45396 20 3.93038e+07 1.51811e+07 5.05392e+06 6932.68 15.18 4.38176 3.89317 43731 18 9356 32196 2729636 527672 8.88422 8.88422 -10330.9 -8.88422 0 0 6.40844e+06 8790.73 1.47 1.04 0.552764 0.508169 +k6_frac_N10_frac_chain_mem32K_40nm.xml raygentop.v common 20.16 vpr 85.73 MiB 3.19 45408 -1 -1 3 0.49 -1 -1 42644 -1 -1 118 236 1 6 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 87784 236 305 3150 2960 1 1492 666 19 19 361 io auto 2.43 -1 1.80 0.02 4.23667 -2543.98 -4.23667 4.23667 0.75 0.00413483 0.00364184 0.638412 0.564604 58 25933 36 1.72706e+07 9.28349e+06 1.32779e+06 3678.09 7.53 1.94278 1.74349 21115 21 6318 17456 3367833 768602 5.08186 5.08186 -2951.71 -5.08186 0 0 1.69263e+06 4688.74 0.38 0.78 0.295221 0.275341 +k6_frac_N10_frac_chain_mem32K_40nm.xml sha.v common 14.35 vpr 83.01 MiB 2.77 46364 -1 -1 5 1.31 -1 -1 40976 -1 -1 139 38 0 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 85000 38 36 2774 2523 1 1058 213 16 16 256 clb auto 3.19 -1 0.95 0.01 8.88023 -2638.93 -8.88023 8.88023 0.49 0.00244077 0.00194269 0.341585 0.27375 72 13991 48 1.21132e+07 7.49127e+06 1.11200e+06 4343.75 2.73 1.1831 0.97942 12928 16 3748 8982 348275 61148 10.1568 10.1568 -3224.84 -10.1568 0 0 1.39441e+06 5446.92 0.28 0.23 0.190282 0.173941 +k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 10.47 vpr 72.84 MiB 1.83 32012 -1 -1 16 0.42 -1 -1 40844 -1 -1 60 45 3 1 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 74592 45 32 1205 1164 1 788 141 14 14 196 memory auto 1.77 -1 0.55 0.00 9.56119 -6090.56 -9.56119 9.56119 0.36 0.00147592 0.00118349 0.222568 0.177982 60 13441 33 9.20055e+06 5.27364e+06 710723. 3626.14 3.41 0.594306 0.493117 10972 15 3585 9110 1692997 425613 10.9104 10.9104 -7360.86 -10.9104 0 0 894373. 4563.13 0.18 0.37 0.113468 0.104173 +k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision0.v common 68.03 vpr 238.15 MiB 12.12 112532 -1 -1 5 5.95 -1 -1 73912 -1 -1 720 169 0 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 243868 169 197 23380 21512 1 6572 1086 34 34 1156 clb auto 9.13 -1 6.96 0.05 3.00599 -12620.7 -3.00599 3.00599 2.90 0.0193987 0.0159546 2.86898 2.35985 52 63297 46 6.50233e+07 3.88039e+07 4.04437e+06 3498.59 15.15 8.82519 7.35026 57570 14 16473 26385 1072810 211186 3.51457 3.51457 -14751.7 -3.51457 0 0 5.32397e+06 4605.51 1.28 1.39 1.40229 1.28469 +k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision1.v common 151.81 vpr 306.58 MiB 15.26 122844 -1 -1 3 9.96 -1 -1 86400 -1 -1 672 115 0 40 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 313936 115 145 22912 19349 1 9713 972 40 40 1600 mult_36 auto 8.68 -1 8.81 0.06 5.0352 -22298.3 -5.0352 5.0352 4.28 0.0207928 0.0168265 3.19331 2.64066 88 123461 21 9.16046e+07 5.20575e+07 9.19823e+06 5748.90 80.74 13.1563 11.0052 115526 16 31449 47079 21545886 4497186 5.38135 5.38135 -26212.8 -5.38135 0 0 1.15336e+07 7208.51 2.77 4.96 1.44017 1.30745 +k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision2.v common 355.92 vpr 935.14 MiB 14.06 124344 -1 -1 3 4.33 -1 -1 179272 -1 -1 1480 149 0 179 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 957588 149 182 55419 37084 1 28638 1990 80 80 6400 mult_36 auto 17.02 -1 36.53 0.23 12.846 -49834.9 -12.846 12.846 51.63 0.0566539 0.0490924 9.78261 8.14413 92 394515 21 3.90281e+08 1.50647e+08 3.95573e+07 6180.83 155.52 33.4086 28.0324 380053 23 105560 124018 43044091 8968053 13.6736 13.6736 -57609.5 -13.6736 0 0 5.02851e+07 7857.05 15.08 12.80 4.67064 4.12586 +k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.55 vpr 65.04 MiB 0.46 21344 -1 -1 5 0.09 -1 -1 37400 -1 -1 14 11 0 0 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 66604 11 2 298 278 2 75 27 7 7 49 clb auto 0.12 -1 0.05 0.00 1.86151 -141.179 -1.86151 1.77041 0.05 0.000223204 0.000170009 0.0297989 0.0230222 28 448 15 1.07788e+06 754516 72669.7 1483.05 0.09 0.0693562 0.0565805 287 10 180 296 4757 1742 2.01749 1.927 -154.608 -2.01749 0 0 87745.0 1790.71 0.01 0.02 0.0153313 0.0142659 +k6_frac_N10_frac_chain_mem32K_40nm.xml LU8PEEng.v common 551.20 odin 707.32 MiB 66.83 724292 -1 -1 93 71.24 -1 -1 108280 -1 -1 2160 114 45 8 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 585284 114 102 36769 32828 1 17258 2429 56 56 3136 clb auto 73.51 -1 48.05 0.35 61.6411 -52409.7 -61.6411 61.6411 24.98 0.0714426 0.0616816 10.564 8.6587 98 351001 41 1.8697e+08 1.44241e+08 2.01848e+07 6436.49 208.72 40.7684 32.8615 322332 24 66774 258099 39921135 8420759 71.1286 71.1286 -65163.7 -71.1286 0 0 2.55970e+07 8162.30 6.84 13.39 5.68443 4.86517 +k6_frac_N10_frac_chain_mem32K_40nm.xml LU32PEEng.v common 3557.53 vpr 2.38 GiB 267.14 2270056 -1 -1 97 701.18 -1 -1 330320 -1 -1 7528 114 168 32 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 2498840 114 102 121983 109754 1 58482 7944 103 103 10609 clb auto 234.87 -1 345.92 2.17 63.3218 -365557 -63.3218 63.3218 98.79 0.309412 0.249119 43.3864 35.3476 142 1407728 49 6.46441e+08 5.10411e+08 9.71358e+07 9155.99 1613.34 218.14 174.163 1352071 22 209825 894849 295148607 77395352 72.8756 72.8756 -483010 -72.8756 0 0 1.23104e+08 11603.8 42.40 107.67 21.9161 18.6604 +k6_frac_N10_frac_chain_mem32K_40nm.xml mcml.v common 5155.73 vpr 1.99 GiB 284.28 1740324 -1 -1 25 3654.19 -1 -1 381080 -1 -1 6356 36 159 27 success v8.0.0-6225-g4e809c86e-dirty Release VTR_ASSERT_LEVEL=2 GNU 10.2.1 on Linux-5.10.0-16-amd64 x86_64 2022-08-30T17:04:40 simplex /home/sdamghan/Repos/sdamghan 2087760 36 356 188398 163014 1 63990 6934 95 95 9025 clb auto 186.61 -1 360.72 2.13 42.6568 -293255 -42.6568 42.6568 76.39 0.247498 0.19525 41.7286 33.2743 138 954752 24 5.4965e+08 4.40345e+08 8.02702e+07 8894.20 382.46 137.698 111.036 919742 22 218019 499104 96945006 23248877 46.1694 46.1694 -373127 -46.1694 0 0 1.02468e+08 11353.8 33.32 41.90 19.4872 17.0078