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20 changes: 19 additions & 1 deletion Cargo.lock

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11 changes: 9 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,6 @@ resolver = "2"
[workspace.package]
edition = "2021"
rust-version = "1.83.0"

[package]
name = "aspeed-ddk"
version = "0.1.0"
Expand All @@ -32,13 +31,21 @@ embedded-hal = { version = "1.0.0" }
embedded-hal-old = { git = "https://github.com/rust-embedded/embedded-hal.git", rev = "599d44fdc7e709cb9ae6580ec11c0b7f7f102", package = "embedded-hal" }
embedded-io = "0.6.1"
fugit = "0.3.7"
proposed-traits = { git = "https://github.com/rusty1968/proposed_traits.git", package = "proposed-traits", rev = "85641310df5a5276c67f81621b104322cff0286c" }
base64ct = "<1.8.0"
proposed-traits = { git = "https://github.com/stevenlee7189/proposed_traits.git", package = "proposed-traits", rev = "496dba90a91aab8e4ae88bbaaa0e162df84ebe74" }
embedded-storage = "0.3"
hex-literal = "0.4"
heapless = "0.8.0"
nb = "1.1.0"
paste = "1.0"

cortex-m = { version = "0.7.5" }
cortex-m-rt = { version = "0.6.5", features = ["device"] }
cortex-m-semihosting = "0.5"
panic-halt = "1.0.0"

[profile.release]
codegen-units = 1 # better optimizations
debug = true # symbols are nice and they don't increase the size on Flash
lto = true # better optimizations

2 changes: 1 addition & 1 deletion link.x
Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
/* # Pre-initialization function */
/* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function,
then the function this points to will be called before the RAM is initialized. */
PROVIDE(__pre_init = DefaultPreInit);
/* PROVIDE(__pre_init = DefaultPreInit); */

/* # Sections */
SECTIONS
Expand Down
29 changes: 25 additions & 4 deletions src/i2c/ast1060_i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,8 @@ use core::sync::atomic::{AtomicBool, Ordering};
use embedded_hal::delay::DelayNs;
use embedded_hal::i2c::{NoAcknowledgeSource, Operation, SevenBitAddress};
use proposed_traits::i2c_target::I2CTarget;
#[cfg(feature = "i2c_target")]
use proposed_traits::i2c_target::TransactionDirection;

static I2CGLOBAL_INIT: AtomicBool = AtomicBool::new(false);

Expand Down Expand Up @@ -1348,7 +1350,14 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
if event == I2cSEvent::SlaveRdReq {
i2c_debug!(self.logger, "read_requested");
if let Some(target) = self.i2c_data.slave_target.as_mut() {
target.on_transaction_start(false);
if let Ok(Some(val)) =
target.on_transaction_start(TransactionDirection::Read, false)
{
if let Some(slice) = self.sdma_buf.as_mut_slice(0, 1).get_mut(0) {
*slice = val;
i2c_debug!(self.logger, "read_requested val {:#x}", val);
}
}
}
} else if event == I2cSEvent::SlaveRdProc {
i2c_debug!(self.logger, "read_processed");
Expand Down Expand Up @@ -1390,7 +1399,7 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
//if slave is ready to receive
i2c_debug!(self.logger, "write_requested");
if let Some(target) = self.i2c_data.slave_target.as_mut() {
target.on_transaction_start(false);
let _ = target.on_transaction_start(TransactionDirection::Write, false);
}
} else if event == I2cSEvent::SlaveWrRecvd {
//Another I2C master has sent a byte to us which needs to be set in ‘val’
Expand Down Expand Up @@ -1440,7 +1449,7 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
if event == I2cSEvent::SlaveWrReq {
i2c_debug!(self.logger, "byte write_requested");
if let Some(target) = self.i2c_data.slave_target.as_mut() {
target.on_transaction_start(false);
let _ = target.on_transaction_start(TransactionDirection::Write, false);
}
} else if event == I2cSEvent::SlaveWrRecvd {
i2c_debug!(self.logger, "byte write_received");
Expand All @@ -1454,7 +1463,18 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
if event == I2cSEvent::SlaveRdReq {
i2c_debug!(self.logger, "byte read_requested");
if let Some(target) = self.i2c_data.slave_target.as_mut() {
target.on_transaction_start(false);
match target.on_transaction_start(TransactionDirection::Read, false) {
Ok(Some(v)) => {
*val = v;
}
Ok(None) => {
*val = 0;
}
Err(e) => {
i2c_debug!(self.logger, "Failed on read_requested: {:?}", e);
*val = 0;
}
}
}
} else if event == I2cSEvent::SlaveRdProc {
i2c_debug!(self.logger, "byte read_processed");
Expand Down Expand Up @@ -1660,6 +1680,7 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
cmd = SLAVE_TRIGGER_CMD;
match self.xfer_mode {
I2cXferMode::DmaMode => {
self.i2c.i2cs4c().write(|w| unsafe { w.bits(0) });
self.i2c.i2cs2c().modify(|_, w| unsafe {
w.dmarx_buf_len_byte()
.bits(u16::try_from(I2C_SLAVE_BUF_SIZE - 1).unwrap())
Expand Down
2 changes: 2 additions & 0 deletions src/i2c/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,3 +3,5 @@
pub mod ast1060_i2c;
pub mod common;
pub mod i2c_controller;
pub mod pfr;
pub mod target;
4 changes: 4 additions & 0 deletions src/i2c/pfr/mod.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
// Licensed under the Apache-2.0 license

#[cfg(feature = "i2c_target")]
pub mod swmbx;
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