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Pull requests: SebLague/Digital-Logic-Sim

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Pull requests list

Significantly improved performance by adding caching of combinational chips
#507 opened May 31, 2025 by CC56785 Loading…
Add the SPS chip
#505 opened May 31, 2025 by BeboKhouja Loading…
Feature: Better Straight Wire Routing
#501 opened May 23, 2025 by jandrec27 • Draft
2
Add RTC chip
#499 opened May 23, 2025 by BeboKhouja Loading…
1
Potential fix for busses being misaligned when flipped
#497 opened May 21, 2025 by jandrec27 Loading…
feat: improve buzzer with a speaker-like display
#476 opened May 8, 2025 by squigglesdev Loading…
5
Dev mod api, 16 BIT I/O, PORTS, ASCII text display(32768 charachters or 64 charachters, 16 or 8Bit)
#470 opened May 6, 2025 by parshwa282011 • Draft
7 of 9 tasks
10
Modding API!
#459 opened May 3, 2025 by squigglesdev • Draft
27
Features/chip caching
#443 opened Apr 29, 2025 by wraith4081 Loading…
4
14-Segment Display
#436 opened Apr 28, 2025 by MyNameIsToday Loading…
4
I worked on add 16Bit IN/OUT
#421 opened Apr 27, 2025 by parshwa282011 Loading…
4
Notes
#342 opened Apr 17, 2025 by UkrainianBanderasCat Loading…
15
Hozriontal name alignment
#306 opened Apr 15, 2025 by firecerne Loading…
3
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