Software Engineer | AI & Deep Learning Researcher | LFX'25 Mentee @ RISC-V International
Research Intern @ MERL (Micro Electronics Research Lab)
Open Source Contributor | Functional Programmer | Verification Enthusiast
I'm a results-driven software engineer and researcher, working at the intersection of AI, hardware design, and open source verification tools. I specialize in both low-level microarchitecture verification and high-level deep learning systems.
🔍 I currently focus on:
- 🧠 Researching and implementing Text GANs using PyTorch
- 🛡️ Reducing hallucinations in Large Language Models (LLMs) using hybrid verification
- ⚙️ Building RISC-V pipelines, compilers, and simulators at MERL
- 📊 Benchmarking LLMs with RTL using my open-source suite ArcheV
💡 Fun fact: I can read assembly faster than I read novels!
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🔹 LFX’25 Mentee @ RISC-V International
Contributing to machine-readable RISC-V specifications and tools -
🔹 Senior Research Intern @ MERL
Developing and benchmarking RISC-V pipelines and LLM verification systems
🔬 ArcheV
🧪 RISC-V RV-32i RTL Benchmarking Suite to test LLMs on low-level architectures
✅ Focused on syntactical & functional verification via Verilog + Python
🛠️ YAML-based tooling and schema automation for RISC-V documentation and simulators
⚙️ Fixed schema paths, improved generator pipelines
📚 Researching and building a Text GAN using PyTorch
🎯 Targeted at learning discrete language patterns and improving generation quality
🔍 Using prompt engineering, hybrid testing, and functional output validation to reduce hallucinations in LLMs
🧩 Involves structured inputs, JSON-based evaluation, and rule-based fallback
- 🧪 Senior Research Intern @ MERL
- 🎓 LFX Mentorship Program 2025 @ RISC-V International
- 📊 Improved LLM benchmarking accuracy by 25%
- 👨🏫 Taught Scala Functional Programming and AI Fundamentals
- 📝 Contributed to IEEE-style research and documentation
- 📧 Email: [email protected]
⭐ Enjoy my work? Give it a ⭐ to support continued open source innovation!
🤝 I’m open to collaborations in AI, ML, Functional Programming, and RISC-V verification.