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Add device tree for ADAQ23875. Add one lane support for CN0577 #2860

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Add device tree for ADAQ23875. Add one lane support for CN0577 #2860

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ab10bf1
drivers: iio: adc: ltc2387: Add support for one lane
IuliaCMoldovan Jul 14, 2025
beb559a
arch: arm: boot: dts: xilinx: cn0577: Add DMA src and dest widths
IuliaCMoldovan Jul 11, 2025
ba27099
arch: arm: boot: dts: xilinx: Add dts support for ADAQ23875 on Zedboard
IuliaCMoldovan Jul 11, 2025
bd93f1e
review: ltc2387.c: Remove else condition
IuliaCMoldovan Aug 13, 2025
04fc46b
Add ADAQ23878 dts. Fix osc freq for ADAQ23875
IuliaCMoldovan Aug 13, 2025
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95 changes: 95 additions & 0 deletions arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875.dts
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Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices ADAQ23875/LTC2387-16
*
* hdl_project: <adaq2387x/zed with make parameter ADC_RES=16>
* for all config modes, please check the README of the HDL project
* board_revision: <A>
*
* Copyright (C) 2022 - 2025 Analog Devices Inc.
*/
/dts-v1/;

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>

/ {
vref: regulator-vref {
compatible = "regulator-fixed";
regulator-name = "fixed-supply";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
regulator-always-on;
};

clocks {
ext_clk: clock@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
};
};
gpio-control@0 {
compatible = "adi,one-bit-adc-dac";
#address-cells = <1>;
#size-cells = <0>;
out-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>,
<&gpio0 87 GPIO_ACTIVE_HIGH>;
channel@0 {
reg = <0>;
label = "adaq23875_testpat";
};
channel@1 {
reg = <1>;
label = "adaq23875_pd";
};
};
};

&fpga_axi {
rx_dma: dma-controller@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <16>;
adi,source-bus-type = <2>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

axi_pwm_gen: pwm@44a60000 {
compatible = "adi,axi-pwmgen-2.00.a";
reg = <0x44a60000 0x1000>;
label = "adaq23875_if";
#pwm-cells = <2>;
clocks = <&clkc 15>, <&ext_clk>;
clock-names = "axi", "ext";
};

adaq23875@0{
compatible = "adaq23875";
clocks = <&ext_clk>;
dmas = <&rx_dma 0>;
dma-names = "rx";
pwms = <&axi_pwm_gen 0 0
&axi_pwm_gen 1 0>;
pwm-names = "cnv", "clk_en";
vref-supply = <&vref>;

// uncomment the below command to use in one lane mode
// adi,use-one-lane;
};
};
95 changes: 95 additions & 0 deletions arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23878.dts
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Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices ADAQ23878
*
* hdl_project: <adaq2387x/zed>
* for all config modes, please check the README of the HDL project
* board_revision: <A>
*
* Copyright (C) 2022 - 2025 Analog Devices Inc.
*/
/dts-v1/;

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>

/ {
vref: regulator-vref {
compatible = "regulator-fixed";
regulator-name = "fixed-supply";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
regulator-always-on;
};

clocks {
ext_clk: clock@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
};
};
gpio-control@0 {
compatible = "adi,one-bit-adc-dac";
#address-cells = <1>;
#size-cells = <0>;
out-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>,
<&gpio0 87 GPIO_ACTIVE_HIGH>;
channel@0 {
reg = <0>;
label = "adaq23878_testpat";
};
channel@1 {
reg = <1>;
label = "adaq23878_pd";
};
};
};

&fpga_axi {
rx_dma: dma-controller@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <32>;
adi,source-bus-type = <2>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

axi_pwm_gen: pwm@44a60000 {
compatible = "adi,axi-pwmgen-2.00.a";
reg = <0x44a60000 0x1000>;
label = "adaq23878_if";
#pwm-cells = <2>;
clocks = <&clkc 15>, <&ext_clk>;
clock-names = "axi", "ext";
};

adaq23878@0{
compatible = "adaq23878";
clocks = <&ext_clk>;
dmas = <&rx_dma 0>;
dma-names = "rx";
pwms = <&axi_pwm_gen 0 0
&axi_pwm_gen 1 0>;
pwm-names = "cnv", "clk_en";
vref-supply = <&vref>;

// uncomment the below command to use in one lane mode
// adi,use-one-lane;
};
};
21 changes: 18 additions & 3 deletions arch/arm/boot/dts/xilinx/zynq-zed-adv7511-cn0577.dts
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Original file line number Diff line number Diff line change
@@ -1,11 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices LTC2387
* Analog Devices LTC2387-18
*
* hdl_project: <cn0577/zed>
* for all config modes, please check the README of the HDL project
* board_revision: <A>
*
* Copyright (C) 2022 Analog Devices Inc.
* Copyright (C) 2022 - 2025 Analog Devices Inc.
*/
/dts-v1/;

Expand Down Expand Up @@ -54,6 +55,19 @@
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <32>;
adi,source-bus-type = <2>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

axi_pwm_gen: pwm@44a60000 {
Expand All @@ -75,6 +89,7 @@
pwm-names = "cnv", "clk_en";
vref-supply = <&vref>;

adi,use-two-lanes;
// uncomment the below command to use in one lane mode
// adi,use-one-lane;
};
};
7 changes: 5 additions & 2 deletions drivers/iio/adc/ltc2387.c
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Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
* Linear Technology LTC2387 ADC driver
Expand Down Expand Up @@ -222,9 +222,12 @@
struct ltc2387_dev *ltc = iio_priv(indio_dev);
struct device *dev = indio_dev->dev.parent;

if (device_property_present(dev, "adi,use-two-lanes"))
ltc->lane_mode = TWO_LANES;
if (device_property_present(dev, "adi,use-one-lane")) {
ltc->lane_mode = ONE_LANE;
return ltc2387_set_sampling_freq(ltc, 7.5 * MHz);
}

Check warning on line 228 in drivers/iio/adc/ltc2387.c

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checkpatch: else is not generally useful after a break or return
+		return ltc2387_set_sampling_freq(ltc, 7.5 * MHz);
+	} else {

ltc->lane_mode = TWO_LANES;
return ltc2387_set_sampling_freq(ltc, 15 * MHz);
}

Expand All @@ -242,7 +245,7 @@
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
temp = regulator_get_voltage(ltc->vref);
if (temp < 0)

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coccicheck: 6-10  WARNING  Unsigned expression compared with zero  temp < 0

Check warning on line 248 in drivers/iio/adc/ltc2387.c

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kernel_smatch: unsigned 'temp' is never less than zero.
return temp;

*val = (temp * 2) / 1000;
Expand Down
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