Allow longer time for low performance architectures #198
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💚 CLA has been signed |
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I'm slightly reluctant to make CI 3 seconds slower. However, I can't merge this until you have signed the CLA, sorry. |
Oh I forgot about that. Sorry. |
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I am a Fedora packager and recently observed that many tests were failing due to timeouts during the check stage. This issue is particularly noticeable on low-performance devices and current RISC-V hardware. The existing 2-second timeout is insufficient for these systems, leading to test failures.
To address this, I have adjusted the timeout duration from 2 seconds to 5 seconds. This change has been tested on the SG2042 (a RISC-V chip) and has shown to work well.