This repository contains photonic device model libraries and sample testbenches for electronics and photonics co-design. This model library is designed to capture key device behaviors including optical loss, back reflection, nonlinearity, high-frequency response, and noise characteristics. The models are based on the interoperable Verilog-A language and can be imported into standard electronic circuit simulators. The sample testbenches are currently provided as a Keysight Advanced Design System (ADS) workspace, with potential support for other simulators in future releases.
This work builds on our recent study (K.Kawahara and T.Baba, IEEE Journal of Microwaves).
The model library can be used with most electronic circuit simulators that support Verilog-A import. The execution requirements for the sample testbench comply with those of Keysight ADS 2025.
No dependencies. The models can be used in any simulator that supports Verilog-A.
The sample testbench has been verified on the following environments:
- OS: Microsoft Windows 11 Home
- Simulator: Keysight ADS 2025 Update 0_1.
- Processor: 10th Gen Intel Core i7-10510U
- Memory: 32 GB RAM
- OS: CentOS Stream 8
- Simulator: Keysight ADS 2022 Update 2.
- Processor: 12th Gen Intel Core i7-12700
- Memory: 64 GB RAM
Note:
Some testbenches did not run properly on ADS 2019 Update1, and 2022 Update2 or later is recommended.
The import procedure for Verilog-A models follows the standard method of each simulator.
This section explains how to set up the sample testbench in Keysight ADS.
Start by unarchiving the ADS workspace. Open ADS and navigate to File → Unarchive....
Select the provided archive file opt_model_demo_wrk.7zads and specify the directory where the workspace should be created.
When prompted in the Select Items to Unarchive window, ensure all items are checked.
Next, in the Unarchiving Workspace Options window, select opt_model_demo_wrk.
Click Finish to complete the unarchiving process.
Copy the veriloga directory from the provided distribution into the unarchived workspace directory (opt_model_demo_wrk).
The Verilog-A models are not included in the ADS archive, so they must be copied manually into the workspace directory for the simulations to work correctly.
The workspace contains the following files and directories:
📂 opt_model_demo_wrk/
├── aist_mzm_pcw_aist6_no21
├── aist_mzm_rib
├── aist_one_by_two_combiner
├── aist_one_by_two_splitter
├── aist_rfpad
├── aist_transition_pcw_to_thin
├── aist_transition_thin_to_pcw
├── cpw_w8_d6
├── cpw_w10_d9_100um
├── cpw_w10_d9_200um
├── pcw_phase_modulator_80um
├── pcw_phase_modulator_segment
├── rib_phase_modulator_2000um
├── rib_phase_modulator_segment
├── symbols
├── tb_att
├── tb_edfa
├── tb_fabry-perot
├── tb_filter
├── tb_isolator
├── tb_laser
├── tb_mirror
├── tb_mzi
├── tb_mzm_pcw
├── tb_mzm_rib
├── tb_phase_modulator
├── tb_photodetector
├── tb_ssh
└── tb_waveguide
The tb_ prefixed items represent testbenches, while the other components are sub-circuit models.
opt_model_demo_wrk includes a Verilog-A model library named opt_model_lib.
opt_model_lib is loaded as a Read-Only Library in ADS and contains the following Verilog-A models:
- Attenuator
- Cartesian2Polar
- CartesianMultiplier
- CwLaser
- DirectionalCoupler
- Isolator
- NoisyEDFA
- NonlinearCapacitor
- OneTwoLoopback
- OneTwoSplitter
- Pcw
- PcwPhaseModulator
- PhaseModulator
- PhaseShifter
- PhotoDetector
- Polar2Cartesian
- ReflectionInterface
- Terminator
- TunableFilter
- TwoOneCombiner
- Waveguide
This demo runs a modulation simulation of a silicon photonic crystal waveguide (PCW) optical modulator.
- Open the schematic view of the testbench (
tb_mzm_pcw)
-
Run the transient simulation (Click Simulate (F7))
-
View the results in Data Display (
.ddsfile)
The expected result is as follows:
The expected run time of the simulation is approximately several minutes on a normal desktop computer.
- Create a new schematic by selecting File -> New -> Schematic.
- Open Component Library, and place the required models onto the schematic.
- Adjust the parameters of each component by double-clicking them and modifying values as needed.
- Add necessary simulation controllers.
- Once the schematic is complete, click Simulate to run the analysis and observe the results.
GNU General Public License v3.0 (GPL-3.0).
- Author: Keisuke Kawahara, Corresponding Author
- Affiliation: Yokohama National University (now with Institute of Science Tokyo)
- Email: keisuke [at] ieee.org
This work was conducted at the Baba Laboratory, Yokohama National University.
This work was supported by JSPS KAKENHI Grant Number JP23KJ0988.