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12 changes: 11 additions & 1 deletion llvm/include/llvm/MC/MCSchedule.h
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
#define LLVM_MC_MCSCHEDULE_H

#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringTable.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
Expand Down Expand Up @@ -124,7 +125,7 @@ struct MCSchedClassDesc {
static const unsigned short VariantNumMicroOps = InvalidNumMicroOps - 1;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
const char* Name;
uint32_t NameOff;
#endif
uint16_t NumMicroOps : 13;
uint16_t BeginGroup : 1;
Expand Down Expand Up @@ -324,6 +325,7 @@ struct MCSchedModel {
const MCSchedClassDesc *SchedClassTable;
unsigned NumProcResourceKinds;
unsigned NumSchedClasses;
const StringTable *SchedClassNames;
// Instruction itinerary tables used by InstrItineraryData.
friend class InstrItineraryData;
const InstrItinerary *InstrItineraries;
Expand Down Expand Up @@ -368,6 +370,14 @@ struct MCSchedModel {
return &SchedClassTable[SchedClassIdx];
}

StringRef getSchedClassName(unsigned SchedClassIdx) const {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
return (*SchedClassNames)[SchedClassTable[SchedClassIdx].NameOff];
#else
return "<unknown>";
#endif
}

/// Returns the latency value for the scheduling class.
LLVM_ABI static int computeInstrLatency(const MCSubtargetInfo &STI,
const MCSchedClassDesc &SCDesc);
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/MC/MCSchedule.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ const MCSchedModel MCSchedModel::Default = {DefaultIssueWidth,
0,
0,
nullptr,
nullptr,
nullptr};

int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/MCA/InstrBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,8 @@ static void initializeUsedResources(InstrDesc &ID,
WithColor::warning()
<< "Ignoring invalid write of zero cycles on processor resource "
<< PR.Name << "\n";
WithColor::note() << "found in scheduling class " << SCDesc.Name
WithColor::note() << "found in scheduling class "
<< SM.getSchedClassName(ID.SchedClassID)
<< " (write index #" << I << ")\n";
#endif
continue;
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/TableGen/CompressWriteLatencyEntry.td
Original file line number Diff line number Diff line change
Expand Up @@ -33,10 +33,10 @@ def Read_D : SchedRead;
// CHECK-NEXT: }; // MyTargetReadAdvanceTable

// CHECK: static const llvm::MCSchedClassDesc SchedModel_ASchedClasses[] = {
// CHECK-NEXT: {DBGFIELD("InvalidSchedClass") 8191, false, false, false, 0, 0, 0, 0, 0, 0},
// CHECK-NEXT: {DBGFIELD("Inst_A") 1, false, false, false, 0, 0, 1, 1, 0, 0}, // #1
// CHECK-NEXT: {DBGFIELD("Inst_B") 1, false, false, false, 0, 0, 2, 1, 0, 0}, // #2
// CHECK-NEXT: {DBGFIELD("Inst_C") 1, false, false, false, 0, 0, 1, 1, 1, 1}, // #3
// CHECK-NEXT: {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0},
// CHECK-NEXT: {DBGFIELD(/*Inst_A*/ {{[0-9]+}}) 1, false, false, false, 0, 0, 1, 1, 0, 0}, // #1
// CHECK-NEXT: {DBGFIELD(/*Inst_B*/ {{[0-9]+}}) 1, false, false, false, 0, 0, 2, 1, 0, 0}, // #2
// CHECK-NEXT: {DBGFIELD(/*Inst_C*/ {{[0-9]+}}) 1, false, false, false, 0, 0, 1, 1, 1, 1}, // #3
// CHECK-NEXT: }; // SchedModel_ASchedClasses

let SchedModel = SchedModel_A in {
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/TableGen/InvalidMCSchedClassDesc.td
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
// RUN: llvm-tblgen -gen-subtarget -I %p/../../include %s 2>&1 | FileCheck %s
// Check if it is valid MCSchedClassDesc if didn't have the resources.
// Check if it is valid MCSchedClassDesc if didn't have the resources.

include "llvm/Target/Target.td"

def MyTarget : Target;

let OutOperandList = (outs), InOperandList = (ins) in {
def Inst_A : Instruction;
def Inst_B : Instruction;
def Inst_A : Instruction;
def Inst_B : Instruction;
}

let CompleteModel = 0 in {
Expand All @@ -18,27 +18,27 @@ let CompleteModel = 0 in {

// Inst_B didn't have the resoures, and it is invalid.
// CHECK: SchedModel_ASchedClasses[] = {
// CHECK: {DBGFIELD("Inst_A") 1
// CHECK-NEXT: {DBGFIELD("Inst_B") 8191
// CHECK: {DBGFIELD(/*Inst_A*/ 19) 1
// CHECK-NEXT: {DBGFIELD(/*Inst_B*/ 26) 8191
let SchedModel = SchedModel_A in {
def Write_A : SchedWriteRes<[]>;
def : InstRW<[Write_A], (instrs Inst_A)>;
}

// Inst_A didn't have the resoures, and it is invalid.
// CHECK: SchedModel_BSchedClasses[] = {
// CHECK: {DBGFIELD("Inst_A") 8191
// CHECK-NEXT: {DBGFIELD("Inst_B") 1
// CHECK: {DBGFIELD(/*Inst_A*/ 19) 8191
// CHECK-NEXT: {DBGFIELD(/*Inst_B*/ 26) 1
let SchedModel = SchedModel_B in {
def Write_B: SchedWriteRes<[]>;
def Write_B: SchedWriteRes<[]>;
def : InstRW<[Write_B], (instrs Inst_B)>;
}

// CHECK: SchedModel_CSchedClasses[] = {
// CHECK: {DBGFIELD("Inst_A") 1
// CHECK-NEXT: {DBGFIELD("Inst_B") 1
// CHECK: {DBGFIELD(/*Inst_A*/ 19) 1
// CHECK-NEXT: {DBGFIELD(/*Inst_B*/ 26) 1
let SchedModel = SchedModel_C in {
def Write_C: SchedWriteRes<[]>;
def Write_C: SchedWriteRes<[]>;
def : InstRW<[Write_C], (instrs Inst_A, Inst_B)>;
}

Expand Down
9 changes: 5 additions & 4 deletions llvm/tools/llvm-exegesis/lib/Analysis.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -137,9 +137,9 @@ void Analysis::printInstructionRowCsv(const size_t PointId,
std::tie(SchedClassId, std::ignore) = ResolvedSchedClass::resolveSchedClassId(
State_.getSubtargetInfo(), State_.getInstrInfo(), MCI);
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
const MCSchedClassDesc *const SCDesc =
State_.getSubtargetInfo().getSchedModel().getSchedClassDesc(SchedClassId);
writeEscaped<kEscapeCsv>(OS, SCDesc->Name);
StringRef SCDescName =
State_.getSubtargetInfo().getSchedModel().getSchedClassName(SchedClassId);
writeEscaped<kEscapeCsv>(OS, SCDescName);
#else
OS << SchedClassId;
#endif
Expand Down Expand Up @@ -563,7 +563,8 @@ Error Analysis::run<Analysis::PrintSchedClassInconsistencies>(
OS << "<div class=\"inconsistency\"><p>Sched Class <span "
"class=\"sched-class-name\">";
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
writeEscaped<kEscapeHtml>(OS, RSCAndPoints.RSC.SCDesc->Name);
writeEscaped<kEscapeHtml>(OS, SI.getSchedModel().getSchedClassName(
RSCAndPoints.RSC.SchedClassId));
#else
OS << RSCAndPoints.RSC.SchedClassId;
#endif
Expand Down
22 changes: 18 additions & 4 deletions llvm/utils/TableGen/SubtargetEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,8 @@
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include "llvm/TableGen/StringToOffsetTable.h"
#include "llvm/TableGen/TableGenBackend.h"
#include <algorithm>
#include <cassert>
Expand Down Expand Up @@ -1380,6 +1382,10 @@ void SubtargetEmitter::emitSchedClassTables(SchedClassTables &SchedTables,
}
OS << "}; // " << Target << "ReadAdvanceTable\n";

// Pool all SchedClass names in a string table.
StringToOffsetTable StrTab;
unsigned InvalidNameOff = StrTab.GetOrAddStringOffset("InvalidSchedClass");

// Emit a SchedClass table for each processor.
for (const auto &[Idx, Proc] : enumerate(SchedModels.procModels())) {
if (!Proc.hasInstrSchedModel())
Expand All @@ -1397,14 +1403,15 @@ void SubtargetEmitter::emitSchedClassTables(SchedClassTables &SchedTables,
// name and position.
assert(SchedModels.getSchedClass(0).Name == "NoInstrModel" &&
"invalid class not first");
OS << " {DBGFIELD(\"InvalidSchedClass\") "
OS << " {DBGFIELD(" << InvalidNameOff << ") "
<< MCSchedClassDesc::InvalidNumMicroOps
<< ", false, false, false, 0, 0, 0, 0, 0, 0},\n";

for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) {
MCSchedClassDesc &MCDesc = SCTab[SCIdx];
const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx);
OS << " {DBGFIELD(\"" << SchedClass.Name << "\") ";
unsigned NameOff = StrTab.GetOrAddStringOffset(SchedClass.Name);
OS << " {DBGFIELD(/*" << SchedClass.Name << "*/ " << NameOff << ") ";
if (SchedClass.Name.size() < 18)
OS.indent(18 - SchedClass.Name.size());
OS << MCDesc.NumMicroOps << ", " << (MCDesc.BeginGroup ? "true" : "false")
Expand All @@ -1419,6 +1426,8 @@ void SubtargetEmitter::emitSchedClassTables(SchedClassTables &SchedTables,
}
OS << "}; // " << Proc.ModelName << "SchedClasses\n";
}

StrTab.EmitStringTableDef(OS, Target + "SchedClassNames");
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Should we move this behind the NDEBUG check as well, or do we just rely on it being DCEd? (Do we need to suppress a warning about an unused static in release builds possibly?)

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I don’t think that DCE would occur in the dynamic build. This is an exposed interface, and unless it was marked as infused or static, the linker cannot know it it’s safe to remove.

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I didn't want the tablegen output to depend on the assertion mode. For most common builds, this doesn't matter, because tablgen is built using the host configuration, but there are some more advanced build configurations where tablegen is separate, and I wouldn't want to have to figure out how to plumb that configuration option through to trigger a tablegen re-run.

My intention is that we just rely on DCE, since it's trivially dead in the TU. I'm not getting a warning locally in NDEBUG builds, but I'm not sure why, because godbolt code samples show that we should warn in cases like this:
https://godbolt.org/z/jqq8rcz58

That investigation will continue.

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Coming back around to this, it appears that we suppress unused const variable warnings when the variable isn't in the main source file. My test not-minimal test sources looked like this:

// t.cpp
struct StringTable {
    constexpr explicit StringTable(int x) : x(x) {}
    int x;
};
#include "gen.h"
#ifdef NOTDEFINED
#define MAYBEUSEIT(x) x
#else
#define MAYBEUSEIT(x) 0
#endif
int dontUseIt() { return MAYBEUSEIT(unusedThing.x); }

// gen.h
static constexpr StringTable unusedThing{42};

$ clang++ -c -std=c++17 -Wall t.cpp
# no warning

And if you put the unused variable in in place of the include, you get the expected warning:

t.cpp:5:30: warning: unused variable 'unusedThing' [-Wunused-const-variable]
    5 | static constexpr StringTable unusedThing{42};
      |                              ^~~~~~~~~~~
1 warning generated.

So, I think this is all WAI. The suppression makes sense, it's probably intended to avoid warning about static const int myconstant = 42; appearing in a header.

Any other blocking concerns, or is this good to go?

}

void SubtargetEmitter::emitProcessorModels(raw_ostream &OS) {
Expand Down Expand Up @@ -1472,6 +1481,8 @@ void SubtargetEmitter::emitProcessorModels(raw_ostream &OS) {
else
OS << " nullptr, nullptr, 0, 0,"
<< " // No instruction-level machine model.\n";
OS << " DBGVAL_OR_NULLPTR(&" << Target
<< "SchedClassNames), // SchedClassNames\n";
if (PM.hasItineraries())
OS << " " << PM.ItinsDef->getName() << ",\n";
else
Expand All @@ -1493,8 +1504,10 @@ void SubtargetEmitter::emitSchedModel(raw_ostream &OS) {
<< "#endif\n"
<< "#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)\n"
<< "#define DBGFIELD(x) x,\n"
<< "#define DBGVAL_OR_NULLPTR(x) x\n"
<< "#else\n"
<< "#define DBGFIELD(x)\n"
<< "#define DBGVAL_OR_NULLPTR(x) nullptr\n"
<< "#endif\n";

if (SchedModels.hasItineraries()) {
Expand All @@ -1512,10 +1525,11 @@ void SubtargetEmitter::emitSchedModel(raw_ostream &OS) {
}
emitSchedClassTables(SchedTables, OS);

OS << "\n#undef DBGFIELD\n";

// Emit the processor machine model
emitProcessorModels(OS);

OS << "\n#undef DBGFIELD\n";
OS << "\n#undef DBGVAL_OR_NULLPTR\n";
}

static void emitPredicateProlog(const RecordKeeper &Records, raw_ostream &OS) {
Expand Down
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